摘要:
There is provided a detection circuit for TV receiver which includes a frame comb filter and a field comb filter and which generates a luminance signal or a chrominance signal by effecting addition or subtraction upon video signals of two frames adjoining each other included in the received TV signal. This detection circuit includes a synchronization separation circuit, an APC circuit, a frequency division circuit connected to the APC circuit, and a comparator circuit connected to the frequency division circuit. The frequency of the chrominance subcarrier signal is demultiplied by the frequency division circuit. The phase of the chrominance subcarrier signal thus frequency-divided is compared with the phase of the synchronizing signal separated by the synchronizing separation circuit. It is thus judged whether the received TV signal is a standard TV signal or a nonstandard TV signal.
摘要:
A digital television receiver includes a decision circuit for deciding whether an input television signal is a standard signal or a nonstandard signal. A first clock signal generator circuit for generating a first sampling clock signal synchronized with a color burst signal is provided in combination with a second clock signal generator circuit for generating a second sampling clock signal synchronized with a horizontal synchronizing signal. When the standard television signal is received, the television signal is processed by employing the first sampling clock signal. When the nonstandard television signal is received, the television signal is processed by employing the second sampling clock signal.
摘要:
A circuit for separating a luminance signal and a chrominance signal having the first, second, third, and fourth 1H delay lines each connected in series, a first comb filter including the first and second 1H delay lines, a second comb filter including the second and third 1H delay lines, a third comb filter including the third and fourth 1H delay lines, a first subtraction circuit for achieving a subtraction on an input signal to the first 1H delay line and an output signal from the second 1H delay line, a second subtraction circuit for achieving a subtraction on an input signal to the second 1H delay line and an output signal from the third 1H delay line, a third subtraction circuit for achieving a subtraction on an input signal to the third 1H delay line and an output signal from the fourth 1H delay line, and a minimum value detecting circuit connected to the first, second, and third subtraction circuits for detecting the minimum value from the subtraction results. This circuit selects by use of a switch an output signal from the comb filter for which the minimum subtraction result is detected by the minimum value detecting circuit and then outputs the selected signal. This circuit can appropriately separate the luminance and chrominance signals even in a case where the video signal includes a contour section.
摘要:
In order to carry out format conversion or scaling processing of picture signal by a memory having a small capacity, picture signals of interlace scanning are converted into picture signals of progressive scanning by interpolation by using an IP convertor 1 and a multiple scan convertor 3, a scaling processing of expansion and compression in the horizontal direction is firstly performed by using a horizontal scaling unit 5, processing of expansion, compression, frame rate conversion, synchronization and the like are secondly performed by using a vertical scaling unit 6 and commonly using memories used in scaling processing in the vertical direction and finally, color space conversion or inverse gamma processing is performed by using a picture quality improving unit 8 thereby converting the picture signals into picture signals S6 having a predetermined format.
摘要:
In a television receiver in which scanning for an incoming video signal is performed at a frequency n times as high as the input horizontal synchronous frequency by suitably controlling writing and reading on its video memory, the signals for writing and reading on the video memory unit are generated by a horizontal synchronization/deflection circuit. The horizontal synchronization/deflection circuit is arranged by having a clock generation/synchronous deflection circuit for generating reference signals to control the writing and reading on the video memory unit provided with a phase comparator such that a horizontal drive signal to drive a horizontal deflection circuit and a flyback pulse are brought in phase.
摘要:
An image control apparatus includes a waveform equalizer, a distorted waveform extraction control unit, a noise reduction circuit, and an image quality control unit. The waveform equalizer receives an input video signal, equalizes the waveform of the video signal, and outputs the waveform equalized video signal. The distorted waveform extraction control unit detects a distorted waveform from the output of the waveform equalizer and controls the waveform equalizer to perform waveform equalization suitable for the input video signal. It also controls the noise reduction circuit and the image quality control unit in accordance with changes in the frequency characteristic of the video signal before and after waveform equalization to intensify the noise reduction for degrading the image quality, when the high frequency band of the frequency characteristic of the input signal has been lowered, and, conversely, to debilitate or stop the noise reduction for enhancing the image quality, when the high frequency band has been raised.
摘要:
A signal converting circuit is disclosed for converting a television signal for 2:1 interlaced scanning system to another television signal for 1:1 non-interlaced scanning system using line memories for storing image data of two adjacent scanning lines of a present field and field memories for storing image data of a last occurring field. An interpolation signal is produced by controlling a value of the televisions signal of the two adjacent scanning lines in response to the television signal of the two adjacent scanning lines in the present field and the television signal of a scanning line positioned between the two adjacent scanning lines in the last occurring field.
摘要:
A clock pulse generator has a first clock pulse generator for generating a burst lock clock pulse signal synchronized with a color burst signal contained in a video signal; a second clock pulse generator for generating a line lock clock pulse signal synchronized with a horizontal synchronizing signal contained in the video signal; a detection circuit for detecting whether or not the video signal is a standard signal; and a phase control circuit for synchronizing the phase of the line lock clock pulse signal with the phase of the burst lock clock pulse signal when the detection circuit determines that the video signal is a standard signal. The line lock clock pulse signal is supplied to a synchronizing signal generator, a selected one of the burst lock clock pulse signal and the line lock clock pulse signal is supplied to a signal processing circuit when the detection circuit determines that the video signal is a standard signal, and the line lock clock pulse signal is supplied to the signal processing circuit when the detection circuit determines that the video signal is a non-standard signal.
摘要:
A display apparatus transmits a picture acquisition request for getting picture information to an external image apparatus connected through a predetermined interface to the display apparatus from the external image apparatus at predetermined intervals and gets a plurality of pieces of picture information from the external image apparatus to be displayed. The plurality of pictures may be switched at predetermined intervals, for example, to be displayed, so that the plurality of pictures may be displayed in a so-called slide show manner. A plurality of pictures for thumbnail may be produced from the plurality of pieces of picture information and be arranged together to be displayed in one picture screen of a display device.
摘要:
An electron emission type display apparatus has on a flat plane a matrix layout of multiple light-emitting elements which are connected to cross-points of longitudinal and lateral common electrodes, for sequentially turning on a line of light-emitting elements connected to a common electrode. In such the device, distortion takes place in drive waveform since a low-pass filter (LPF) is formed by a combination of the wiring resistance of the common electrode and the capacitance of a light-emitting element. To avoid such waveform distortion, the width of a light-emitting element driving voltage pulse is caused to be greater than the width of a scan voltage pulse.