Smart integrated semiconductor light emitting system including nitride based light emitting diodes (LED) and application specific integrated circuits (ASIC)
    1.
    发明授权
    Smart integrated semiconductor light emitting system including nitride based light emitting diodes (LED) and application specific integrated circuits (ASIC) 有权
    包括氮化物基发光二极管(LED)和专用集成电路(ASIC)的智能集成半导体发光系统

    公开(公告)号:US08933467B2

    公开(公告)日:2015-01-13

    申请号:US13309718

    申请日:2011-12-02

    IPC分类号: H01L31/12 H01L25/16

    摘要: A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC), and at least one light emitting diode (LED) that includes a Group-III nitride based material such as GaN, InGaN, AlGaN, AlInGaN or other (Ga, In or Al) N-based materials. The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated LED circuit having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.

    摘要翻译: 发光二极管(LED)系统包括衬底,专用集成电路(ASIC)和至少一个发光二极管(LED),其包括III族氮化物基材料,例如GaN,InGaN,AlGaN,AlInGaN或 其他(Ga,In或Al)N基材料。 发光二极管(LED)系统还可以包括聚合物透镜和用于产生白光的透镜或发光二极管(LED)上的荧光体层。 此外,多个发光二极管(LED)可以安装在基板上,并且可以具有用于智能色彩控制照明的不同颜色。 衬底和专用集成电路(ASIC)被配置为提供具有智能功能的集成LED电路。 此外,衬底被配置为补充和扩展专用集成电路(ASIC)的功能,并且还可以包括用于执行附加电功能的内置集成电路。

    Vertical light emitting diode (VLED) die having electrode frame and method of fabrication
    2.
    发明授权
    Vertical light emitting diode (VLED) die having electrode frame and method of fabrication 有权
    具有电极框架和制造方法的垂直发光二极管(VLED)芯片

    公开(公告)号:US08283652B2

    公开(公告)日:2012-10-09

    申请号:US12845007

    申请日:2010-07-28

    IPC分类号: H01L33/04

    摘要: A vertical light emitting diode (VLED) die includes a metal base; a mirror on the metal base; a p-type semiconductor layer on the reflector layer; a multiple quantum well (MQW) layer on the p-type semiconductor layer configured to emit light; and an n-type semiconductor layer on the multiple quantum well (MQW) layer. The vertical light emitting diode (VLED) die also includes an electrode and an electrode frame on the n-type semiconductor layer, and an organic or inorganic material contained within the electrode frame. The electrode and the electrode frame are configured to provide a high current capacity and to spread current from the outer periphery to the center of the n-type semiconductor layer. The vertical light emitting diode (VLED) die can also include a passivation layer formed on the metal base surrounding and electrically insulating the electrode frame, the edges of the mirror, the edges of the p-type semiconductor layer, the edges of the multiple quantum well (MQW) layer and the edges of the n-type semiconductor layer.

    摘要翻译: 垂直发光二极管(VLED)模具包括金属基底; 金属底座上的镜子; 反射层上的p型半导体层; 配置成发光的p型半导体层上的多量子阱(MQW)层; 和多量子阱(MQW)层上的n型半导体层。 垂直发光二极管(VLED)裸片还包括在n型半导体层上的电极和电极框架,以及包含在电极框架内的有机或无机材料。 电极和电极框架被配置为提供高电流容量并且将电流从外周延伸到n型半导体层的中心。 垂直发光二极管(VLED)裸片还可以包括形成在金属基底上的钝化层,该钝化层围绕并电绝缘电极框架,反射镜的边缘,p型半导体层的边缘,多个量子的边缘 (MQW)层和n型半导体层的边缘。

    Smart Integrated Semiconductor Light Emitting System Including Nitride Based Light Emitting Diodes (LED) And Application Specific Integrated Circuits (ASIC)
    3.
    发明申请
    Smart Integrated Semiconductor Light Emitting System Including Nitride Based Light Emitting Diodes (LED) And Application Specific Integrated Circuits (ASIC) 有权
    包括氮化物发光二极管(LED)和专用集成电路(ASIC)的智能集成半导体发光系统

    公开(公告)号:US20120091466A1

    公开(公告)日:2012-04-19

    申请号:US13309718

    申请日:2011-12-02

    IPC分类号: H01L33/08 H01L33/32

    摘要: A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC), and at least one light emitting diode (LED) that includes a Group-III nitride based material such as GaN, InGaN, AlGaN, AlInGaN or other (Ga, In or Al) N-based materials. The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated LED circuit having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.

    摘要翻译: 发光二极管(LED)系统包括衬底,专用集成电路(ASIC)和至少一个发光二极管(LED),其包括III族氮化物基材料,例如GaN,InGaN,AlGaN,AlInGaN或 其他(Ga,In或Al)N基材料。 发光二极管(LED)系统还可以包括聚合物透镜和用于产生白光的透镜或发光二极管(LED)上的荧光体层。 此外,多个发光二极管(LED)可以安装在基板上,并且可以具有用于智能色彩控制照明的不同颜色。 衬底和专用集成电路(ASIC)被配置为提供具有智能功能的集成LED电路。 此外,衬底被配置为补充和扩展专用集成电路(ASIC)的功能,并且还可以包括用于执行附加电功能的内置集成电路。

    Die separation
    4.
    发明授权
    Die separation 有权
    模具分离

    公开(公告)号:US08124454B1

    公开(公告)日:2012-02-28

    申请号:US11548629

    申请日:2006-10-11

    IPC分类号: H01L21/00

    摘要: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.

    摘要翻译: 提供了用于制造金属器件的技术,例如垂直发光二极管(VLED)器件,功率器件,激光二极管和垂直腔表面发射激光器件。 相应地生产的器件可以比常规金属器件更高的产量和更高的性能受益,例如发光二极管的较高的亮度和增加的导热性。 此外,本发明公开了在具有原始非导热和/或非导电性的金属器件的高散热率的情况下适用于GaN基电子器件的制造技术中的技术。 (或低)导电载体衬底。

    METHOD OF SEPARATING SEMICONDUCTOR DIES
    5.
    发明申请
    METHOD OF SEPARATING SEMICONDUCTOR DIES 有权
    分离半导体器件的方法

    公开(公告)号:US20110217799A1

    公开(公告)日:2011-09-08

    申请号:US13109687

    申请日:2011-05-17

    IPC分类号: H01L21/786

    CPC分类号: H01L33/0079 H01L33/0095

    摘要: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.

    摘要翻译: 描述了在半导体制造期间分离多个管芯的方法。 在包含多个模具的半导体晶片的上表面上,除了存在一块停止电镀材料之外,金属层被沉积​​。 停止电镀材料被消除,并且在整个剩余结构上方形成阻挡层。 在阻挡层上方添加牺牲金属元素,然后去除衬底。 在消除各个管芯之间的半导体材料之后,将任何期望的接合焊盘和图案化电路添加到与牺牲金属元件相对的半导体表面,在该表面上添加钝化层,然后去除牺牲金属元件。 将胶带添加到现在暴露的阻挡层中,去除钝化层,将所得结构翻转,并且将带扩展以分离各个模具。

    METHOD OF SEPARATING SEMICONDUCTOR DIES
    6.
    发明申请
    METHOD OF SEPARATING SEMICONDUCTOR DIES 有权
    分离半导体器件的方法

    公开(公告)号:US20070212854A1

    公开(公告)日:2007-09-13

    申请号:US11682814

    申请日:2007-03-06

    IPC分类号: H01L21/00

    CPC分类号: H01L33/0079 H01L33/0095

    摘要: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.

    摘要翻译: 描述了在半导体制造期间分离多个管芯的方法。 在包含多个模具的半导体晶片的上表面上,除了存在一块停止电镀材料之外,金属层被沉积​​。 停止电镀材料被消除,并且在整个剩余结构上方形成阻挡层。 在阻挡层上方添加牺牲金属元素,然后去除衬底。 在消除各个管芯之间的半导体材料之后,将任何期望的接合焊盘和图案化电路添加到与牺牲金属元件相对的半导体表面,在该表面上添加钝化层,然后去除牺牲金属元件。 将胶带添加到现在暴露的阻挡层中,去除钝化层,将所得结构翻转,并且将带扩展以分离各个模具。

    PROTECTION FOR THE EPITAXIAL STRUCTURE OF METAL DEVICES
    7.
    发明申请
    PROTECTION FOR THE EPITAXIAL STRUCTURE OF METAL DEVICES 审中-公开
    金属器件外延结构的保护

    公开(公告)号:US20120074384A1

    公开(公告)日:2012-03-29

    申请号:US13310552

    申请日:2011-12-02

    IPC分类号: H01L33/06

    摘要: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non-(or low) thermally conductive and/or non-(or low) electrically conductive carrier substrate that has been removed.

    摘要翻译: 提供了用于制造金属器件的技术,例如垂直发光二极管(VLED)器件,功率器件,激光二极管和垂直腔表面发射激光器件。 相应地生产的器件可以比常规金属器件更高的产量和更高的性能受益,例如发光二极管的较高的亮度和增加的导热性。 此外,本发明公开了在具有原始非导热和/或非导电性的金属器件的高散热率的情况下适用于GaN基电子器件的制造技术中的技术。 (或低)导电载体衬底。

    Method of making light-emitting diodes (LEDs) with improved light extraction by roughening
    8.
    发明授权
    Method of making light-emitting diodes (LEDs) with improved light extraction by roughening 有权
    通过粗糙化制造具有改进的光提取的发光二极管(LED)的方法

    公开(公告)号:US07563625B2

    公开(公告)日:2009-07-21

    申请号:US11618468

    申请日:2006-12-29

    IPC分类号: H01L21/00

    CPC分类号: H01L33/22 H01L33/0095

    摘要: Methods for fabricating a semiconductor light-emitting diode (LED) device with increased light extraction are provided. The method generally includes applying a mask to a surface of an LED wafer, etching the surface of the LED wafer such that etched pits are formed in the surface, removing the mask, and roughening or texturing the surface of the LED wafer including the etched pits. In this manner, the surface area of the LED device may be increased when compared to a conventional LED device, and less emitted light may experience total internal reflection (TIR) according to Snell's law, thereby leading to increased light extraction.

    摘要翻译: 提供了用于制造具有增加的光提取的半导体发光二极管(LED)装置的方法。 该方法通常包括将掩模施加到LED晶片的表面,蚀刻LED晶片的表面,使得在表面形成蚀刻的凹坑,去除掩模,以及使包含蚀刻凹坑的LED晶片的表面变粗糙或纹理化 。 以这种方式,与传统的LED器件相比,LED器件的表面积可以增加,并且较少的发射光可以根据斯涅耳定律经历全内反射(TIR),从而导致增加的光提取。

    METHOD OF SEPARATING SEMICONDUCTOR DIES
    9.
    发明申请
    METHOD OF SEPARATING SEMICONDUCTOR DIES 有权
    分离半导体器件的方法

    公开(公告)号:US20080032488A1

    公开(公告)日:2008-02-07

    申请号:US11835289

    申请日:2007-08-07

    IPC分类号: H01L21/78

    摘要: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, a seed metal layer may be used to grow hard metal layers above it for handling. Metal may be plated above these metal layers everywhere except where a block of stop electroplating (EP) material exists. The stop EP material may be obliterated, and a barrier layer may be formed above the entire remaining structure. The substrate may be removed, and the individual dies may have any desired bonding pads and/or patterned circuitry added to the semiconductor surface. The remerged hard metal after laser cutting and heating should be strong enough for handling. Tape may be added to the wafer, and a breaker may be used to break the dies apart. The resulting structure may be flipped over, and the tape may be expanded to separate the individual dies.

    摘要翻译: 描述了在半导体制造期间分离多个管芯的方法。 在包含多个管芯的半导体晶片的上表面上,种子金属层可以用于在其上方生长硬金属层用于处理。 除了存在一块停止电镀(EP)材料之外,金属可以被覆盖在这些金属层之上。 停止EP材料可能被擦除,并且阻挡层可以形成在整个剩余结构之上。 可以去除衬底,并且各个管芯可以具有添加到半导体表面的任何期望的接合焊盘和/或图案化电路。 激光切割加热后的重金属硬度应足够强大。 可以将胶带加入到晶片中,并且可以使用断路器将模具分开。 可以将所得到的结构翻转,并且可以将带扩展以分离各个管芯。

    Method of fabricating semiconductor die using handling layer
    10.
    发明授权
    Method of fabricating semiconductor die using handling layer 有权
    使用处理层制造半导体管芯的方法

    公开(公告)号:US08802469B2

    公开(公告)日:2014-08-12

    申请号:US13109687

    申请日:2011-05-17

    IPC分类号: H01L21/301

    CPC分类号: H01L33/0079 H01L33/0095

    摘要: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.

    摘要翻译: 描述了在半导体制造期间分离多个管芯的方法。 在包含多个模具的半导体晶片的上表面上,除了存在一块停止电镀材料之外,金属层被沉积​​。 停止电镀材料被消除,并且在整个剩余结构上方形成阻挡层。 在阻挡层上方添加牺牲金属元素,然后去除衬底。 在消除各个管芯之间的半导体材料之后,将任何期望的接合焊盘和图案化电路添加到与牺牲金属元件相对的半导体表面,在该表面上添加钝化层,然后去除牺牲金属元件。 将胶带添加到现在暴露的阻挡层中,去除钝化层,将所得结构翻转,并且将带扩展以分离各个模具。