公开(公告)号：US20100156688A1

公开(公告)日：2010-06-24

申请号：US12339084

申请日：2008-12-19

Applicant: Wei-Hsuan Tu ,  Tzung-Hung Kang

Inventor： Wei-Hsuan Tu ,  Tzung-Hung Kang

IPC: H03M1/66

CPC classification number: H03M1/66

Abstract: A multiplying digital-to-analog converter includes an operational amplifier (OP-amp) operated under a first power supply voltage and a second power supply voltage; an OP-amp input switch block coupled to a common mode voltage for selectively coupling the common mode voltage to input nodes of the OP-amp, wherein all switches included in the OP-amp input switch block are implemented utilizing PMOS transistors only, and the common mode voltage is substantially equal to the first power supply voltage; a capacitor block coupled to the OP-amp input switch block; a sampling switch block coupled to the input signal for selectively coupling the input signal to the capacitor block; a reference voltage switch block coupled to the capacitor block for selectively coupling the reference signal to the capacitor block; and a feedback switch block coupled between the capacitor block and output nodes of the OP-amp.

Abstract translation: 倍增的数/模转换器包括在第一电源电压和第二电源电压下操作的运算放大器（OP-amp）; 耦合到共模电压的OP-amp输入开关块，用于选择性地将共模电压耦合到OP放大器的输入节点，其中包括在OP放大器输入开关块中的所有开关仅利用PMOS晶体管来实现，并且 共模电压基本上等于第一电源电压; 耦合到OP-amp输入开关块的电容器块; 耦合到所述输入信号的选择开关块，用于选择性地将所述输入信号耦合到所述电容器块; 耦合到电容器块的参考电压开关块，用于选择性地将参考信号耦合到电容器块; 以及耦合在电容器块和OP-amp的输出节点之间的反馈开关块。

公开(公告)号：US07859441B2

公开(公告)日：2010-12-28

申请号：US12015473

申请日：2008-01-16

Applicant: Tzung-Hung Kang

Inventor： Tzung-Hung Kang

IPC: H03M1/00

CPC classification number: H03M1/367 ,  H03M1/1295 ,  H03M1/183 ,  H03M1/362

Abstract: A data readout system with non-uniform resolution has a pick up head for reading data stored in an optical disc and generating an analog signal, a reference voltage unit for producing a plurality of reference voltage levels, wherein voltage differences between two adjacent reference voltage levels are not all the same, a plurality of comparators for comparing the reference voltage levels with the analog signal and generating comparison results, and an encoder for encoding the comparison results into a digital signal.

Abstract translation: 具有不均匀分辨率的数据读出系统具有用于读取存储在光盘中的数据并产生模拟信号的拾取头，用于产生多个参考电压电平的参考电压单元，其中两个相邻参考电压电平之间的电压差 多个比较器，用于将参考电压电平与模拟信号进行比较并产生比较结果;以及编码器，用于将比较结果编码为数字信号。

公开(公告)号：US06825718B2

公开(公告)日：2004-11-30

申请号：US10464489

申请日：2003-06-19

Applicant: Tzung-Hung Kang ,  Chao-Cheng Lee

Inventor： Tzung-Hung Kang ,  Chao-Cheng Lee

IPC: H03F136

CPC classification number: H03H11/28 ,  H03F1/56

Abstract: The present invention discloses an impedance matching circuit which is suitable to be applied on an IC chip. The impedance matching circuit comprises a resistor unit, an OP amplifier circuit connected with the resistor unit, a feedback selecting circuit connected in parallel with the OP amplifier circuit, and a resistor selecting circuit connected with both the OP amplifier circuit and the feedback selecting circuit. The feedback selecting circuit further includes a plurality of switching circuits for enabling some of the resistors furnished in the resistor selecting circuit. By selecting and actuating one of the switching circuits, some certain resistors will be enabled so as to adjust the resistance value of the resistor selecting circuit. The resistor unit and the switching circuits are designed in such a manner that the resistor unit is able to compensate an equivalent resistance of the switching circuit which is actuated. As a result, the impedance of the whole impedance matching circuit is precisely matching with the adjusted resistance value of the resistor selecting circuit and will not be influenced by any variation of the input signals.

Abstract translation: 本发明公开了一种适用于IC芯片的阻抗匹配电路。 阻抗匹配电路包括电阻器单元，与电阻器单元连接的OP放大器电路，与OP放大器电路并联连接的反馈选择电路，以及与OP放大器电路和反馈选择电路连接的电阻器选择电路。 反馈选择电路还包括多个开关电路，用于使电阻选择电路中提供的一些电阻器能够实现。 通过选择并致动其中一个开关电路，将启用一些某些电阻器，以便调整电阻选择电路的电阻值。 电阻器单元和开关电路被设计成使得电阻器单元能够补偿被致动的开关电路的等效电阻。 结果，整个阻抗匹配电路的阻抗与电阻选择电路的调整电阻值精确匹配，不会受输入信号的任何变化的影响。

公开(公告)号：US08040268B2

公开(公告)日：2011-10-18

申请号：US12948775

申请日：2010-11-18

Applicant: Tzung-Hung Kang

Inventor： Tzung-Hung Kang

IPC: H03M1/36

CPC classification number: H03M1/367 ,  H03M1/1295 ,  H03M1/183 ,  H03M1/362

Abstract: A data readout system with non-uniform resolution has a pick up head for reading data stored in an optical disc and generating an analog signal, a reference voltage unit for producing a plurality of reference voltage levels, wherein voltage differences between two adjacent reference voltage levels are not all the same, a plurality of comparators for comparing the reference voltage levels with the analog signal and generating comparison results, and an encoder for encoding the comparison results into a digital signal.

Abstract translation: 具有不均匀分辨率的数据读出系统具有用于读取存储在光盘中的数据并产生模拟信号的拾取头，用于产生多个参考电压电平的参考电压单元，其中两个相邻参考电压电平之间的电压差 多个比较器，用于将参考电压电平与模拟信号进行比较并产生比较结果;以及编码器，用于将比较结果编码为数字信号。

公开(公告)号：US08031097B2

公开(公告)日：2011-10-04

申请号：US12760540

申请日：2010-04-14

Applicant: Wei-Hsuan Tu ,  Tzung-Hung Kang

Inventor： Wei-Hsuan Tu ,  Tzung-Hung Kang

IPC: H03M1/66

CPC classification number: H03M1/66

Abstract: A multiplying digital-to-analog converter includes an operational amplifier (OP-amp) operated under a first power supply voltage and a second power supply voltage; an OP-amp input switch block coupled to a common mode voltage for selectively coupling the common mode voltage to input nodes of the OP-amp, wherein the common mode voltage is substantially equal to the first power supply voltage; a capacitor block coupled to the OP-amp input switch block; a sampling switch block coupled to the input signal for selectively coupling the input signal to the capacitor block; a reference voltage switch block coupled to the capacitor block for selectively coupling the reference signal to the capacitor block; and a feedback switch block coupled between the capacitor block and output nodes of the OP-amp.

Abstract translation: 倍增的数/模转换器包括在第一电源电压和第二电源电压下操作的运算放大器（OP-amp）; 耦合到共模电压的OP-amp输入开关块，用于选择性地将共模电压耦合到OP-放大器的输入节点，其中共模电压基本上等于第一电源电压; 耦合到OP-amp输入开关块的电容器块; 耦合到所述输入信号的选择开关块，用于选择性地将所述输入信号耦合到所述电容器块; 耦合到电容器块的参考电压开关块，用于选择性地将参考信号耦合到电容器块; 以及耦合在电容器块和OP-amp的输出节点之间的反馈开关块。

公开(公告)号：US07924087B2

公开(公告)日：2011-04-12

申请号：US12123550

申请日：2008-05-20

Applicant: Wei-Hsuan Tu ,  Tzung-Hung Kang

Inventor： Wei-Hsuan Tu ,  Tzung-Hung Kang

IPC: G05F1/10

CPC classification number: H03K19/018528

Abstract: A reference buffer circuit with high driving capability is disclosed. In which, a buffering stage has a first NMOS transistor and a first PMOS transistor to provide high and low tracking voltages respectively based on a high input voltage and a low input voltage. A first driving stage is driven by the high and low tracking voltages to output a first high output voltage and a first low output voltage. A body of the first PMOS transistor is tied to a first bias voltage lower than a supply voltage for the buffering and first driving stages.

Abstract translation: 公开了具有高驱动能力的参考缓冲电路。 其中，缓冲级具有第一NMOS晶体管和第一PMOS晶体管，以分别基于高输入电压和低输入电压提供高和低跟踪电压。 第一驱动级由高和低跟踪电压驱动以输出第一高输出电压和第一低输出电压。 第一PMOS晶体管的主体被连接到低于用于缓冲和第一驱动级的电源电压的第一偏置电压。

公开(公告)号：US20090058491A1

公开(公告)日：2009-03-05

申请号：US12140329

申请日：2008-06-17

Applicant: Tzung-Hung Kang ,  Jong-Woei Chen

Inventor： Tzung-Hung Kang ,  Jong-Woei Chen

IPC: H03L5/00

CPC classification number: H03K19/018521

Abstract: A high-to-low level shifter is disclosed, comprising a high voltage unit and a low voltage unit. The high voltage unit receives an input signal from an input node. The high voltage unit outputs a first output signal to an output node when the high voltage unit receives a low-voltage-level input signal. The low voltage unit outputs a second output signal to the output node when the high voltage unit receives a high-voltage-level input signal.

Abstract translation: 公开了一种由高电压单元和低压单元组成的高电平到低电平的移位器。 高电压单元从输入节点接收输入信号。 当高电压单元接收低电压电平输入信号时，高压单元将第一输出信号输出到输出节点。 当高电压单元接收高电压电平输入信号时，低电压单元将第二输出信号输出到输出节点。

公开(公告)号：US20100194614A1

公开(公告)日：2010-08-05

申请号：US12760540

申请日：2010-04-14

Applicant: Wei-Hsuan Tu ,  Tzung-Hung Kang

Inventor： Wei-Hsuan Tu ,  Tzung-Hung Kang

IPC: H03M1/66

CPC classification number: H03M1/66

Abstract: A multiplying digital-to-analog converter includes an operational amplifier (OP-amp) operated under a first power supply voltage and a second power supply voltage; an OP-amp input switch block coupled to a common mode voltage for selectively coupling the common mode voltage to input nodes of the OP-amp, wherein the common mode voltage is substantially equal to the first power supply voltage; a capacitor block coupled to the OP-amp input switch block; a sampling switch block coupled to the input signal for selectively coupling the input signal to the capacitor block; a reference voltage switch block coupled to the capacitor block for selectively coupling the reference signal to the capacitor block; and a feedback switch block coupled between the capacitor block and output nodes of the OP-amp.

Abstract translation: 倍增的数/模转换器包括在第一电源电压和第二电源电压下操作的运算放大器（OP-amp）; 耦合到共模电压的OP-amp输入开关块，用于选择性地将共模电压耦合到OP-放大器的输入节点，其中共模电压基本上等于第一电源电压; 耦合到OP-amp输入开关块的电容器块; 耦合到所述输入信号的选择开关块，用于选择性地将所述输入信号耦合到所述电容器块; 耦合到电容器块的参考电压开关块，用于选择性地将参考信号耦合到电容器块; 以及耦合在电容器块和OP-amp的输出节点之间的反馈开关块。

公开(公告)号：US20090303092A1

公开(公告)日：2009-12-10

申请号：US12371938

申请日：2009-02-17

Applicant: Wi-Hsuan Tu ,  Tzung-Hung Kang

Inventor： Wi-Hsuan Tu ,  Tzung-Hung Kang

IPC: H03M1/14 ,  H03M1/12

CPC classification number: H03M1/1215 ,  H03M1/168 ,  H03M1/36

Abstract: An analog-to-digital (A/D) conversion device is provided and includes a first A/D conversion stage. The A/D conversion stage includes a first pre-amp unit, first and second latch units, and a first conversion unit. The first pre-amp unit amplifies the analog input data and outputs a first amplified data. The first and second latch units are enabled by first and second latch clock signals to latch the first and second amplified data and generate first and second latched data, respectively. The first pre-amp unit is reset between a time point when the first latch unit is enabled and a time point when the second latch unit is enabled. The first conversion unit receives the analog input data, and the first and second latched data and accordingly generates a first analog output data.

Abstract translation: 提供了模数（A / D）转换装置并包括第一A / D转换级。 A / D转换级包括第一前置放大器单元，第一和第二锁存单元以及第一转换单元。 第一个前置放大器单元放大模拟输入数据并输出第一个放大数据。 第一和第二锁存单元由第一和第二锁存时钟信号使能，以锁存第一和第二放大数据并分别产生第一和第二锁存数据。 第一预放大单元在第一锁存单元被使能的时间点和第二锁存单元被使能的时间点之间复位。 第一转换单元接收模拟输入数据以及第一和第二锁存数据，从而产生第一模拟输出数据。

公开(公告)号：US20080252508A1

公开(公告)日：2008-10-16

申请号：US12015473

申请日：2008-01-16

Applicant: Tzung-Hung Kang

Inventor： Tzung-Hung Kang

IPC: H03M1/34

CPC classification number: H03M1/367 ,  H03M1/1295 ,  H03M1/183 ,  H03M1/362

Abstract: A data readout system with non-uniform resolution has a pick up head for reading data stored in an optical disc and generating an analog signal, a reference voltage unit for producing a plurality of reference voltage levels, wherein voltage differences between two adjacent reference voltage levels are not all the same, a plurality of comparators for comparing the reference voltage levels with the analog signal and generating comparison results, and an encoder for encoding the comparison results into a digital signal.

Abstract translation: 具有不均匀分辨率的数据读出系统具有用于读取存储在光盘中的数据并产生模拟信号的拾取头，用于产生多个参考电压电平的参考电压单元，其中两个相邻参考电压电平之间的电压差 多个比较器，用于将参考电压电平与模拟信号进行比较并产生比较结果;以及编码器，用于将比较结果编码为数字信号。