公开(公告)号：US07945706B2

公开(公告)日：2011-05-17

申请号：US12128634

申请日：2008-05-29

Applicant: An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

Inventor： An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

IPC: G06F3/00 ,  G06F13/00

CPC classification number: H04N5/4401 ,  H04N5/46 ,  H04N5/765 ,  H04N21/42615 ,  H04N21/4305 ,  H04N21/436 ,  H04N21/4363

Abstract: The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.

Abstract translation: 本发明提供一种应用于多个数字视频/音频传输接口标准的信号接收电路。 信号接收电路至少包括用于接收输入信号的输入接口和至少一个接口电路。 输入接口包括一组共享输入端子，一组第一分离输入端子，用于接收与该组共享输入端子对应的第一传输规格的输入信号，以及一组用于接收输入信号的第二单独输入端子 对应于具有该组共享输入端的第二传输规范。 接口电路包括耦合到用于提供控制信号的输入接口的控制电路，以及耦合到输入接口和控制电路的处理模块，用于根据控制信号处理输入信号以产生输出信号。

公开(公告)号：US20100188574A1

公开(公告)日：2010-07-29

申请号：US12692389

申请日：2010-01-22

Applicant: Chia-Lung HUNG ,  Tzuo-Bo Lin ,  Hsien-Chun Chang ,  Yu-Pin Chou

Inventor： Chia-Lung HUNG ,  Tzuo-Bo Lin ,  Hsien-Chun Chang ,  Yu-Pin Chou

IPC: H04N9/64 ,  H04N5/04

CPC classification number: H04N7/0105 ,  H04N7/0132

Abstract: A device and method for controlling frame input and output are applied to the reception of image data from a source device and output of the image data to a destination device, the device includes a buffer, a buffer control circuit, and a frame write controller. The input pixel clock is not equal to the output pixel clock. The frame write controller generates a write permission signal according to the Input DE and the Output DE. The buffer control circuit generates a write control signal according to the Input DE and the write permission signal, and generates a read control signal according to the Output DE. The buffer receives the image data from the source device according to the write control signal and the input pixel clock, and outputs the image data to the destination device according to the read control signal and the output pixel clock.

Abstract translation: 用于控制帧输入和输出的装置和方法被应用于从源设备接收图像数据并将图像数据输出到目的地设备，该设备包括缓冲器，缓冲器控制电路和帧写入控制器。 输入像素时钟不等于输出像素时钟。 帧写入控制器根据输入DE和输出DE生成写许可信号。 缓冲器控制电路根据输入DE和写允许信号产生写控制信号，并根据输出DE生成读控制信号。 缓冲器根据写控制信号和输入像素时钟从源装置接收图像数据，并根据读控制信号和输出像素时钟将图像数据输出到目的地装置。

公开(公告)号：US08514206B2

公开(公告)日：2013-08-20

申请号：US12314601

申请日：2008-12-12

Applicant: Yu-Pin Chou ,  Tzuo-Bo Lin ,  Ming-Syun Wu

Inventor： Yu-Pin Chou ,  Tzuo-Bo Lin ,  Ming-Syun Wu

IPC: G09G5/00

CPC classification number: G09G5/006 ,  G09G5/005 ,  G09G2370/12

Abstract: A timing controller for a display processing device includes: a plurality of predetermined pins for receiving an image signal by a pin-share method, wherein the image signal is a first format image signal or a second format image signal; a detector coupled to the predetermined pins and for detecting at least one of the predetermined pins to determine whether the image signal is the first format image signal or the second format image signal and outputting a detection result; and a processor coupled to the detector and for processing the image signal according to the detection result to generate and output a timing control signal.

公开(公告)号：US20100014621A1

公开(公告)日：2010-01-21

申请号：US12501959

申请日：2009-07-13

Applicant: Tzuo-Bo Lin ,  Bing-Juo Chuang ,  Yu-Pin Chou

Inventor： Tzuo-Bo Lin ,  Bing-Juo Chuang ,  Yu-Pin Chou

IPC: H04L7/00

CPC classification number: H04L7/10 ,  G09G5/006 ,  G09G5/008 ,  G09G2370/12 ,  H04L7/046 ,  H04L25/4908

Abstract: A receiver includes; a recovery circuit for receiving an input signal, and generating a data signal and a recovery clock; a processing circuit for processing the data signal to generate a processed signal; and a synchronization determining circuit for determining a synchronization state of the recovery clock according to the processed signal and a first reference value. The data signal includes a synchronous pattern, and the first reference value corresponds to at least a portion of a value in the synchronous pattern processed by the processing circuit. A method of the receiver is also disclosed.

Abstract translation: 接收机包括 恢复电路，用于接收输入信号，并产生数据信号和恢复时钟; 处理电路，用于处理数据信号以产生处理的信号; 以及同步确定电路，用于根据处理的信号和第一参考值确定恢复时钟的同步状态。 数据信号包括同步模式，第一参考值对应于由处理电路处理的同步模式中的值的至少一部分。 还公开了接收机的方法。

公开(公告)号：US20090015722A1

公开(公告)日：2009-01-15

申请号：US12128634

申请日：2008-05-29

Applicant: An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

Inventor： An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

IPC: H04N5/44

CPC classification number: H04N5/4401 ,  H04N5/46 ,  H04N5/765 ,  H04N21/42615 ,  H04N21/4305 ,  H04N21/436 ,  H04N21/4363

Abstract: The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.

Abstract translation: 本发明提供一种应用于多个数字视频/音频传输接口标准的信号接收电路。 信号接收电路至少包括用于接收输入信号的输入接口和至少一个接口电路。 输入接口包括一组共享输入端子，一组第一分离输入端子，用于接收与该组共享输入端子对应的第一传输规格的输入信号，以及一组用于接收输入信号的第二单独输入端子 对应于具有该组共享输入端的第二传输规范。 接口电路包括耦合到用于提供控制信号的输入接口的控制电路，以及耦合到输入接口和控制电路的处理模块，用于根据控制信号处理输入信号以产生输出信号。

公开(公告)号：US20080298499A1

公开(公告)日：2008-12-04

申请号：US12129687

申请日：2008-05-30

Applicant: Tzuo-Bo Lin ,  Hong-Ta Liu

Inventor： Tzuo-Bo Lin ,  Hong-Ta Liu

IPC: H04L27/06 ,  H04L27/00 ,  H03D1/00

CPC classification number: G09G5/006 ,  G09G2370/04 ,  G09G2370/10 ,  G09G2370/12

Abstract: The present invention discloses a method for determining a target type of a plurality of control signals respectively transmitted via a plurality of channels in a multi-channel system. The method includes: receiving a plurality of first control signals simultaneously from the channels during a first time period; determining a control signal priority corresponding to the first time period according to a target type determined by actual types of a plurality of second control signals respectively transmitted via the channels during a second time period, wherein the second time period is prior to the first time period; and determining the target type of the first control signals according to the control signal priority and actual types of the first control signals.

Abstract translation: 本发明公开了一种用于确定在多声道系统中分别经由多个声道发送的多个控制信号的目标类型的方法。 该方法包括：在第一时段期间从信道同时接收多个第一控制信号; 根据在第二时间段期间经由信道分别发送的多个第二控制信号的实际类型确定的目标类型来确定对应于第一时间段的控制信号优先级，其中第二时间段在第一时间段之前 ; 以及根据控制信号优先级和第一控制信号的实际类型来确定第一控制信号的目标类型。

公开(公告)号：US08180932B2

公开(公告)日：2012-05-15

申请号：US12125075

申请日：2008-05-22

Applicant: An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

Inventor： An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

IPC: G06F3/00

CPC classification number: H04L25/0272 ,  H04L25/0262

Abstract: The present invention discloses a signal receiving method for determining a transmission format of an input signal and a related signal receiving circuit. The signal receiving method includes: receiving the input signal; generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and determining the transmission format of the input signal according to the signal detecting result. The signal receiving circuit includes: an input interface, for receiving an input signal; a detecting module, for generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and a determining unit, for determining the transmission format of the input signal according to the signal detecting result.

Abstract translation: 本发明公开了一种用于确定输入信号和相关信号接收电路的传输格式的信号接收方法。 信号接收方法包括：接收输入信号; 根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及根据信号检测结果确定输入信号的传输格式。 信号接收电路包括：输入接口，用于接收输入信号; 检测模块，用于根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及确定单元，用于根据信号检测结果确定输入信号的传输格式。

公开(公告)号：US20120056649A1

公开(公告)日：2012-03-08

申请号：US12876923

申请日：2010-09-07

Applicant: Tzuo-Bo Lin

Inventor： Tzuo-Bo Lin

IPC: H03B19/00

CPC classification number: H04L7/005

Abstract: A receiving method and apparatus is disclosed. The method comprising steps of: receiving a plurality of data according to a symbol clock signal, and reading out the plurality of data according to a first clock signal and generating a water level; receiving a second clock signal so as to generate a third clock signal, and adjusting the speed of the third clock signal according to the water level; determining a sampling frequency of the plurality of data according to a data amount of the plurality of data during a unit time period or parameters of the plurality of data; and dividing the third clock signal by a dividing value or multiplying the third clock signal by a multiplying value so as to obtain the first clock signal and adjust the water level by a clock generator.

Abstract translation: 公开了一种接收方法和装置。 该方法包括以下步骤：根据符号时钟信号接收多个数据，并根据第一时钟信号读出多个数据并产生一个水位; 接收第二时钟信号以产生第三时钟信号，并根据所述水位调节所述第三时钟信号的速度; 根据所述多个数据在单位时间段内的数据量或所述多个数据的参数，确定所述多个数据的采样频率; 并且将第三时钟信号除以分频值，或者将第三时钟信号乘以乘法值，以获得第一时钟信号，并通过时钟发生器调节水位。

公开(公告)号：US20080266454A1

公开(公告)日：2008-10-30

申请号：US12109868

申请日：2008-04-25

Applicant: Tzuo-Bo Lin ,  Wen-Hsia Kung ,  Hsien-Chun Chang

Inventor： Tzuo-Bo Lin ,  Wen-Hsia Kung ,  Hsien-Chun Chang

IPC: H03L7/00 ,  H04N5/04

CPC classification number: H04N5/04 ,  H03L7/06

Abstract: The invention discloses a sink device. The sink device comprises a buffering unit and a clock generating unit. The buffering unit receives a decoding data according to a symbol clock signal, reads the decoding data according to a pixel clock signal, and generates a water level value. The clock generating unit receives the symbol clock signal to generate the pixel clock signal and adjusts a rate of the pixel clock signal according to the water level value and/or a phase difference signal.

Abstract translation: 本发明公开了一种信宿设备。 宿设备包括缓冲单元和时钟发生单元。 缓冲单元根据符号时钟信号接收解码数据，根据像素时钟信号读取解码数据，并产生水位值。 时钟发生单元接收符号时钟信号以产生像素时钟信号，并根据水位值和/或相位差信号调整像素时钟信号的速率。

公开(公告)号：US20070050063A1

公开(公告)日：2007-03-01

申请号：US11511242

申请日：2006-08-29

Applicant: Hsu-Jung Tung ,  Tzuo-Bo Lin

Inventor： Hsu-Jung Tung ,  Tzuo-Bo Lin

IPC: G06F17/00

CPC classification number: G10L19/005

Abstract: An apparatus for processing an audio signal and method thereof applied to an audio playback system are disclosed. The apparatus comprises a decoder, an error-correcting circuit and an audio correcting module. The method for processing audio signals in accordance with the present invention decodes the audio signal to generate a decoded signal by the decoder. Then, the error-correcting circuit performs an error-correcting algorithm in the decoded signal to generate an error indication signal and an output audio signal. And the audio correcting module corrects the output audio signal to generate a corrected audio signal when the error indication signal indicates that the output audio signal has error.

Abstract translation: 公开了一种用于处理音频信号的装置及其应用于音频播放系统的方法。 该装置包括解码器，纠错电路和音频校正模块。 根据本发明的用于处理音频信号的方法解码音频信号以由解码器产生解码信号。 然后，纠错电路在解码信号中执行纠错算法，以产生错误指示信号和输出音频信号。 并且当错误指示信号指示输出音频信号具有错误时，音频校正模块校正输出音频信号以产生校正的音频信号。