公开(公告)号：US12159917B2

公开(公告)日：2024-12-03

申请号：US17320071

申请日：2021-05-13

Applicant: United Microelectronics Corp.

Inventor： Xiang Li ,  Ding Lung Chen ,  Changda Yao

IPC: H01L29/66 ,  H01L27/06

Abstract: A method of manufacturing a capacitor structure is provided, including the following steps. A substrate is provided. A first doped silicon material layer is formed on the substrate. A surface flattening process is performed on the first doped silicon material layer through a plasma treatment. An insulating material layer is formed on the first doped silicon material layer after the surface flattening process is performed. A second doped silicon material layer is formed on the insulating material layer. The first doped silicon material layer is patterned into a first electrode. The insulating material layer is patterned into an insulating layer. The second doped silicon material layer is patterned into a second electrode. The method of manufacturing the capacitor structure may be used to produce a capacitor with better reliability and may improve capacitance density.

公开(公告)号：US20220344492A1

公开(公告)日：2022-10-27

申请号：US17320071

申请日：2021-05-13

Applicant: United Microelectronics Corp.

Inventor： Xiang Li ,  Ding Lung Chen ,  Changda Yao

IPC: H01L29/66

Abstract: A method of manufacturing a capacitor structure is provided, including the following steps. A substrate is provided. A first doped silicon material layer is formed on the substrate. A surface flattening process is performed on the first doped silicon material layer through a plasma treatment. An insulating material layer is formed on the first doped silicon material layer after the surface flattening process is performed. A second doped silicon material layer is formed on the insulating material layer. The first doped silicon material layer is patterned into a first electrode. The insulating material layer is patterned into an insulating layer. The second doped silicon material layer is patterned into a second electrode. The method of manufacturing the capacitor structure may be used to produce a capacitor with better reliability and may improve capacitance density.

公开(公告)号：US10403743B2

公开(公告)日：2019-09-03

申请号：US15655881

申请日：2017-07-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Xiang Li ,  Shao-Hui Wu ,  Hsiao Yu Chia ,  Yu-Cheng Tung

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/465

Abstract: A manufacturing method of an oxide semiconductor device includes the following steps. A first oxide semiconductor layer is formed on a substrate. A gate insulation layer is formed on the first oxide semiconductor layer. A first flattening process is performed on a top surface of the first oxide semiconductor layer before the step of forming the gate insulation layer. A roughness of the top surface of the first oxide semiconductor layer after the first flattening process is smaller than the roughness of the top surface of the first oxide semiconductor layer before the first flattening process.

公开(公告)号：US20190109199A1

公开(公告)日：2019-04-11

申请号：US15725288

申请日：2017-10-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： HAI BIAO YAO ,  Shao-Hui Wu ,  Xiang Li ,  HSIAO YU CHIA ,  Yu-Cheng Tung

IPC: H01L29/49 ,  H01L21/225 ,  H01L21/02 ,  H01L29/786 ,  H01L29/04

Abstract: An oxide semiconductor device includes an oxide semiconductor channel layer, a first gate dielectric layer, a first gate electrode, a source electrode, and a drain electrode. The oxide semiconductor channel layer includes a channel region. The first gate dielectric layer is disposed on the oxide semiconductor channel layer. The first gate electrode is disposed on the first gate dielectric layer. The source electrode and the drain electrode are disposed at two opposite sides of the first gate electrode in a first direction respectively. The first gate electrode includes a metal material with a work function higher than 4.7 electron volts (eV). A thickness of the oxide semiconductor channel layer is smaller than one third of a length of the channel region in the first direction.

公开(公告)号：US20190081183A1

公开(公告)日：2019-03-14

申请号：US15784176

申请日：2017-10-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Xiang Li ,  Shao-Hui Wu ,  HSIAO YU CHIA ,  Yu-Cheng Tung

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/40 ,  H01L29/10 ,  H01L29/423

Abstract: An oxide semiconductor device includes a substrate, a first patterned oxide semiconductor channel layer, a second oxide semiconductor channel layer, a gate dielectric layer, and a gate electrode. The first patterned oxide semiconductor channel layer is disposed on the substrate. The second patterned oxide semiconductor channel layer is disposed on the first patterned oxide semiconductor channel layer and covers a side edge of the first patterned oxide semiconductor channel layer. The gate dielectric layer is disposed on the second patterned oxide semiconductor channel layer. A top surface of the second patterned oxide semiconductor channel layer is fully covered by the gate dielectric layer. The gate electrode is disposed on the gate dielectric layer. A projection area of the gate electrode in a thickness direction of the substrate is smaller than a projection area of the second patterned oxide semiconductor channel layer in the thickness direction.

公开(公告)号：US11239373B2

公开(公告)日：2022-02-01

申请号：US16942775

申请日：2020-07-30

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Xiang Li ,  Ding-Lung Chen

IPC: H01L29/786 ,  H01L29/66

Abstract: A semiconductor device includes a dielectric structure, a first source/drain electrode, a second source/drain electrode, an oxide semiconductor layer, a gate dielectric layer, and a first gate electrode. The first source/drain electrode is disposed in the dielectric structure. The oxide semiconductor layer is disposed on the first source/drain electrode in a vertical direction. The second source/drain electrode disposed on the oxide semiconductor layer in the vertical direction. The gate dielectric layer is disposed on the dielectric structure and surrounds the oxide semiconductor layer in a horizontal direction. The gate dielectric layer includes a first portion and a second portion. The first portion is elongated in the horizontal direction. The second portion is disposed on the first portion and elongated in the vertical direction. The first gate electrode is disposed on the first portion of the gate dielectric layer.

公开(公告)号：US20210399133A1

公开(公告)日：2021-12-23

申请号：US16942775

申请日：2020-07-30

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Xiang Li ,  Ding-Lung Chen

IPC: H01L29/786 ,  H01L29/66

Abstract: A semiconductor device includes a dielectric structure, a first source/drain electrode, a second source/drain electrode, an oxide semiconductor layer, a gate dielectric layer, and a first gate electrode. The first source/drain electrode is disposed in the dielectric structure. The oxide semiconductor layer is disposed on the first source/drain electrode in a vertical direction. The second source/drain electrode disposed on the oxide semiconductor layer in the vertical direction. The gate dielectric layer is disposed on the dielectric structure and surrounds the oxide semiconductor layer in a horizontal direction. The gate dielectric layer includes a first portion and a second portion. The first portion is elongated in the horizontal direction. The second portion is disposed on the first portion and elongated in the vertical direction. The first gate electrode is disposed on the first portion of the gate dielectric layer.

公开(公告)号：US20190027589A1

公开(公告)日：2019-01-24

申请号：US15655881

申请日：2017-07-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Xiang Li ,  Shao-Hui Wu ,  HSIAO YU CHIA ,  Yu-Cheng Tung

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/465

CPC classification number: H01L29/66969 ,  H01L21/465 ,  H01L29/7869

Abstract: A manufacturing method of an oxide semiconductor device includes the following steps. A first oxide semiconductor layer is formed on a substrate. A gate insulation layer is formed on the first oxide semiconductor layer. A first flattening process is performed on a top surface of the first oxide semiconductor layer before the step of forming the gate insulation layer. A roughness of the top surface of the first oxide semiconductor layer after the first flattening process is smaller than the roughness of the top surface of the first oxide semiconductor layer before the first flattening process.

公开(公告)号：US10446473B1

公开(公告)日：2019-10-15

申请号：US16250485

申请日：2019-01-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Xiang Li ,  Ding-Lung Chen ,  En-Feng Liu ,  Yu-Cheng Tung

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L29/40 ,  H01L23/48 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device and a method of forming the semiconductor device are provided. The semiconductor device includes a substrate, an interconnection structure, an oxide semiconductor (OS) transistor and a contact structure. The substrate has a first surface and a second surface opposite to the first surface. The interconnection structure is disposed on the first surface, and the oxide semiconductor (OS) transistor is disposed on the second surface. Also, the OS transistor includes a back gate disposed on the second surface of the substrate. The contact structure is formed between the OS transistor and the interconnection structure, and the contact structure is electrically connected to the back gate. The contact structure penetrates through the substrate for electrically connecting the interconnection structure to the OS transistor.

公开(公告)号：US10355019B1

公开(公告)日：2019-07-16

申请号：US16024906

申请日：2018-07-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Xiang Li ,  Ding-Lung Chen ,  Yu-Cheng Tung

IPC: H01L27/12 ,  H01L27/06 ,  H01L27/092 ,  H01L29/786 ,  H01L23/528 ,  H01L29/861

Abstract: A semiconductor device includes a substrate, a first transistor, a first diode structure, and a second diode structure. The first transistor is disposed on the substrate. The first transistor includes a first gate electrode, a first source electrode, and a first drain electrode. The first gate electrode is connected to the substrate by the first diode structure. The first drain electrode is connected to the substrate by the second diode structure. The first diode structure and the second diode structure may be used to improve potential unbalance in the transistor, and operation performance and reliability of the semiconductor device may be enhanced accordingly.