-
公开(公告)号：US20240421124A1
公开(公告)日：2024-12-19
申请号：US18476279
申请日：2023-09-27
Applicant: VIA Technologies, Inc.
Inventor： Wen-Yuan Chang , Wei-Cheng Chen , Chen-Yueh Kung
IPC: H01L25/065 , H01L23/00 , H01L23/498 , H01L23/538
Abstract: A manufacturing method of an electronic package includes the following steps. Multiple chips and a base dielectric layer are provided. A back surface of each chip is fixed to a back surface temporary carrier via a back surface temporary bonding layer. A base dielectric layer surrounds each chip and covers the back surface temporary bonding layer. A material of the base dielectric layer includes a silicate composite material. At least one bridge element is installed on the adjacent chips. An intermediate dielectric layer covering the base dielectric layer, the chips, and the bridge element is formed. Multiple intermediate conductive vias and a redistribution structure are respectively formed on the chips and the intermediate dielectric layer. Multiple conductive bumps are formed on the redistribution structure. The back surface temporary bonding layer and the back surface temporary carrier are removed. An electronic package produced by the manufacturing method is also provided.
-
公开(公告)号：US10459007B2
公开(公告)日：2019-10-29
申请号：US16221611
申请日：2018-12-17
Applicant: VIA Technologies, Inc.
Inventor： Chen-Yueh Kung , Wen-Yuan Chang , Wei-Cheng Chen
Abstract: A probe card including a circuit board, a transformer, a probe head, and a reinforcement structure is provided. The transformer including a body, a plurality of solder balls, and a plurality of first contact points are disposed on the substrate. The body has a first surface and a second surface, wherein the first surface is located between the circuit board and the second surface. The solder balls are disposed on the first surface, and the first contact points are disposed on the second surface. The probe head is disposed on the second surface. The probe head is electrically connected to the circuit board by the first solder balls. The reinforcement structure is disposed between the probe head and the circuit board.
-
公开(公告)号：US20190120875A1
公开(公告)日：2019-04-25
申请号：US16221611
申请日：2018-12-17
Applicant: VIA Technologies, Inc.
Inventor： Chen-Yueh Kung , Wen-Yuan Chang , Wei-Cheng Chen
IPC: G01R1/073
CPC classification number: G01R1/07314 , G01R1/07378
Abstract: A probe card including a circuit board, a transformer, a probe head, and a reinforcement structure is provided. The transformer including a body, a plurality of solder balls, and a plurality of first contact points are disposed on the substrate. The body has a first surface and a second surface, wherein the first surface is located between the circuit board and the second surface. The solder balls are disposed on the first surface, and the first contact points are disposed on the second surface. The probe head is disposed on the second surface. The probe head is electrically connected to the circuit board by the first solder balls. The reinforcement structure is disposed between the probe head and the circuit board.
-
公开(公告)号：US10184956B2
公开(公告)日：2019-01-22
申请号：US15984420
申请日：2018-05-21
Applicant: VIA Technologies, Inc.
Inventor： Chen-Yueh Kung , Wen-Yuan Chang , Wei-Cheng Chen
Abstract: A probe card including a circuit board, a transformer, a probe head, and a reinforcement structure is provided. The transformer including a body, a plurality of solder balls, and a plurality of first contact points are disposed on the substrate. The body has a first surface and a second surface, wherein the first surface is located between the circuit board and the second surface. The solder balls are disposed on the first surface, and the first contact points are disposed on the second surface. The probe head is disposed on the second surface. The probe head is electrically connected to the circuit board by the first solder balls. The reinforcement structure is disposed between the probe head and the circuit board.
-
Patent Agency Ranking
公开(公告)号：US20150123690A1
公开(公告)日：2015-05-07
申请号：US14149822
申请日：2014-01-08
Applicant: VIA Technologies, Inc.
Inventor： Chen-Yueh Kung , Wen-Yuan Chang , Wei-Cheng Chen
CPC classification number: G01R1/07314 , G01R1/07378
Abstract: A probe card including a circuit board, a transformer, a probe head, and a reinforcement structure is provided. The transformer including a body, a plurality of solder balls, and a plurality of first contact points are disposed on the substrate. The body has a first surface and a second surface, wherein the first surface is located between the circuit board and the second surface. The solder balls are disposed on the first surface, and the first contact points are disposed on the second surface. The probe head is disposed on the second surface. The probe head is electrically connected to the circuit board by the first solder balls. The reinforcement structure is disposed between the probe head and the circuit board.
Abstract translation: 提供了包括电路板，变压器，探针头和加强结构的探针卡。 包括主体，多个焊球和多个第一接触点的变压器设置在基板上。 主体具有第一表面和第二表面，其中第一表面位于电路板和第二表面之间。 焊球设置在第一表面上，并且第一接触点设置在第二表面上。 探针头设置在第二表面上。 探针头通过第一焊球与电路板电连接。 加强结构设置在探针头和电路板之间。
-
公开(公告)号：US20240421096A1
公开(公告)日：2024-12-19
申请号：US18476281
申请日：2023-09-27
Applicant: VIA Technologies, Inc.
Inventor： Wen-Yuan Chang , Wei-Cheng Chen , Chen-Yueh Kung
IPC: H01L23/538 , H01L23/00 , H01L25/065
Abstract: A manufacturing method of an electronic package includes the following steps. Multiple chips are temporarily fixed to a temporary carrier. At least one bridge element is installed on the adjacent chips. A base dielectric layer covering a temporary bonding layer, the chips, and the bridge element is formed. A material of the base dielectric layer includes a silicate composite material. Multiple base conductive vias and a redistribution structure are respectively formed on the chips and the base dielectric layer. Multiple conductive bumps are formed on the redistribution structure. In addition, an electronic package is also provided, which may be produced by the manufacturing method.
-
公开(公告)号：US20180267084A1
公开(公告)日：2018-09-20
申请号：US15984420
申请日：2018-05-21
Applicant: VIA Technologies, Inc.
Inventor： Chen-Yueh Kung , Wen-Yuan Chang , Wei-Cheng Chen
IPC: G01R1/073
CPC classification number: G01R1/07314 , G01R1/07378
Abstract: A probe card including a circuit board, a transformer, a probe head, and a reinforcement structure is provided. The transformer including a body, a plurality of solder balls, and a plurality of first contact points are disposed on the substrate. The body has a first surface and a second surface, wherein the first surface is located between the circuit board and the second surface. The solder balls are disposed on the first surface, and the first contact points are disposed on the second surface. The probe head is disposed on the second surface. The probe head is electrically connected to the circuit board by the first solder balls. The reinforcement structure is disposed between the probe head and the circuit board.
-
公开(公告)号：US10119995B2
公开(公告)日：2018-11-06
申请号：US14149822
申请日：2014-01-08
Applicant: VIA Technologies, Inc.
Inventor： Chen-Yueh Kung , Wen-Yuan Chang , Wei-Cheng Chen
Abstract: A probe card including a circuit board, a transformer, a probe head, and a reinforcement structure is provided. The transformer including a body, a plurality of solder balls, and a plurality of first contact points are disposed on the substrate. The body has a first surface and a second surface, wherein the first surface is located between the circuit board and the second surface. The solder balls are disposed on the first surface, and the first contact points are disposed on the second surface. The probe head is disposed on the second surface. The probe head is electrically connected to the circuit board by the first solder balls. The reinforcement structure is disposed between the probe head and the circuit board.
-
公开(公告)号：US20130025926A1
公开(公告)日：2013-01-31
申请号：US13644667
申请日：2012-10-04
Applicant: VIA Technologies, Inc.
Inventor： Chen-Yueh Kung , Wei-Cheng Chen
IPC: H05K1/11
CPC classification number: H05K3/4007 , H05K3/0035 , H05K3/108 , H05K3/421 , H05K2201/0367 , H05K2201/0376 , H05K2201/09436 , H05K2201/09545 , H05K2203/308 , Y10T29/49117 , Y10T29/49124 , Y10T29/49155 , Y10T29/49165
Abstract: A circuit substrate having a base layer, a patterned conductive layer, a dielectric layer and a conductive block is provided. The patterned conductive layer is disposed on the base layer and having an inner pad. The dielectric layer is disposed on the base layer and covering the patterned conductive layer. The conductive block penetrates the dielectric layer, the conductive block being substantially coplanar with the dielectric layer and connecting the inner pad.
Abstract translation: 提供具有基底层，图案化导电层，电介质层和导电块的电路基板。 图案化导电层设置在基底层上并具有内部衬垫。 电介质层设置在基底层上并覆盖图案化的导电层。 导电块穿透电介质层，导电块基本上与电介质层共面并连接内焊盘。
-
-
-
-
-
-
-
-
Search Results
9
records
(took 0.028 seconds)
