公开(公告)号：US08114752B2

公开(公告)日：2012-02-14

申请号：US12701521

申请日：2010-02-06

申请人： Victor Chiang Liang ,  Chien-Kuo Yang ,  Hua-Chou Tseng ,  Chun-Yao Ko ,  Cheng-Wen Fan ,  Yu-Ho Chiang ,  Chih-Yuh Tzeng

发明人： Victor Chiang Liang ,  Chien-Kuo Yang ,  Hua-Chou Tseng ,  Chun-Yao Ko ,  Cheng-Wen Fan ,  Yu-Ho Chiang ,  Chih-Yuh Tzeng

IPC分类号： H01L21/20

CPC分类号： H01L28/91 ,  H01L23/5223 ,  H01L28/87 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure of a capacitor set is described, including at least two capacitors that are disposed at the same position on a substrate and include a first capacitor and a second capacitor. The first capacitor includes multiple first capacitor units electrically connected with each other in parallel. The second capacitor includes multiple second capacitor units electrically connected with each other in parallel. The first and the second capacitor units are arranged spatially intermixing with each other to form an array.

摘要翻译： 描述了电容器组的结构，其包括设置在基板上的相同位置处的至少两个电容器，并且包括第一电容器和第二电容器。 第一电容器包括并联电连接的多个第一电容器单元。 第二电容器包括并联电连接的多个第二电容器单元。 第一和第二电容器单元彼此空间上相互混合以形成阵列。

公开(公告)号：US20100140741A1

公开(公告)日：2010-06-10

申请号：US12701521

申请日：2010-02-06

申请人： Victor Chiang Liang ,  Chien-Kuo Yang ,  Hua-Chou Tseng ,  Chun-Yao Ko ,  Cheng-Wen Fan ,  Yu-Ho Chiang ,  Chih-Yuh Tzeng

发明人： Victor Chiang Liang ,  Chien-Kuo Yang ,  Hua-Chou Tseng ,  Chun-Yao Ko ,  Cheng-Wen Fan ,  Yu-Ho Chiang ,  Chih-Yuh Tzeng

IPC分类号： H01L29/92

CPC分类号： H01L28/91 ,  H01L23/5223 ,  H01L28/87 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure of a capacitor set is described, including at least two capacitors that are disposed at the same position on a substrate and include a first capacitor and a second capacitor. The first capacitor includes multiple first capacitor units electrically connected with each other in parallel. The second capacitor includes multiple second capacitor units electrically connected with each other in parallel. The first and the second capacitor units are arranged spatially intermixing with each other to form an array.

摘要翻译： 描述了电容器组的结构，其包括设置在基板上的相同位置处的至少两个电容器，并且包括第一电容器和第二电容器。 第一电容器包括并联电连接的多个第一电容器单元。 第二电容器包括并联电连接的多个第二电容器单元。 第一和第二电容器单元彼此空间上相互混合以形成阵列。

公开(公告)号：US20080012092A1

公开(公告)日：2008-01-17

申请号：US11309164

申请日：2006-07-04

申请人： Victor-Chiang Liang ,  Chien-Kuo Yang ,  Hua-Chou Tseng ,  Chun-Yao Ko ,  Cheng-Wen Fan ,  Yu-Ho Chiang ,  Chih-Yuh Tzeng

发明人： Victor-Chiang Liang ,  Chien-Kuo Yang ,  Hua-Chou Tseng ,  Chun-Yao Ko ,  Cheng-Wen Fan ,  Yu-Ho Chiang ,  Chih-Yuh Tzeng

IPC分类号： H01L29/00

CPC分类号： H01L28/91 ,  H01L23/5223 ,  H01L28/87 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure of a capacitor set is described, including at least two capacitors that are disposed at the same position on a substrate and include a first capacitor and a second capacitor. The first capacitor includes multiple first capacitor units electrically connected with each other in parallel. The second capacitor includes multiple second capacitor units electrically connected with each other in parallel. The first and the second capacitor units are arranged spatially intermixing with each other to form an array.

摘要翻译： 描述了电容器组的结构，其包括设置在基板上的相同位置处的至少两个电容器，并且包括第一电容器和第二电容器。 第一电容器包括并联电连接的多个第一电容器单元。 第二电容器包括并联电连接的多个第二电容器单元。 第一和第二电容器单元彼此空间上相互混合以形成阵列。

公开(公告)号：US08133792B2

公开(公告)日：2012-03-13

申请号：US11309164

申请日：2006-07-04

申请人： Victor-Chiang Liang ,  Chien-Kuo Yang ,  Hua-Chou Tseng ,  Chun-Yao Ko ,  Cheng-Wen Fan ,  Yu-Ho Chiang ,  Chih-Yuh Tzeng

发明人： Victor-Chiang Liang ,  Chien-Kuo Yang ,  Hua-Chou Tseng ,  Chun-Yao Ko ,  Cheng-Wen Fan ,  Yu-Ho Chiang ,  Chih-Yuh Tzeng

IPC分类号： H01L21/20

CPC分类号： H01L28/91 ,  H01L23/5223 ,  H01L28/87 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure of a capacitor set is described, including at least two capacitors that are disposed at the same position on a substrate and include a first capacitor and a second capacitor. The first capacitor includes multiple first capacitor units electrically connected with each other in parallel. The second capacitor includes multiple second capacitor units electrically connected with each other in parallel. The first and the second capacitor units are arranged spatially intermixing with each other to form an array.

摘要翻译： 描述了电容器组的结构，其包括设置在基板上的相同位置处的至少两个电容器，并且包括第一电容器和第二电容器。 第一电容器包括并联电连接的多个第一电容器单元。 第二电容器包括并联电连接的多个第二电容器单元。 第一和第二电容器单元彼此空间上相互混合以形成阵列。

公开(公告)号：US20130092991A1

公开(公告)日：2013-04-18

申请号：US13273505

申请日：2011-10-14

申请人： Ta-Chuan Liao ,  Chien-Kuo Yang ,  Ying-Kit Tsui ,  Shih-Hsien Chen ,  Liang-Tai Kuo ,  Chun-Yao Ko

发明人： Ta-Chuan Liao ,  Chien-Kuo Yang ,  Ying-Kit Tsui ,  Shih-Hsien Chen ,  Liang-Tai Kuo ,  Chun-Yao Ko

IPC分类号： H01L27/108 ,  H01L21/336

CPC分类号： H01L27/1156 ,  H01L21/265 ,  H01L21/28273 ,  H01L27/11558 ,  H01L28/60 ,  H01L29/788 ,  H01L29/7881

摘要： The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode.

公开(公告)号：US07879639B2

公开(公告)日：2011-02-01

申请号：US11735226

申请日：2007-04-13

申请人： Chun-Yao Ko ,  Chung-Wei Chang ,  Han-Chi Liu ,  Shou-Gwo Wuu

发明人： Chun-Yao Ko ,  Chung-Wei Chang ,  Han-Chi Liu ,  Shou-Gwo Wuu

IPC分类号： H01L21/00

CPC分类号： H01L27/14689 ,  H01L27/14609

摘要： A method to fabricate an image sensor includes providing a semiconductor substrate having a pixel area and a logic area, forming a light sensing element in the pixel area, and forming a first transistor in the pixel area and a second transistor in the logic area. The step of forming the first transistor in the pixel area and the second transistor in the logic area includes performing a first implant process in the pixel area and the logic area, performing a second implant process in the pixel area and the logic area, and performing a third implant process only in the logic area.

摘要翻译： 制造图像传感器的方法包括提供具有像素区域和逻辑区域的半导体衬底，在像素区域中形成光感测元件，以及在像素区域中形成第一晶体管和在逻辑区域中形成第二晶体管。 在逻辑区域中的像素区域和第二晶体管中形成第一晶体管的步骤包括在像素区域和逻辑区域中执行第一注入处理，在像素区域和逻辑区域中执行第二注入处理，以及执行 仅在逻辑区域中进行第三次植入过程。

公开(公告)号：US07732844B2

公开(公告)日：2010-06-08

申请号：US11682350

申请日：2007-03-06

申请人： Chung-Wei Chang ,  Han-Chi Liu ,  Chun-Yao Ko ,  Shou-Gwo Wuu

发明人： Chung-Wei Chang ,  Han-Chi Liu ,  Chun-Yao Ko ,  Shou-Gwo Wuu

IPC分类号： H01L31/062

CPC分类号： H01L27/1463 ,  H01L21/761 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14689 ,  H01L31/035272

摘要： The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate having a first type of dopant; a semiconductor layer having a second type of dopant different from the first type of dopant and disposed on the semiconductor substrate; and an image sensor formed in the semiconductor layer.

摘要翻译： 本公开提供了一种图像传感器半导体器件。 半导体器件包括具有第一类掺杂剂的半导体衬底; 半导体层，其具有不同于所述第一类型掺杂剂的第二类型的掺杂剂并且设置在所述半导体衬底上; 以及形成在半导体层中的图像传感器。

公开(公告)号：US20080251821A1

公开(公告)日：2008-10-16

申请号：US11735226

申请日：2007-04-13

申请人： Chun-Yao Ko ,  Chung-Wei Chang ,  Han-Chi Liu ,  Shou-Gwo Wuu

发明人： Chun-Yao Ko ,  Chung-Wei Chang ,  Han-Chi Liu ,  Shou-Gwo Wuu

IPC分类号： H01L31/062 ,  H01L21/00

CPC分类号： H01L27/14689 ,  H01L27/14609

摘要： A method to fabricate an image sensor includes providing a semiconductor substrate having a pixel area and a logic area, forming a light sensing element in the pixel area, and forming a first transistor in the pixel area and a second transistor in the logic area. The step of forming the first transistor in the pixel area and the second transistor in the logic area includes performing a first implant process in the pixel area and the logic area, performing a second implant process in the pixel area and the logic area, and performing a third implant process only in the logic area.

摘要翻译： 制造图像传感器的方法包括提供具有像素区域和逻辑区域的半导体衬底，在像素区域中形成光感测元件，以及在像素区域中形成第一晶体管和在逻辑区域中形成第二晶体管。 在逻辑区域中的像素区域和第二晶体管中形成第一晶体管的步骤包括在像素区域和逻辑区域中执行第一注入处理，在像素区域和逻辑区域中执行第二注入处理，以及执行 仅在逻辑区域中进行第三次植入过程。

公开(公告)号：US20100221865A1

公开(公告)日：2010-09-02

申请号：US12780625

申请日：2010-05-14

申请人： Chung-Wei Chang ,  Han-Chi Liu ,  Chun-Yao Ko ,  Shou-Gwo Wuu

发明人： Chung-Wei Chang ,  Han-Chi Liu ,  Chun-Yao Ko ,  Shou-Gwo Wuu

IPC分类号： H01L31/18

CPC分类号： H01L27/1463 ,  H01L21/761 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14689 ,  H01L31/035272

摘要： The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate having a first type of dopant; a semiconductor layer having a second type of dopant different from the first type of dopant and disposed on the semiconductor substrate; and an image sensor formed in the semiconductor layer.

摘要翻译： 本公开提供了一种图像传感器半导体器件。 半导体器件包括具有第一类掺杂剂的半导体衬底; 半导体层，其具有不同于所述第一类型掺杂剂的第二类型的掺杂剂并且设置在所述半导体衬底上; 以及形成在半导体层中的图像传感器。

公开(公告)号：US07388187B1

公开(公告)日：2008-06-17

申请号：US11682428

申请日：2007-03-06

申请人： Han-Chi Liu ,  Chung-Wei Chang ,  Shou-Gwo Wuu ,  Tong-Chern Ong ,  Chun-Yao Ko

发明人： Han-Chi Liu ,  Chung-Wei Chang ,  Shou-Gwo Wuu ,  Tong-Chern Ong ,  Chun-Yao Ko

IPC分类号： H01L31/00

CPC分类号： H01L27/14654 ,  H01L27/1463

摘要： An image sensor device includes a semiconductor substrate having a first type of conductivity, a semiconductor layer having the first type of conductivity formed on the semiconductor substrate, and pixels formed in the semiconductor layer. The semiconductor layer includes a first deep well having the first type of conductivity and substantially underlying the plurality of pixels, and a second deep well having a second type of conductivity different from the first type of conductivity and substantially underlying the first deep well.

摘要翻译： 图像传感器装置包括具有第一导电类型的半导体衬底，在半导体衬底上形成具有第一类型导电性的半导体层和形成在半导体层中的像素。 半导体层包括具有第一类型导电性并且基本上位于多个像素下面的第一深阱，以及具有不同于第一类型导电性的第二类型导电性并且基本上位于第一深阱的第二深阱。