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    Program window adjust for memory cell signal line delay
    2.
    发明授权
    Program window adjust for memory cell signal line delay 有权
    程序窗口调整存储单元信号线延迟

    公开(公告)号：US08023334B2

    公开(公告)日：2011-09-20

    申请号：US12262405

    申请日：2008-10-31

    申请人： Jung-Sheng Hoei ,  Jonathan Pabustan ,  Vishal Sarin ,  William H. Radke ,  Frankie F. Roohparvar

    发明人： Jung-Sheng Hoei ,  Jonathan Pabustan ,  Vishal Sarin ,  William H. Radke ,  Frankie F. Roohparvar

    IPC分类号： G11C16/04

    CPC分类号： G11C16/26 ,  G11C5/063 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10

    摘要： A memory device and programming and/or reading process is described that compensates for memory cell signal line propagation delays, such as to increase the overall threshold voltage range and non-volatile memory cell states available. Memory cell signal line propagation delay compensation can be accomplished by characterizing the memory cell signal line propagation delay, such as determining an amount of error due to the delay, and pre-compensating the programmed threshold voltage of the memory cells based on the amount of error induced by the memory cell signal line propagation delay and cell location on the selected memory cell signal line. Alternatively, memory cell signal line propagation delay can be post-compensated for, or the pre-compensation fine tuned, after sensing the threshold voltages of the selected memory cells based on the amount of error induced by the memory cell signal line propagation delay and cell location on the selected memory cell signal line. Other methods, devices, etc., are also disclosed.

    摘要翻译： 描述了补偿存储器单元信号线传播延迟的存储器件和编程和/或读取过程，例如增加总体阈值电压范围和可用的非易失性存储器单元状态。 可以通过表征存储单元信号线传播延迟来实现存储单元信号线传播延迟补偿，例如确定由于延迟引起的误差量，并且基于误差量预先补偿存储器单元的编程阈值电压 由所选存储单元信号线上的存储单元信号线传播延迟和单元位置引起。 或者，可以基于由存储器单元信号线传播延迟和单元引起的误差量感测所选择的存储器单元的阈值电压之后，对存储单元信号线传播延迟进行后补偿或预补偿微调 所选存储单元信号线上的位置。 还公开了其他方法，装置等。

    PROGRAM WINDOW ADJUST FOR MEMORY CELL SIGNAL LINE DELAY
    3.
    发明申请
    PROGRAM WINDOW ADJUST FOR MEMORY CELL SIGNAL LINE DELAY 有权
    程序窗口调整记忆体信号线延迟

    公开(公告)号：US20100110798A1

    公开(公告)日：2010-05-06

    申请号：US12262405

    申请日：2008-10-31

    申请人： Jung-Sheng Hoei ,  Jonathan Pabustan ,  Vishal Sarin ,  William H. Radke ,  Frankie F. Roohparvar

    发明人： Jung-Sheng Hoei ,  Jonathan Pabustan ,  Vishal Sarin ,  William H. Radke ,  Frankie F. Roohparvar

    IPC分类号： G11C16/10

    CPC分类号： G11C16/26 ,  G11C5/063 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10

    摘要： A memory device and programming and/or reading process is described that compensates for memory cell signal line propagation delays, such as to increase the overall threshold voltage range and non-volatile memory cell states available. Memory cell signal line propagation delay compensation can be accomplished by characterizing the memory cell signal line propagation delay, such as determining an amount of error due to the delay, and pre-compensating the programmed threshold voltage of the memory cells based on the amount of error induced by the memory cell signal line propagation delay and cell location on the selected memory cell signal line. Alternatively, memory cell signal line propagation delay can be post-compensated for, or the pre-compensation fine tuned, after sensing the threshold voltages of the selected memory cells based on the amount of error induced by the memory cell signal line propagation delay and cell location on the selected memory cell signal line. Other methods, devices, etc., are also disclosed.

    摘要翻译： 描述了补偿存储器单元信号线传播延迟的存储器件和编程和/或读取过程，例如增加总体阈值电压范围和可用的非易失性存储器单元状态。 可以通过表征存储单元信号线传播延迟来实现存储单元信号线传播延迟补偿，例如确定由于延迟引起的误差量，并且基于误差量预先补偿存储器单元的编程阈值电压 由所选存储单元信号线上的存储单元信号线传播延迟和单元位置引起。 或者，可以基于由存储器单元信号线传播延迟和单元引起的误差量感测所选择的存储器单元的阈值电压之后，对存储单元信号线传播延迟进行后补偿或预补偿微调 所选存储单元信号线上的位置。 还公开了其他方法，装置等。

    MEMORY DEVICE PROGRAM WINDOW ADJUSTMENT
    4.
    发明申请
    MEMORY DEVICE PROGRAM WINDOW ADJUSTMENT 有权
    内存设备程序窗口调整

    公开(公告)号：US20120331217A1

    公开(公告)日：2012-12-27

    申请号：US13606471

    申请日：2012-09-07

    申请人： Vishal Sarin ,  Frankie F. Roohparvar ,  Jonathan Pabustan ,  Jung-Sheng Hoei

    发明人： Vishal Sarin ,  Frankie F. Roohparvar ,  Jonathan Pabustan ,  Jung-Sheng Hoei

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0246 ,  G06F2212/7211

    摘要： In one or more embodiments, a memory device has an adjustable programming window with a plurality of programmable levels. The programming window is moved to compensate for changes in reliable program and erase thresholds achievable as the memory device experiences factors such as erase/program cycles that change the program window. The initial programming window is determined prior to an initial erase/program cycle. The programming levels are then moved as the programming window changes, such that the plurality of programmable levels still remain within the program window and are tracked with the program window changes.

    摘要翻译： 在一个或多个实施例中，存储器设备具有具有多个可编程电平的可调编程窗口。 移动编程窗口以补偿由于存储器件经历改变程序窗口的擦除/编程周期等因素而可实现的可靠程序和擦除阈值的变化。 在初始擦除/编程周期之前确定初始编程窗口。 然后随着编程窗口的改变，编程级别被移动，使得多个可编程级别仍然保留在程序窗口内并且随着程序窗口的改变而跟踪。

    MEMORY DEVICE PROGRAM WINDOW ADJUSTMENT
    5.
    发明申请
    MEMORY DEVICE PROGRAM WINDOW ADJUSTMENT 有权
    内存设备程序窗口调整

    公开(公告)号：US20120117313A1

    公开(公告)日：2012-05-10

    申请号：US13351525

    申请日：2012-01-17

    申请人： Vishal SARIN ,  Frankie F. Roohparvar ,  Jonathan Pabustan ,  Jung-Sheng Hoei

    发明人： Vishal SARIN ,  Frankie F. Roohparvar ,  Jonathan Pabustan ,  Jung-Sheng Hoei

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0246 ,  G06F2212/7211

    摘要： In one or more embodiments, a memory device is disclosed as having an adjustable programming window having a plurality of programmable levels. The programming window is moved to compensate for changes in reliable program and erase thresholds achievable as the memory device experiences factors such as erase/program cycles that change the program window. The initial programming window is determined prior to an initial erase/program cycle. The programming levels are then moved as the programming window changes, such that the plurality of programmable levels still remain within the program window and are tracked with the program window changes.

    摘要翻译： 在一个或多个实施例中，公开了存储器件具有可编程窗口，其具有多个可编程级。 移动编程窗口以补偿由于存储器件经历改变程序窗口的擦除/编程周期等因素而可实现的可靠程序和擦除阈值的变化。 在初始擦除/编程周期之前确定初始编程窗口。 然后随着编程窗口的改变，编程级别被移动，使得多个可编程级别仍然保留在程序窗口内并且随着程序窗口的改变而跟踪。

    M+L bit read column architecture for M bit memory cells
    10.
    发明授权
    M+L bit read column architecture for M bit memory cells 有权
    用于M位存储单元的M + L位读取列结构

    公开(公告)号：US07843725B2

    公开(公告)日：2010-11-30

    申请号：US12137171

    申请日：2008-06-11

    申请人： Vishal Sarin ,  Jung-Sheng Hoei ,  Jonathan Pabustan ,  Frankie F. Roohparvar

    发明人： Vishal Sarin ,  Jung-Sheng Hoei ,  Jonathan Pabustan ,  Frankie F. Roohparvar

    IPC分类号： G11C16/04

    CPC分类号： G11C11/5642 ,  G11C7/16 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C27/005 ,  G11C2211/5621 ,  G11C2211/5622 ,  G11C2211/5642 ,  G11C2216/14

    摘要： A memory device and programming and/or reading process is described that programs a row of non-volatile multi-level memory cells (MLC) in a single program operation to minimize disturb within the pages of the row, while verifying each memory cell page of the row separately. In one embodiment of the present invention, the memory device utilizes data latches to program M-bits of data into each cell of the row and then repurposes the data latches during the subsequent page verify operations to read M+L bits from each cell of the selected page at a higher threshold voltage resolution than required. In sensing, the increased threshold voltage resolution/granularity allows interpretations of the actual programmed state of the memory cell and enables more effective use of data encoding and decoding techniques such as convolutional codes where additional granularity of information is used to make soft decisions reducing the overall memory error rate.

    摘要翻译： 描述了存储器件和编程和/或读取过程，其在单个程序操作中编程一行非易失性多级存储器单元（MLC），以最小化行的页面内的干扰，同时验证每个存储单元页面的 行分开。 在本发明的一个实施例中，存储器件利用数据锁存器将M位数据编程到该行的每个单元中，然后在随后的页验证操作期间对数据锁存器进行再调用，以从该存储器的每个单元读取M + L位 选择页面的阈值电压分辨率高于所需要的。 在感测中，增加的阈值电压分辨率/粒度允许对存储器单元的实际编程状态的解释，并且能够更有效地使用数据编码和解码技术，例如卷积码，其中使用附加粒度信息来做出软判决，从而减少整体 内存错误率。