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    Differential interconnection circuits in programmable logic devices
    1.
    发明授权
    Differential interconnection circuits in programmable logic devices 有权
    可编程逻辑器件中的差分互连电路

    公开(公告)号：US06515508B1

    公开(公告)日：2003-02-04

    申请号：US09853439

    申请日：2001-05-10

    申请人： Wanli Chang ,  Andy Lee ,  Cameron McClintock ,  Richard Cliff ,  Richard Yen-Hsiang Chang

    发明人： Wanli Chang ,  Andy Lee ,  Cameron McClintock ,  Richard Cliff ,  Richard Yen-Hsiang Chang

    IPC分类号： H03K19177

    CPC分类号： H03K19/17736 ,  H03K5/151 ,  H03K19/01721 ,  H03K19/17784

    摘要： At least some of the interconnection signaling on a programmable logic device (“PLD”) is by differential signaling using differential driver circuitry to apply differential signals to a pair of conductors that extend to differential receiver circuitry. Such differential interconnection signaling helps the PLD operate satisfactorily with lower power supply voltages. The conductors in each differential signaling pair may cross over one another at various intervals in order to help reduce the adverse effects of capacitive coupling between adjacent and parallel signaling paths.

    摘要翻译： 可编程逻辑器件（“PLD”）上的至少一些互连信号通过使用差分驱动器电路的差分信号来将差分信号施加到延伸到差分接收器电路的一对导体。 这种差分互连信令有助于PLD在较低的电源电压下令人满意地工作。 每个差分信号对中的导体可以以不同的间隔彼此交叉，以便有助于减少相邻和并行信令路径之间的电容耦合的不利影响。

    Differential interconnection circuits in programmable logic devices
    2.
    发明授权
    Differential interconnection circuits in programmable logic devices 有权
    可编程逻辑器件中的差分互连电路

    公开(公告)号：US06842040B1

    公开(公告)日：2005-01-11

    申请号：US10319329

    申请日：2002-12-13

    申请人： Wanli Chang ,  Andy Lee ,  Cameron McClintock ,  Richard Cliff ,  Richard Yen-Hsiang Chang

    发明人： Wanli Chang ,  Andy Lee ,  Cameron McClintock ,  Richard Cliff ,  Richard Yen-Hsiang Chang

    IPC分类号： H03K5/151 ,  H03K19/017 ,  H03K19/177

    CPC分类号： H03K19/17736 ,  H03K5/151 ,  H03K19/01721 ,  H03K19/17784

    摘要： At least some of the interconnection signaling on a programmable logic device (“PLD”) is by differential signaling using differential driver circuitry to apply differential signals to a pair of conductors that extend to differential receiver circuitry. Such differential interconnection signaling helps the PLD operate satisfactorily with lower power supply voltages. The conductors in each differential signaling pair may cross over one another at various intervals in order to help reduce the adverse effects of capacitive coupling between adjacent and parallel signaling paths.

    摘要翻译： 可编程逻辑器件（“PLD”）上的至少一些互连信号通过使用差分驱动器电路的差分信号来将差分信号施加到延伸到差分接收器电路的一对导体。 这种差分互连信令有助于PLD在较低的电源电压下令人满意地工作。 每个差分信号对中的导体可以以不同的间隔彼此交叉，以便有助于减少相邻和并行信令路径之间的电容耦合的不利影响。

    I/O cell configuration for multiple I/O standards
    10.
    发明申请
    I/O cell configuration for multiple I/O standards 有权
    多个I / O标准的I / O单元配置

    公开(公告)号：US20050151564A1

    公开(公告)日：2005-07-14

    申请号：US11004664

    申请日：2004-12-03

    申请人： Cameron McClintock ,  Richard Cliff ,  Bonnie Wang

    发明人： Cameron McClintock ,  Richard Cliff ,  Bonnie Wang

    IPC分类号： H03K19/0185 ,  H03K19/0175

    CPC分类号： H03K19/018585

    摘要： Circuitry is provided to individually configure each I/O of an integrated circuit to be compatible with a different LVTTL I/O standards. This can be done with only one I/O supply voltage, where that voltage is the highest of the I/O voltages needed in a particular application. The circuitry operates by regulating the output voltage of the I/O cell so that it is above the VOH and below the maximum VIH for the LVTTL standard for which it will comply with. Since each I/O cell is individually configurable, any I/O can drive out to any LVTTL specification.

    摘要翻译： 提供电路以单独配置集成电路的每个I / O以与不同的LVTTL I / O标准兼容。 这可以通过仅一个I / O电源电压完成，其中该电压是特定应用中所需的I / O电压中最高的。 电路通过调节I / O单元的输出电压进行操作，使其高于VOH并低于其符合的LVTTL标准的最大VIH。 由于每个I / O单元都可单独配置，任何I / O都可以驱动到任何LVTTL规范。