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公开(公告)号:US07885109B2
公开(公告)日:2011-02-08
申请号:US12273414
申请日:2008-11-18
申请人: Wen-Pin Lin , Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang
发明人: Wen-Pin Lin , Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang
IPC分类号: G11C11/04
CPC分类号: G11C8/08 , G11C11/4085 , G11C13/0004 , G11C13/0023 , G11C13/0028 , G11C13/0069 , G11C2013/0071 , G11C2013/0078 , G11C2207/2227 , G11C2213/79
摘要: Memories with low power consumption and methods for suppressing current leakage of a memory. The memory cell of the memory has a storage element and a transistor coupled in series. The invention sets a voltage across the transistor approaching to zero when the memory is not been accessed.
摘要翻译: 具有低功耗的存储器和用于抑制存储器的电流泄漏的方法。 存储器的存储单元具有串联耦合的存储元件和晶体管。 当存储器未被访问时,本发明将跨越晶体管的电压设置为零。
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公开(公告)号:USRE45189E1
公开(公告)日:2014-10-14
申请号:US13571798
申请日:2012-08-10
申请人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
发明人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
IPC分类号: G11C11/00
CPC分类号: G11C13/0069 , G11C13/0004 , G11C13/0064
摘要: An embodiment of a writing system for a phase change memory based on a present application is disclosed. The writing system comprises a first phase change memory (PCM) cell, a second PCM cell, a first writing circuit and a verifying circuit. The first writing circuit executes a writing procedure, receives and writes a first data to the first PCM cell. The verifying circuit executes a verifying procedure and the circuit further comprises a processing unit and a second writing circuit. The processing unit reads and compares the data stored in the second PCM cell with a second data. The second writing circuit writes the second data to the second PCM cell when the data stored in the second PCM cell and the second data are not matched.
摘要翻译: 公开了一种基于本申请的相变存储器的写入系统的实施例。 该写入系统包括第一相变存储器(PCM)单元,第二PCM单元,第一写入电路和验证电路。 第一写入电路执行写入过程,将第一数据接收并写入第一PCM单元。 验证电路执行验证过程,并且电路还包括处理单元和第二写入电路。 处理单元读取并比较存储在第二PCM单元中的数据与第二数据。 当存储在第二PCM单元中的数据和第二数据不匹配时,第二写入电路将第二数据写入第二PCM单元。
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公开(公告)号:US08031515B2
公开(公告)日:2011-10-04
申请号:US12275223
申请日:2008-11-21
申请人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
发明人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
IPC分类号: G11C11/00
CPC分类号: G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0078 , G11C2013/0092
摘要: A data programming circuit for storing a writing data into a memory cell is provided. The data programming circuit includes a control circuit and a current generating circuit. The control circuit generates a control signal according to the writing data. The current generating circuit provides a writing current to the memory cell to change a crystalline state of the memory cell. The writing current has a pulse width corresponding to the writing data, and the crystalline state corresponds to the writing data.
摘要翻译: 提供了一种用于将写入数据存储到存储单元中的数据编程电路。 数据编程电路包括控制电路和电流产生电路。 控制电路根据写入数据生成控制信号。 电流产生电路向存储单元提供写入电流以改变存储单元的结晶状态。 写入电流具有对应于写入数据的脉冲宽度,并且结晶状态对应于写入数据。
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公开(公告)号:US20090135645A1
公开(公告)日:2009-05-28
申请号:US12275223
申请日:2008-11-21
申请人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
发明人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
CPC分类号: G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0078 , G11C2013/0092
摘要: A data programming circuit for storing a writing data into a memory cell is provided. The data programming circuit includes a control circuit and a current generating circuit. The control circuit generates a control signal according to the writing data. The current generating circuit provides a writing current to the memory cell to change a crystalline state of the memory cell. The writing current has a pulse width corresponding to the writing data, and the crystalline state corresponds to the writing data.
摘要翻译: 提供了一种用于将写入数据存储到存储单元中的数据编程电路。 数据编程电路包括控制电路和电流产生电路。 控制电路根据写入数据生成控制信号。 电流产生电路向存储单元提供写入电流以改变存储单元的结晶状态。 写入电流具有对应于写入数据的脉冲宽度,并且结晶状态对应于写入数据。
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公开(公告)号:US20090080243A1
公开(公告)日:2009-03-26
申请号:US12142724
申请日:2008-06-19
申请人: Pei-Chia Chiang , Shyh-Shyuan Sheu , Lieh-Chiu Lin , Wen-Pin Lin
发明人: Pei-Chia Chiang , Shyh-Shyuan Sheu , Lieh-Chiu Lin , Wen-Pin Lin
IPC分类号: G11C11/00
CPC分类号: G11C5/14 , G11C13/0004 , G11C13/0069 , G11C2013/0071 , G11C2013/0078
摘要: Devices controlling a phase change storage element and methods for increasing reliability of a phase change storage element. The invention introduces a first operation mode and a second operation mode. A reference phase change storage element is forced a write current for an ideal conduction period in the first operation mode. In the second operation mode, the invention generates a proper conduction period based on the resistance of the reference phase change storage element, and forces the write current into the controlled phase change storage element for the proper conduction period.
摘要翻译: 控制相变存储元件的装置和增加相变存储元件的可靠性的方法。 本发明引入了第一操作模式和第二操作模式。 参考相变存储元件在第一操作模式中强制写入电流以达到理想的导通时段。 在第二操作模式中,本发明基于参考相变存储元件的电阻产生适当的导通周期,并将写入电流强制到受控相变存储元件中以达到适当的导通周期。
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公开(公告)号:US08218361B2
公开(公告)日:2012-07-10
申请号:US13215491
申请日:2011-08-23
申请人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
发明人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
IPC分类号: G11C11/00
CPC分类号: G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0078 , G11C2013/0092
摘要: A data programming circuit for storing a writing data into a memory cell is provided. The data programming circuit includes a control circuit and a current generating circuit. The control circuit generates a control signal according to the writing data. The current generating circuit provides a writing current to the memory cell to change a crystalline state of the memory cell. The writing current has a pulse width corresponding to the writing data, and the crystalline state corresponds to the writing data.
摘要翻译: 提供了一种用于将写入数据存储到存储单元中的数据编程电路。 数据编程电路包括控制电路和电流产生电路。 控制电路根据写入数据生成控制信号。 电流产生电路向存储单元提供写入电流以改变存储单元的结晶状态。 写入电流具有对应于写入数据的脉冲宽度,并且结晶状态对应于写入数据。
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公开(公告)号:US07796455B2
公开(公告)日:2010-09-14
申请号:US12142724
申请日:2008-06-19
申请人: Pei-Chia Chiang , Shyh-Shyuan Sheu , Lieh-Chiu Lin , Wen-Pin Lin
发明人: Pei-Chia Chiang , Shyh-Shyuan Sheu , Lieh-Chiu Lin , Wen-Pin Lin
IPC分类号: G11C7/02
CPC分类号: G11C5/14 , G11C13/0004 , G11C13/0069 , G11C2013/0071 , G11C2013/0078
摘要: Devices controlling a phase change storage element and methods for increasing reliability of a phase change storage element. The invention introduces a first operation mode and a second operation mode. A reference phase change storage element is forced a write current for an ideal conduction period in the first operation mode. In the second operation mode, the invention generates a proper conduction period based on the resistance of the reference phase change storage element, and forces the write current into the controlled phase change storage element for the proper conduction period.
摘要翻译: 控制相变存储元件的装置和增加相变存储元件的可靠性的方法。 本发明引入了第一操作模式和第二操作模式。 参考相变存储元件在第一操作模式中强制写入电流以达到理想的导通时段。 在第二操作模式中,本发明基于参考相变存储元件的电阻产生适当的导通周期,并将写入电流强制到受控相变存储元件中以达到适当的导通周期。
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公开(公告)号:US07773411B2
公开(公告)日:2010-08-10
申请号:US12268581
申请日:2008-11-11
申请人: Lieh-Chiu Lin , Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin
发明人: Lieh-Chiu Lin , Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin
IPC分类号: G11C11/00
CPC分类号: G11C13/003 , G11C13/0004 , G11C13/0038 , G11C13/004 , G11C2013/0054 , G11C2213/75 , G11C2213/76 , G11C2213/79
摘要: A phase change memory wherein several phase change storage elements are coupled in series to share a single current source. The current provided by the current source is directed by a plurality of switches. To write/read the phase change storage elements, the invention provides techniques to control the current value generated by the current source and controls the states of the switches. The impedance summation of the phase change storage elements vary with the data stored therein.
摘要翻译: 一种相变存储器,其中几个相变存储元件串联耦合以共享单个电流源。 由电流源提供的电流由多个开关引导。 为了写入/读取相变存储元件,本发明提供了控制由当前源产生的当前值并控制开关状态的技术。 相变存储元件的阻抗求和随其中存储的数据而变化。
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公开(公告)号:US20090296450A1
公开(公告)日:2009-12-03
申请号:US12344709
申请日:2008-12-29
申请人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
发明人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
CPC分类号: G11C13/0069 , G11C5/147 , G11C11/16 , G11C13/0004 , G11C13/0064 , G11C29/02 , G11C29/021 , G11C29/028 , G11C2013/0066 , G11C2013/0076 , G11C2013/0078 , G11C2013/0092 , G11C2029/5006
摘要: A memory having a memory cell, a resistance estimator and a write current generator. The resistance estimator is coupled to the memory cell to estimate the resistance of the memory cell and outputs an estimated resistance level. According to the estimated resistance level, the write current generator generates a write current to flow through the memory cell and to change the resistance of the memory cell. The write current is in a pulse form, and the write current generator sets the pulse width, or magnitude, or both the pulse width and the magnitude of the write current according to the estimated resistance level.
摘要翻译: 具有存储单元的存储器,电阻估计器和写入电流发生器。 电阻估计器耦合到存储器单元以估计存储器单元的电阻并输出估计的电阻电平。 根据估计的电阻水平,写入电流发生器产生写入电流流过存储器单元并改变存储单元的电阻。 写入电流是脉冲形式,并且写入电流发生器根据估计的电阻电平设置脉冲宽度或幅度或脉冲宽度和写入电流的幅度。
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公开(公告)号:US20110317483A1
公开(公告)日:2011-12-29
申请号:US13215491
申请日:2011-08-23
申请人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
发明人: Shyh-Shyuan Sheu , Lieh-Chiu Lin , Pei-Chia Chiang , Wen-Pin Lin
IPC分类号: G11C11/00
CPC分类号: G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0078 , G11C2013/0092
摘要: A data programming circuit for storing a writing data into a memory cell is provided. The data programming circuit includes a control circuit and a current generating circuit. The control circuit generates a control signal according to the writing data. The current generating circuit provides a writing current to the memory cell to change a crystalline state of the memory cell. The writing current has a pulse width corresponding to the writing data, and the crystalline state corresponds to the writing data.
摘要翻译: 提供了一种用于将写入数据存储到存储单元中的数据编程电路。 数据编程电路包括控制电路和电流产生电路。 控制电路根据写入数据生成控制信号。 电流产生电路向存储单元提供写入电流以改变存储单元的结晶状态。 写入电流具有对应于写入数据的脉冲宽度,并且结晶状态对应于写入数据。
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