公开(公告)号：US11177321B2

公开(公告)日：2021-11-16

申请号：US16661121

申请日：2019-10-23

Applicant: Winbond Electronics Corp.

Inventor： Po-Yen Hsu ,  Bo-Lun Wu ,  Shih-Ning Tsai ,  Cheng-Hui Tu

IPC: H01L27/24 ,  G11C13/00 ,  H01L45/00

Abstract: A resistive random access memory is provided. The resistive random access memory includes a substrate, a first electrode formed on the substrate, a second electrode formed on the substrate and located on one side of the first electrode, a first metal oxide layer formed on sidewalls of the second electrode, a first control layer formed between the first electrode and the first metal oxide layer, and a second control layer formed on the first control layer and located between the first electrode and the first metal oxide layer.

公开(公告)号：US10978336B2

公开(公告)日：2021-04-13

申请号：US16704152

申请日：2019-12-05

Applicant: Winbond Electronics Corp.

Inventor： Cheng-Hui Tu ,  Chi-Ching Liu ,  Ting-Ying Shen ,  Yen-De Lee ,  Ping-Kun Wang

IPC: H01L21/768

Abstract: A method of manufacturing a semiconductor device includes forming a first dielectric layer and a through hole passing through the first dielectric layer over a substrate; forming a plurality of dummy contacts in the through hole; forming a plurality of first dummy wires on the plurality of dummy contacts; filling a second dielectric layer between the plurality of first dummy wires, wherein the second dielectric layer has a first air gap; removing the dummy contacts and the first dummy wires to expose the through hole, thereby forming a first wiring trench over the through hole; and forming a contact and a first wire in the through hole and the first wiring trench.