公开(公告)号：US10340450B2

公开(公告)日：2019-07-02

申请号：US15660295

申请日：2017-07-26

Applicant: Winbond Electronics Corp.

Inventor： Po-Yen Hsu ,  Chih-Cheng Fu ,  Ting-Ying Shen

IPC: H01L45/00 ,  G11C13/00

Abstract: A resistive random access memory (RRAM) structure and its forming method are provided, which includes an interlayer dielectric layer on a substrate. The interlayer dielectric layer is a dielectrics including oxygen. The RRAM structure also includes an oxygen-diffusion barrier layer on the interlayer dielectric layer, and a bottom electrode layer on the oxygen-diffusion barrier layer. The bottom electrode layer includes a first electrode layer, a first oxygen-rich layer on the first electrode layer, and a second electrode layer on the first oxygen-rich layer. The RRAM structure also includes a resistance switching layer on the bottom electrode layer, and a top electrode layer on the resistance switching layer.

公开(公告)号：US09773842B2

公开(公告)日：2017-09-26

申请号：US15230837

申请日：2016-08-08

Applicant: Winbond Electronics Corp.

Inventor： Tso-Hua Hung ,  Kao-Tsair Tsai ,  Hsaio-Yu Lin ,  Bo-Lun Wu ,  Ting-Ying Shen

IPC: H01L47/00 ,  H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/16

Abstract: Memory devices are provided. The memory device includes a substrate. A dielectric layer is disposed on the substrate and a plurality of resistive memory cells is disposed on the dielectric layer. Each resistive memory cell includes a via disposed in a first opening of the dielectric layer. A conductive layer is disposed on the via. The memory device further includes a capacitor structure including a bottom electrode, a variable resistance layer disposed on the bottom electrode and a top electrode disposed on the variable resistance layer, wherein the bottom electrode is disposed on the conductive layer.

公开(公告)号：US09349451B1

公开(公告)日：2016-05-24

申请号：US14729065

申请日：2015-06-03

Applicant: Winbond Electronics Corp.

Inventor： Meng-Hung Lin ,  Bo-Lun Wu ,  Ting-Ying Shen

IPC: G11C11/00 ,  G11C5/14 ,  G11C13/00

CPC classification number: G11C13/0097 ,  G11C13/0033 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2013/0092

Abstract: A resistive memory and a repairing method of the resistive memory are provided. Steps of the repairing method includes: operating a plurality of set-reset cycles on the resistive memory; detecting whether the resistive memory encounters an over-set issue after the set-reset cycles are operated; if the resistive memory encounters the over-set issue, executing an enhanced reset programming on the resistive memory. Here, the enhanced reset programming is executed by applying an enhanced reset voltage on the resistive memory during an enhanced reset time period. A product of the enhanced reset voltage and the enhanced reset time period is larger than a product of a reset voltage and a reset time period.

Abstract translation: 提供了电阻性存储器和电阻性存储器的修复方法。 修复方法的步骤包括：在电阻性存储器上操作多个设置复位周期; 检测在设置复位周期被操作之后电阻性存储器是否遇到过度的问题; 如果电阻性存储器遇到过载问题，则在电阻性存储器上执行增强的复位编程。 这里，通过在增强的复位时间段期间在电阻存储器上施加增强的复位电压来执行增强的复位编程。 增强复位电压和增强复位时间段的乘积大于复位电压和复位时间周期的乘积。

公开(公告)号：US20180233665A1

公开(公告)日：2018-08-16

申请号：US15949078

申请日：2018-04-10

Applicant: Winbond Electronics Corp.

Inventor： Frederick Chen ,  Ping-Kun Wang ,  Shao-Ching Liao ,  Po-Yen Hsu ,  Yi-Hsiu Chen ,  Ting-Ying Shen ,  Bo-Lun Wu ,  Meng-Hung Lin ,  Chia-Hua Ho ,  Ming-Che Lin

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/146 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/122 ,  H01L45/1253 ,  H01L45/1266 ,  H01L45/1616

Abstract: A resistive random access memory is provided. The resistive random access memory includes a bottom electrode over a substrate, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer containing metal or semiconductor is disposed at sidewalls of the resistance-switching layer, and the sidewalls of the resistance-switching layer is doped with the metal or semiconductor from the sidewall protective layer.

公开(公告)号：US09972779B2

公开(公告)日：2018-05-15

申请号：US14967386

申请日：2015-12-14

Applicant: Winbond Electronics Corp.

Inventor： Frederick Chen ,  Ping-Kun Wang ,  Shao-Ching Liao ,  Po-Yen Hsu ,  Yi-Hsiu Chen ,  Ting-Ying Shen ,  Bo-Lun Wu ,  Meng-Hung Lin

IPC: H01L47/00 ,  H01L45/00

CPC classification number: H01L45/1266 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/146

Abstract: A resistive random access memory is provided. The resistive random access memory includes a bottom electrode, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The bottom electrode is disposed over a substrate. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer as an oxygen supply layer is at least disposed at sidewalls of the oxygen exchange layer.

公开(公告)号：US09666570B2

公开(公告)日：2017-05-30

申请号：US14918567

申请日：2015-10-21

Applicant: Winbond Electronics Corp.

Inventor： Bo-Lun Wu ,  Chia-Hua Ho ,  Ting-Ying Shen ,  Meng-Hung Lin

IPC: H01L25/18 ,  H01L27/02 ,  H01L27/105 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L25/18 ,  H01L27/0248 ,  H01L27/101 ,  H01L27/1052 ,  H01L27/2418 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1675

Abstract: The invention provides a memory device and a manufacturing method thereof. The memory device includes a substrate, a capacitor, a protection device, a first metal interconnect, and a second metal interconnect. The capacitor is located on the substrate of a first region. The protection device is located in the substrate of a second region. The capacitor includes a plurality of bottom electrodes, a top electrode, and a capacitor dielectric layer. The top electrode has a first portion and a second portion, wherein the second portion is extended to the second region. The capacitor dielectric layer is located between the bottom electrodes and the top electrode. The first metal interconnect is located between the capacitor and the substrate. The second metal interconnect is located between the second portion of the top electrode and the protection device. The top electrode is electrically connected to the protection device through the second metal interconnect.

公开(公告)号：US20160155505A1

公开(公告)日：2016-06-02

申请号：US14729065

申请日：2015-06-03

Applicant: Winbond Electronics Corp.

Inventor： Meng-Hung Lin ,  Bo-Lun Wu ,  Ting-Ying Shen

IPC: G11C13/00

CPC classification number: G11C13/0097 ,  G11C13/0033 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2013/0092

Abstract: A resistive memory and a repairing method of the resistive memory are provided. Steps of the repairing method includes: operating a plurality of set-reset cycles on the resistive memory; detecting whether the resistive memory encounters an over-set issue after the set-reset cycles are operated; if the resistive memory encounters the over-set issue, executing an enhanced reset programming on the resistive memory. Here, the enhanced reset programming is executed by applying an enhanced reset voltage on the resistive memory during an enhanced reset time period. A product of the enhanced reset voltage and the enhanced reset time period is larger than a product of a reset voltage and a reset time period.

Abstract translation: 提供了电阻性存储器和电阻性存储器的修复方法。 修复方法的步骤包括：在电阻性存储器上操作多个设置复位周期; 检测在设置复位周期被操作之后电阻性存储器是否遇到过度的问题; 如果电阻性存储器遇到过载问题，则在电阻性存储器上执行增强的复位编程。 这里，通过在增强的复位时间段期间在电阻存储器上施加增强的复位电压来执行增强的复位编程。 增强复位电压和增强复位时间段的乘积大于复位电压和复位时间周期的乘积。

公开(公告)号：US11329222B2

公开(公告)日：2022-05-10

申请号：US16839270

申请日：2020-04-03

Applicant: Winbond Electronics Corp.

Inventor： Po-Yen Hsu ,  Bo-Lun Wu ,  Ting-Ying Shen

IPC: H01L45/00 ,  G11C13/00 ,  H01L27/24

Abstract: A resistive random access memory (RRAM) and its manufacturing method are provided. The RRAM includes a substrate having an array region and a peripheral region. A plurality of memory cells and a gap-filling dielectric layer overlying the memory cells are located on the substrate and in the array region. A buffer layer only in the array region covers the gap-filling dielectric layer, and its material layer is different from that of the gap-filling dielectric layer. A first low-k dielectric layer is only located in the peripheral region, and its material is different from that of the buffer layer. A dielectric constant of the first low-k dielectric layer is less than 3. A top surface of the first low-k dielectric layer is coplanar with that of the buffer layer. A first conductive plug passes through the buffer layer and the gap-filling dielectric layer and contacts one of the memory cells.

公开(公告)号：US10978336B2

公开(公告)日：2021-04-13

申请号：US16704152

申请日：2019-12-05

Applicant: Winbond Electronics Corp.

Inventor： Cheng-Hui Tu ,  Chi-Ching Liu ,  Ting-Ying Shen ,  Yen-De Lee ,  Ping-Kun Wang

IPC: H01L21/768

Abstract: A method of manufacturing a semiconductor device includes forming a first dielectric layer and a through hole passing through the first dielectric layer over a substrate; forming a plurality of dummy contacts in the through hole; forming a plurality of first dummy wires on the plurality of dummy contacts; filling a second dielectric layer between the plurality of first dummy wires, wherein the second dielectric layer has a first air gap; removing the dummy contacts and the first dummy wires to expose the through hole, thereby forming a first wiring trench over the through hole; and forming a contact and a first wire in the through hole and the first wiring trench.

公开(公告)号：US09960349B2

公开(公告)日：2018-05-01

申请号：US15449632

申请日：2017-03-03

Applicant: Winbond Electronics Corp.

Inventor： Yi-Hsiu Chen ,  Ming-Hung Hsieh ,  Po-Yen Hsu ,  Ting-Ying Shen

IPC: H01L45/00

CPC classification number: H01L45/1253 ,  H01L27/2436 ,  H01L27/2472 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16

Abstract: A resistive random-access memory structure and a method for fabricating a resistive random-access memory structure are described. A first dielectric layer is formed on a substrate. A plurality of bottom electrodes are independently embedded in the first dielectric layer. A transition metal oxide layer covers the plurality of bottom electrodes and extends onto a portion of the first dielectric layer. The minimum distance between the bottom electrode and a sidewall of the transition metal oxide layer is a first distance. The first distance is in a range of 10 nm to 200 μm. A top electrode is formed on the transition metal oxide layer.