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公开(公告)号:US20240387175A1
公开(公告)日:2024-11-21
申请号:US18628824
申请日:2024-04-08
Applicant: Winbond Electronics Corp.
Inventor: Chungchen Hsu , Tsung-Wei Lin , Kun-Che Wu
IPC: H01L21/033 , H01L21/3213
Abstract: A semiconductor structure includes a substrate and a target pattern. The target pattern is disposed on the substrate. The top-view pattern of the target pattern includes a main portion and a protruding portion. The main portion and the protruding portion are connected with each other along the long axis of the top-view pattern of the target pattern. The protruding portion is connected to the main portion. The protruding portion includes a first portion located on one side of the long axis. The maximum width of the first portion perpendicular to the long axis is less than half of the maximum width of the main portion.
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公开(公告)号:US20210225639A1
公开(公告)日:2021-07-22
申请号:US17033695
申请日:2020-09-26
Applicant: Winbond Electronics Corp.
Inventor: Tsung-Wei Lin , Kun-Che Wu , Chun-Sheng Wu
IPC: H01L21/027
Abstract: A manufacturing method of a semiconductor device includes forming a hard mask layer and a photoresist on a substrate having a layer to be etched, and performing exposure and development such that the patterned photoresist has first trenches and to expose the hard mask layer, wherein ends of the first trenches have a width gradually decreased toward an end point. The exposed hard mask layer is removed using the patterned photoresist to transfer the pattern of the first trenches to the hard mask layer such that the patterned hard mask layer has second trenches, and the ends of the second trenches have a width gradually decreased toward an end point. Spacers are formed on inner walls of the second trenches. The hard mask layer is removed such that the layer to be etched is exposed. The exposed layer to be etched is removed using the spacers as an etch mask.
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公开(公告)号:US11876048B2
公开(公告)日:2024-01-16
申请号:US17504546
申请日:2021-10-19
Applicant: Winbond Electronics Corp.
Inventor: Wen-Chieh Tsai , Cheng-Ta Yang , Tsung-Wei Lin
IPC: H01L21/00 , H01L23/528 , H01L21/768
CPC classification number: H01L23/528 , H01L21/76816
Abstract: Provided is a memory device, including: a substrate; a plurality of word lines, extending in a first direction, arranged in a second direction, disposed on the substrate; a dummy structure, adjacent to ends of the word lines, disposed on the substrate, wherein the dummy structure includes a main part that extends in the second direction; and a plurality of extension parts, extending in the first direction, connected to the main part, and interposed between the main part and the word lines.
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公开(公告)号:US20240297047A1
公开(公告)日:2024-09-05
申请号:US18592416
申请日:2024-02-29
Applicant: Winbond Electronics Corp.
Inventor: Kun-Che Wu , Tsung-Wei Lin , Chungchen Hsu
IPC: H01L21/308 , H01L21/027
CPC classification number: H01L21/3086 , H01L21/0274 , H01L21/3081
Abstract: A manufacturing method of a semiconductor structure includes the following steps. A substrate is provided. A material layer is formed on the substrate. A first hard mask pattern is formed on the material layer. The top-view pattern of the first hard mask pattern is ring-shaped. The first hard mask pattern has an opening. A second hard mask pattern is formed on the first hard mask pattern. The second hard mask pattern fills the opening. The top-view pattern of the second hard mask pattern is completely located inside the outer contour of the top-view pattern of the first hard mask pattern. The pattern of the first hard mask pattern and the pattern of the second hard mask pattern are transferred to the material layer to form a first target pattern.
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公开(公告)号:US11545360B2
公开(公告)日:2023-01-03
申请号:US17033695
申请日:2020-09-26
Applicant: Winbond Electronics Corp.
Inventor: Tsung-Wei Lin , Kun-Che Wu , Chun-Sheng Wu
IPC: H01L21/027
Abstract: A manufacturing method of a semiconductor device includes forming a hard mask layer and a photoresist on a substrate having a layer to be etched, and performing exposure and development such that the patterned photoresist has first trenches and to expose the hard mask layer, wherein ends of the first trenches have a width gradually decreased toward an end point. The exposed hard mask layer is removed using the patterned photoresist to transfer the pattern of the first trenches to the hard mask layer such that the patterned hard mask layer has second trenches, and the ends of the second trenches have a width gradually decreased toward an end point. Spacers are formed on inner walls of the second trenches. The hard mask layer is removed such that the layer to be etched is exposed. The exposed layer to be etched is removed using the spacers as an etch mask.
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公开(公告)号:US11515252B2
公开(公告)日:2022-11-29
申请号:US17345391
申请日:2021-06-11
Applicant: Winbond Electronics Corp.
Inventor: Tsung-Wei Lin , Chun-Yen Liao , Chun-Sheng Wu
IPC: H01L21/00 , H01L23/528 , H01L21/768
Abstract: A word line layout includes a substrate, a first word line group, a second word line group, and an I-shaped third word line. The first word line group is disposed on the substrate and includes a plurality of L-shaped first word lines, and each of the first word lines has a first segment and a second segment connected to each other. The second word line group is disposed on the substrate and includes a plurality of L-shaped second word lines, and each of the second word lines has a first segment and a second segment connected to each other. The first word line group and the second word line group are arranged in juxtaposition and symmetric to each other. The I-shaped third word line is disposed on the outer side of the first word line group and the second word line group.
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公开(公告)号:US12148627B2
公开(公告)日:2024-11-19
申请号:US17480757
申请日:2021-09-21
Applicant: Winbond Electronics Corp.
Inventor: Hsin-Hung Chou , Tsung-Wei Lin , Kao-Tsair Tsai
IPC: H01L21/3213 , H01L21/027 , H01L21/311 , H01L29/66 , H10B41/30
Abstract: A method for forming a semiconductor memory structure includes sequentially forming an active layer, a hard mask layer and a core layer over a substrate, and etching the core layer to form a core pattern. The core pattern includes a first strip, a second strip, and a plurality of supporting features abutting the first and second strips. The method also includes forming a spacer layer alongside the core pattern, removing the core pattern, forming a photoresist pattern above the spacer layer, etching the hard mask layer using the photoresist pattern and the spacer layer to form a hard mask pattern, and transferring the hard mask pattern into the active layer to form a gate stack.
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公开(公告)号:US20230325641A1
公开(公告)日:2023-10-12
申请号:US17715947
申请日:2022-04-07
Applicant: Winbond Electronics Corp.
Inventor: Tung-Yu Wu , Chun-Yen Liao , Tsung-Wei Lin , Chun-Sheng Wu , Chao-Yi Huang , Yu Ming Li , Hung-Fei Kuo
CPC classification number: G06N3/0472 , G03F7/70491
Abstract: The invention provides a light source optimization apparatus including a storage apparatus and a processor. The storage apparatus stores a plurality of modules. The processor is coupled to the storage apparatus and configured to execute the plurality of modules. The plurality of modules include a critical pattern module and a light source optimization module. The critical pattern module retrieves critical pattern data. The light source optimization module executes an ant colony optimization (ACO) algorithm according to a preset parameter to adjust an initial light source image to generate an output light source image, and the initial light source image corresponds to the critical pattern data.
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公开(公告)号:US20230118367A1
公开(公告)日:2023-04-20
申请号:US17504546
申请日:2021-10-19
Applicant: Winbond Electronics Corp.
Inventor: Wen-Chieh Tsai , Cheng-Ta Yang , Tsung-Wei Lin
IPC: H01L23/528 , H01L21/768
Abstract: Provided is a memory device, including: a substrate; a plurality of word lines, extending in a first direction, arranged in a second direction, disposed on the substrate; a dummy structure, adjacent to ends of the word lines, disposed on the substrate, wherein the dummy structure includes a main part that extends in the second direction; and a plurality of extension parts, extending in the first direction, connected to the main part, and interposed between the main part and the word lines.
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