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    Multi bits flash memory device and method of operating the same
    1.
    发明授权
    Multi bits flash memory device and method of operating the same 失效
    多位闪存器件及其操作方法

    公开(公告)号：US07535049B2

    公开(公告)日：2009-05-19

    申请号：US11249393

    申请日：2005-10-14

    申请人： Won-joo Kim ,  Yoon-dong Park ,  Eun-hong Lee ,  Sun-ae Seo ,  Sang-min Shin ,  Jung-hoon Lee ,  Seung-hyuk Chang

    发明人： Won-joo Kim ,  Yoon-dong Park ,  Eun-hong Lee ,  Sun-ae Seo ,  Sang-min Shin ,  Jung-hoon Lee ,  Seung-hyuk Chang

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： G11C11/5621 ,  B82Y10/00 ,  G11C11/5607 ,  G11C11/5628 ,  G11C11/5657 ,  G11C13/025 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/28291 ,  H01L29/0692 ,  H01L29/4232 ,  H01L29/7923

    摘要： A multi bits flash memory device and a method of operating the same are disclosed. The multi bits flash memory device includes: a stacked structure including: a first active layer with a mesa-like form disposed on a substrate; a second active layer, having a different conductivity type from the first active layer, formed on the first active layer; an active interlayer isolation layer interposed between the first active layer and the second active layer such that the first active layer is electrically isolated from the second active layer; a common source and a common drain formed on a pair of opposite side surfaces of the stacked structure; a common first gate and a common second gate formed on the other pair of opposite side surfaces of the stacked structure; a tunnel dielectric layer interposed between the first and second gates and the first and second active layers; and a charge trap layer, storing charges that tunnel through the tunnel dielectric layer, interposed between the tunnel dielectric layer and the first and second gates.

    摘要翻译： 公开了一种多位闪存器件及其操作方法。 多位闪存器件包括：堆叠结构，包括：设置在衬底上的具有台面状形状的第一有源层; 形成在所述第一有源层上的与所述第一有源层不同的导电类型的第二有源层; 插入在第一有源层和第二有源层之间的有源层间隔离层，使得第一有源层与第二有源层电隔离; 形成在所述堆叠结构的一对相对侧表面上的共同源极和共同漏极; 形成在所述堆叠结构的另一对相对侧表面上的公共第一栅极和公共第二栅极; 介于所述第一和第二栅极与所述第一和第二有源层之间的隧道介电层; 以及电荷捕获层，其存储穿过隧道介电层的电荷，介于隧道介电层和第一和第二栅极之间。

    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device
    3.
    发明申请
    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device 失效
    多位非易失性存储器件，其操作方法以及制造多位非易失性存储器件的方法

    公开(公告)号：US20070247913A1

    公开(公告)日：2007-10-25

    申请号：US11812574

    申请日：2007-06-20

    申请人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    发明人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    IPC分类号： G11C11/02 ,  H01L21/8244 ,  H01L27/11

    CPC分类号： H01L29/7926 ,  H01L29/42332 ,  H01L29/7887 ,  H01L29/7923

    摘要： Disclosed are a multi-bit non-volatile memory device, a method of operating the same, and a method of manufacturing the multi-bit non-volatile memory device. A unit cell of the multi-bit non-volatile memory device may be formed on a semiconductor substrate may include: a plurality of channels disposed perpendicularly to the upper surface of the semiconductor substrate; a plurality of storage nodes disposed on opposite sides of the channels perpendicularly the upper surface of the semiconductor substrate; a control gate surrounding upper portions of the channels and the storage nodes, and side surfaces of the storage nodes; and an insulating film formed between the channels and the storage nodes, between the channels and the control gate, and between the storage nodes and the control gate.

    摘要翻译： 公开了一种多位非易失性存储器件，其操作方法以及制造该多位非易失性存储器件的方法。 多位非易失性存储器件的单元可以形成在半导体衬底上，可以包括：垂直于半导体衬底的上表面设置的多个通道; 多个存储节点，其设置在所述通道的相对侧，垂直于所述半导体衬底的上表面; 围绕通道和存储节点的上部以及存储节点的侧表面的控制门; 以及形成在通道和存储节点之间，通道和控制栅极之间以及存储节点和控制门之间的绝缘膜。

    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device
    4.
    发明授权
    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device 失效
    多位非易失性存储器件，其操作方法以及制造多位非易失性存储器件的方法

    公开(公告)号：US07256447B2

    公开(公告)日：2007-08-14

    申请号：US11181724

    申请日：2005-07-15

    申请人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    发明人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7926 ,  H01L29/42332 ,  H01L29/7887 ,  H01L29/7923

    摘要： Disclosed are a muli-bit non-volatile memory device, a method of operating the same, and a method of manufacturing the multi-bit non-volatile memory device. A unit cell of the muli-bit non-volatile memory device may be formed on a semiconductor substrate may include: a plurality of channels disposed perpendicularly to the upper surface of the semiconductor substrate; a plurality of storage nodes disposed on opposite sides of the channels perpendicularly the upper surface of the semiconductor substrate; a control gate surrounding upper portions of the channels and the storage nodes, and side surfaces of the storage nodes; and an insulating film formed between the channels and the storage nodes, between the channels and the control gate, and between the storage nodes and the control gate.

    摘要翻译： 公开了多位非易失性存储器件，其操作方法以及制造多位非易失性存储器件的方法。 多晶硅非易失性存储器件的单元可以形成在半导体衬底上，可以包括：垂直于半导体衬底的上表面设置的多个沟道; 多个存储节点，其设置在所述通道的相对侧，垂直于所述半导体衬底的上表面; 围绕通道和存储节点的上部以及存储节点的侧表面的控制门; 以及形成在通道和存储节点之间，通道和控制栅极之间以及存储节点和控制门之间的绝缘膜。

    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device
    5.
    发明授权
    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device 失效
    多位非易失性存储器件，其操作方法以及制造多位非易失性存储器件的方法

    公开(公告)号：US07361554B2

    公开(公告)日：2008-04-22

    申请号：US11812574

    申请日：2007-06-20

    申请人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    发明人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7926 ,  H01L29/42332 ,  H01L29/7887 ,  H01L29/7923

    摘要： Disclosed are a multi-bit non-volatile memory device, a method of operating the same, and a method of manufacturing the multi-bit non-volatile memory device. A unit cell of the multi-bit non-volatile memory device may be formed on a semiconductor substrate may include: a plurality of channels disposed perpendicularly to the upper surface of the semiconductor substrate; a plurality of storage nodes disposed on opposite sides of the channels perpendicularly the upper surface of the semiconductor substrate; a control gate surrounding upper portions of the channels and the storage nodes, and side surfaces of the storage nodes; and an insulating film formed between the channels and the storage nodes, between the channels and the control gate, and between the storage nodes and the control gate.

    摘要翻译： 公开了一种多位非易失性存储器件，其操作方法以及制造该多位非易失性存储器件的方法。 多位非易失性存储器件的单元可以形成在半导体衬底上，可以包括：垂直于半导体衬底的上表面设置的多个沟道; 多个存储节点，其设置在所述通道的相对侧，垂直于所述半导体衬底的上表面; 围绕通道和存储节点的上部以及存储节点的侧表面的控制门; 以及形成在通道和存储节点之间，通道和控制栅极之间以及存储节点和控制门之间的绝缘膜。

    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device
    6.
    发明申请
    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device 失效
    多位非易失性存储器件，其操作方法以及制造多位非易失性存储器件的方法

    公开(公告)号：US20060097308A1

    公开(公告)日：2006-05-11

    申请号：US11181724

    申请日：2005-07-15

    申请人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    发明人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L29/7926 ,  H01L29/42332 ,  H01L29/7887 ,  H01L29/7923

    摘要： Disclosed are a muli-bit non-volatile memory device, a method of operating the same, and a method of manufacturing the multi-bit non-volatile memory device. A unit cell of the muli-bit non-volatile memory device may be formed on a semiconductor substrate may include: a plurality of channels disposed perpendicularly to the upper surface of the semiconductor substrate; a plurality of storage nodes disposed on opposite sides of the channels perpendicularly the upper surface of the semiconductor substrate; a control gate surrounding upper portions of the channels and the storage nodes, and side surfaces of the storage nodes; and an insulating film formed between the channels and the storage nodes, between the channels and the control gate, and between the storage nodes and the control gate.

    摘要翻译： 公开了多位非易失性存储器件，其操作方法以及制造多位非易失性存储器件的方法。 多晶硅非易失性存储器件的单元可以形成在半导体衬底上，可以包括：垂直于半导体衬底的上表面设置的多个沟道; 多个存储节点，其设置在所述通道的相对侧，垂直于所述半导体衬底的上表面; 围绕通道和存储节点的上部以及存储节点的侧表面的控制门; 以及形成在通道和存储节点之间，通道和控制栅极之间以及存储节点和控制门之间的绝缘膜。