公开(公告)号：US08705752B2

公开(公告)日：2014-04-22

申请号：US11523693

申请日：2006-09-20

申请人： Xicheng Jiang ,  Jungwoo Song ,  Jianlong Chen

发明人： Xicheng Jiang ,  Jungwoo Song ,  Jianlong Chen

IPC分类号： H04R5/00

CPC分类号： H04R3/04

摘要： A noise reduction circuit for reducing the effects of low frequency noise such as wind noise in communications applications is described. In one embodiment, the noise reduction circuit features a high pass filter formed by exploiting the existing off-chip AC coupling capacitances in making the connection to the source of audio signals. The filter may be adaptive to environmental low frequency noise level through programming the shunt resistances. A low-noise wide dynamic range programmable gain amplifier is also described. Adaptive equalization of the audio signal is also described through the utilization of programmable front-end resistors and a back-end audio equalizer.

摘要翻译： 描述了用于降低通信应用中诸如风噪声的低频噪声的影响的降噪电路。 在一个实施例中，噪声降低电路具有通过利用现有的片外AC耦合电容在形成与音频信号源的连接而形成的高通滤波器。 滤波器可以通过编程分流电阻来适应环境低频噪声电平。 还描述了低噪声宽动态范围可编程增益放大器。 还通过利用可编程前端电阻和后端音频均衡器来描述音频信号的自适应均衡。

公开(公告)号：US20080069373A1

公开(公告)日：2008-03-20

申请号：US11523693

申请日：2006-09-20

申请人： Xicheng Jiang ,  Jungwoo Song ,  Jianlong Chen

发明人： Xicheng Jiang ,  Jungwoo Song ,  Jianlong Chen

IPC分类号： H04B15/00

CPC分类号： H04R3/04

摘要： A noise reduction circuit for reducing the effects of low frequency noise such as wind noise in communications applications is described. In one embodiment, the noise reduction circuit features a high pass filter formed by exploiting the existing off-chip AC coupling capacitances in making the connection to the source of audio signals. The filter may be adaptive to environmental low frequency noise level through programming the shunt resistances. A low-noise wide dynamic range programmable gain amplifier is also described. Adaptive equalization of the audio signal is also described through the utilization of programmable front-end resistors and a back-end audio equalizer.

摘要翻译： 描述了用于降低通信应用中诸如风噪声的低频噪声的影响的降噪电路。 在一个实施例中，噪声降低电路具有通过利用现有的片外AC耦合电容在形成与音频信号源的连接而形成的高通滤波器。 滤波器可以通过编程分流电阻来适应环境低频噪声电平。 还描述了低噪声宽动态范围可编程增益放大器。 还通过利用可编程前端电阻和后端音频均衡器来描述音频信号的自适应均衡。

公开(公告)号：US08466743B2

公开(公告)日：2013-06-18

申请号：US12799598

申请日：2010-04-27

申请人： Xicheng Jiang ,  Jungwoo Song

发明人： Xicheng Jiang ,  Jungwoo Song

IPC分类号： H03F3/217

CPC分类号： H03F3/217

摘要： Disclosed is an amplifier circuit configured to amplify a pulse stream. The amplifier circuit comprises a switching block including a first switch operable to couple an output node of the switching block to a positive reference voltage, a second switch operable to couple the output node to a ground reference voltage and a third switch operable to couple the output node to a negative reference voltage. The amplifier circuit is configured to amplify the pulse stream into an amplified signal detectable at the output node such that the amplified signal has a common-mode voltage level substantially equal to zero volts. In one embodiment, the amplifier circuit is configured to amplify the pulse stream in accordance with a Class-D amplification scheme. In one embodiment, the output node can be directly connected to a load device without a DC blocking capacitor being interposed between the output node and the load device.

摘要翻译： 公开了一种被配置为放大脉冲流的放大器电路。 放大器电路包括切换块，其包括可操作以将切换块的输出节点耦合到正参考电压的第一开关，可操作以将输出节点耦合到接地参考电压的第二开关和可操作以将输出 节点到负参考电压。 放大器电路被配置为将脉冲流放大到在输出节点处可检测的放大信号，使得放大的信号具有基本上等于零伏特的共模电压电平。 在一个实施例中，放大器电路被配置为根据D类放大方案来放大脉冲流。 在一个实施例中，输出节点可以直接连接到负载装置，而不会在输出节点和负载装置之间插入直流阻塞电容器。

公开(公告)号：US08237496B2

公开(公告)日：2012-08-07

申请号：US12804834

申请日：2010-07-29

申请人： Xicheng Jiang ,  Jungwoo Song ,  Minsheng Wang ,  Todd L. Brooks

发明人： Xicheng Jiang ,  Jungwoo Song ,  Minsheng Wang ,  Todd L. Brooks

IPC分类号： H03F3/38

CPC分类号： H03F3/217

摘要： Disclosed is a switching amplifier having an enhanced supply rejection. The switching amplifier comprises a digital modulator that provides a modulated signal. The switching amplifier further comprises a closed-loop analog driver that is coupled to the digital modulator. As disclosed, the closed-loop analog driver is configured to re-modulate a modulation signal that corresponds to the modulated signal. An output stage of the switching amplifier is driven by the re-modulated signal, thereby providing enhanced supply rejection. In one embodiment, the modulated signal is produced by a digital pulse-width modulator (PWM) circuit of a Class-D amplifier, and has a pulse rate substantially less than a clock rate of the digital PWM circuit. In one embodiment, the switching amplifier is implemented as an audio amplifier in a mobile communication device such as a cellular telephone.

摘要翻译： 公开了具有增强的电源抑制的开关放大器。 开关放大器包括提供调制信号的数字调制器。 开关放大器还包括耦合到数字调制器的闭环模拟驱动器。 如所公开的，闭环模拟驱动器被配置为重新调制对应于调制信号的调制信号。 开关放大器的输出级由再调制信号驱动，从而提供增强的电源抑制。 在一个实施例中，调制信号由D类放大器的数字脉冲宽度调制器（PWM）电路产生，并且具有基本上小于数字PWM电路的时钟速率的脉冲速率。 在一个实施例中，开关放大器被实现为诸如蜂窝电话的移动通信设备中的音频放大器。

公开(公告)号：US08212612B2

公开(公告)日：2012-07-03

申请号：US12804318

申请日：2010-07-19

申请人： Jungwoo Song ,  Xicheng Jiang ,  Minsheng Wang ,  Todd L. Brooks

发明人： Jungwoo Song ,  Xicheng Jiang ,  Minsheng Wang ,  Todd L. Brooks

IPC分类号： H03F3/38 ,  H03F3/217

CPC分类号： H03F3/217

摘要： Disclosed is a closed-loop class-D amplifier circuit including a modulated reference signal generator that provides a modulated reference signal in a feed-forward path, where the reference signal is modulated corresponding to an input signal. The closed-loop class-D amplifier circuit further includes a comparator to generate a control signal based on a comparison of the modulated reference signal and a correction signal, which in turn is produced by filtering a combination of the input signal and a feedback signal. The closed-loop class-D amplifier circuit also includes a pulse generator to generate a pulse-width-modulated signal to drive an output stage of the closed-loop class-D amplifier based on the control signal.

摘要翻译： 公开了一种闭环D类放大器电路，其包括在前馈路径中提供调制参考信号的调制参考信号发生器，其中参考信号根据输入信号被调制。 闭环D类放大器电路还包括比较器，用于基于调制参考信号和校正信号的比较产生控制信号，校正信号又通过滤波输入信号和反馈信号的组合来产生。 闭环D类放大器电路还包括脉冲发生器，以产生脉冲宽度调制信号，以根据控制信号驱动闭环D类放大器的输出级。

公开(公告)号：US20120025910A1

公开(公告)日：2012-02-02

申请号：US12804834

申请日：2010-07-29

申请人： Xicheng Jiang ,  Jungwoo Song ,  Minsheng Wang ,  Todd L. Brooks

发明人： Xicheng Jiang ,  Jungwoo Song ,  Minsheng Wang ,  Todd L. Brooks

IPC分类号： H03F3/217

CPC分类号： H03F3/217

摘要： Disclosed is a switching amplifier having an enhanced supply rejection. The switching amplifier comprises a digital modulator that provides a modulated signal. The switching amplifier further comprises a closed-loop analog driver that is coupled to the digital modulator. As disclosed, the closed-loop analog driver is configured to re-modulate a modulation signal that corresponds to the modulated signal. An output stage of the switching amplifier is driven by the re-modulated signal, thereby providing enhanced supply rejection. In one embodiment, the modulated signal is produced by a digital pulse-width modulator (PWM) circuit of a Class-D amplifier, and has a pulse rate substantially less than a clock rate of the digital PWM circuit. In one embodiment, the switching amplifier is implemented as an audio amplifier in a mobile communication device such as a cellular telephone.

公开(公告)号：US20120013402A1

公开(公告)日：2012-01-19

申请号：US12804318

申请日：2010-07-19

申请人： Jungwoo Song ,  Xicheng Jiang ,  Minsheng Wang ,  Todd L. Brooks

发明人： Jungwoo Song ,  Xicheng Jiang ,  Minsheng Wang ,  Todd L. Brooks

IPC分类号： H03F1/00

CPC分类号： H03F3/217

摘要： Disclosed is a closed-loop class-D amplifier circuit including a modulated reference signal generator that provides a modulated reference signal in a feed-forward path, where the reference signal is modulated corresponding to an input signal. The closed-loop class-D amplifier circuit further includes a comparator to generate a control signal based on a comparison of the modulated reference signal and a correction signal, which in turn is produced by filtering a combination of the input signal and a feedback signal. The closed-loop class-D amplifier circuit also includes a pulse generator to generate a pulse-width-modulated signal to drive an output stage of the closed-loop class-D amplifier based on the control signal.

摘要翻译： 公开了一种闭环D类放大器电路，其包括在前馈路径中提供调制参考信号的调制参考信号发生器，其中参考信号根据输入信号被调制。 闭环D类放大器电路还包括比较器，用于基于调制参考信号和校正信号的比较产生控制信号，校正信号又通过滤波输入信号和反馈信号的组合来产生。 闭环D类放大器电路还包括脉冲发生器，以产生脉冲宽度调制信号，以根据控制信号驱动闭环D类放大器的输出级。

公开(公告)号：US20110260793A1

公开(公告)日：2011-10-27

申请号：US12799598

申请日：2010-04-27

申请人： Xicheng Jiang ,  Jungwoo Song

发明人： Xicheng Jiang ,  Jungwoo Song

IPC分类号： H03F3/217

CPC分类号： H03F3/217

摘要： Disclosed is an amplifier circuit configured to amplify a pulse stream. The amplifier circuit comprises a switching block including a first switch operable to couple an output node of the switching block to a positive reference voltage, a second switch operable to couple the output node to a ground reference voltage and a third switch operable to couple the output node to a negative reference voltage. The amplifier circuit is configured to amplify the pulse stream into an amplified signal detectable at the output node such that the amplified signal has a common-mode voltage level substantially equal to zero volts. In one embodiment, the amplifier circuit is configured to amplify the pulse stream in accordance with a Class-D amplification scheme. In one embodiment, the output node can be directly connected to a load device without a DC blocking capacitor being interposed between the output node and the load device.

摘要翻译： 公开了一种被配置为放大脉冲流的放大器电路。 放大器电路包括切换块，其包括可操作以将切换块的输出节点耦合到正参考电压的第一开关，可操作以将输出节点耦合到接地参考电压的第二开关和可操作以将输出 节点到负参考电压。 放大器电路被配置为将脉冲流放大到在输出节点处可检测的放大信号，使得放大的信号具有基本上等于零伏特的共模电压电平。 在一个实施例中，放大器电路被配置为根据D类放大方案来放大脉冲流。 在一个实施例中，输出节点可以直接连接到负载装置，而不会在输出节点和负载装置之间插入直流阻塞电容器。

公开(公告)号：US08963236B2

公开(公告)日：2015-02-24

申请号：US13714396

申请日：2012-12-13

申请人： Jungwoo Song ,  Jaekyu Lee

发明人： Jungwoo Song ,  Jaekyu Lee

IPC分类号： H01L27/105 ,  H01L27/10 ,  H01L27/22 ,  H01L45/00 ,  H01L27/24 ,  H01L27/02

CPC分类号： H01L23/528 ,  H01L23/5226 ,  H01L27/0203 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L27/11 ,  H01L27/228 ,  H01L27/2436 ,  H01L27/2463 ,  H01L29/4236 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are data storage devices and methods of manufacturing the same. The device may include a plurality of cell selection parts formed in a substrate, a plate conductive pattern covering the cell selection parts and electrically connected to first terminals of the cell selection parts, a plurality of through-pillars penetrating the plate conductive pattern and insulated from the plate conductive pattern, and a plurality of data storage parts directly connected to the plurality of through-pillars, respectively. The data storage parts may be electrically connected to second terminals of the cell selection parts, respectively.

摘要翻译： 提供数据存储装置及其制造方法。 该器件可以包括形成在衬底中的多个电池选择部件，覆盖电池选择部分并电连接到电池选择部件的第一端子的板状导电图案，穿过板状导电图案并与之绝缘的多个贯通柱 板状导电图案，以及分别与多个贯通柱直接连接的多个数据存储部。 数据存储部分可以分别电连接到小区选择部分的第二终端。

公开(公告)号：US07547956B2

公开(公告)日：2009-06-16

申请号：US10975090

申请日：2004-10-28

申请人： Derek Tam ,  Jasmine Cheng ,  Jungwoo Song ,  Takayuki Hayashi

发明人： Derek Tam ,  Jasmine Cheng ,  Jungwoo Song ,  Takayuki Hayashi

IPC分类号： H01L23/58

CPC分类号： H01L29/93 ,  H01L29/94 ,  H03L7/0891 ,  H03L7/093 ,  H03L7/18

摘要： A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on the N-type substrate, a thick gate oxide layer formed over the P-type region, a P+ gate electrode formed over the thick gate oxide layer and coupled to a first voltage supply line, and P+ pick-up terminals formed in the P-type region adjacent the gate electrode and coupled to a second voltage supply line. The low-pass filter semiconductor device acts as a capacitor, whereby a gate-to-substrate voltage is maintained at less than zero volts to maintain a stable control voltage for the circuit.

摘要翻译： 提出了具有介电厚度的电路，其包括包括具有厚栅极氧化物层的一个或多个半导体器件的低通滤波器，而该电路的另外的半导体器件具有薄的栅极氧化物层。 低通滤波器半导体器件包括N型衬底，形成在N型衬底上的P型区，在P型区上形成的厚栅氧化层，形成在厚栅极氧化物上的P +栅电极 并且耦合到第一电压供应线，以及P +拾取端子，其形成在与栅电极相邻的P型区域中并且耦合到第二电压供应线。 低通滤波器半导体器件用作电容器，由此栅极至衬底的电压保持在小于零伏特以保持电路的稳定的控制电压。