公开(公告)号：US20150123265A1

公开(公告)日：2015-05-07

申请号：US14071865

申请日：2013-11-05

Applicant: Xilinx, Inc.

Inventor： Donnacha Lowney ,  Marites De La Torre ,  Christopher M. Gorman

IPC: H01L23/00

CPC classification number: H01L24/14 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/131 ,  H01L2224/14131 ,  H01L2224/14132 ,  H01L2224/14133 ,  H01L2224/1416 ,  H01L2224/14163 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/17517 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06568 ,  H01L2924/1425 ,  H01L2924/3511 ,  H01L2924/014

Abstract: An integrated circuit (IC) can include an analog region of a die of the IC. The analog region includes analog circuitry. The IC further includes a plurality of solder bumps implemented on a surface of the die in an area in vertical alignment with the analog region of the die.

Abstract translation: 集成电路（IC）可以包括IC的管芯的模拟区域。 模拟区域包括模拟电路。 IC还包括在与模具的模拟区域垂直对准的区域中在模具的表面上实现的多个焊料凸块。

公开(公告)号：US09128148B2

公开(公告)日：2015-09-08

申请号：US13789347

申请日：2013-03-07

Applicant: Xilinx, Inc.

Inventor： Donnacha Lowney ,  Marites De La Torre

IPC: G01R31/28 ,  H01L21/66 ,  H01L25/065 ,  G01R31/3185

CPC classification number: G01R31/2896 ,  G01R31/31855 ,  H01L22/34 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/58 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2924/15192 ,  H01L2924/15311

Abstract: An apparatus with package integrity monitoring capability, includes: a package having a die connected to an interposer through a plurality of bumps, wherein at least some of the bumps comprise dummy bumps; a package integrity monitor having a transmitter to transmit a test signal and a receiver to receive the test signal; and a first scan chain comprising a plurality of alternating interconnects in the die and in the interposer connecting some of the dummy bumps in series, wherein the first scan chain has a first end coupled to the transmitter of the package integrity monitor and a second end coupled to the receiver of the package integrity monitor.

Abstract translation: 一种具有封装完整性监测功能的装置，包括：具有通过多个凸块连接到插入件的管芯的封装，其中至少一些凸块包括虚拟凸块; 包装完整性监视器，具有发送测试信号的发射机和用于接收测试信号的接收机; 以及第一扫描链，其包括在所述管芯中的所述多个交替互连件和在所述插入器中串联连接所述虚设凸起的第一扫描链，其中所述第一扫描链具有耦合到所述封装完整性监视器的所述发射器的第一端， 到包装完整性监视器的接收器。

公开(公告)号：US09343418B2

公开(公告)日：2016-05-17

申请号：US14071865

申请日：2013-11-05

Applicant: Xilinx, Inc.

Inventor： Donnacha Lowney ,  Marites De La Torre ,  Christopher M. Gorman

IPC: H01L23/00 ,  H01L25/065

CPC classification number: H01L24/14 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/131 ,  H01L2224/14131 ,  H01L2224/14132 ,  H01L2224/14133 ,  H01L2224/1416 ,  H01L2224/14163 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/17517 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06568 ,  H01L2924/1425 ,  H01L2924/3511 ,  H01L2924/014

Abstract: An integrated circuit (IC) can include an analog region of a die of the IC. The analog region includes analog circuitry. The IC further includes a plurality of solder bumps implemented on a surface of the die in an area in vertical alignment with the analog region of the die.

Abstract translation: 集成电路（IC）可以包括IC的管芯的模拟区域。 模拟区域包括模拟电路。 IC还包括在与模具的模拟区域垂直对准的区域中在模具的表面上实现的多个焊料凸块。

公开(公告)号：US20140253171A1

公开(公告)日：2014-09-11

申请号：US13789347

申请日：2013-03-07

Applicant: XILINX, INC.

Inventor： Donnacha Lowney ,  Marites De La Torre

IPC: G01R31/28

CPC classification number: G01R31/2896 ,  G01R31/31855 ,  H01L22/34 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/58 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2924/15192 ,  H01L2924/15311

Abstract: An apparatus with package integrity monitoring capability, includes: a package having a die connected to an interposer through a plurality of bumps, wherein at least some of the bumps comprise dummy bumps; a package integrity monitor having a transmitter to transmit a test signal and a receiver to receive the test signal; and a first scan chain comprising a plurality of alternating interconnects in the die and in the interposer connecting some of the dummy bumps in series, wherein the first scan chain has a first end coupled to the transmitter of the package integrity monitor and a second end coupled to the receiver of the package integrity monitor.

Abstract translation: 一种具有封装完整性监测功能的装置，包括：具有通过多个凸块连接到插入件的管芯的封装，其中至少一些凸块包括虚拟凸块; 包装完整性监视器，具有发送测试信号的发射机和用于接收测试信号的接收机; 以及第一扫描链，其包括在所述管芯中的所述多个交替互连件和在所述插入器中串联连接所述虚设凸起的第一扫描链，其中所述第一扫描链具有耦合到所述封装完整性监视器的所述发射器的第一端， 到包装完整性监视器的接收器。