公开(公告)号：US07598792B2

公开(公告)日：2009-10-06

申请号：US11266486

申请日：2005-11-04

申请人： Yan-Fei Liu ,  Zhihua Yang ,  Wilson Eberle

发明人： Yan-Fei Liu ,  Zhihua Yang ,  Wilson Eberle

IPC分类号： H03K17/74

CPC分类号： H02M1/088 ,  H02M1/08 ,  H02M3/33592 ,  H02M3/3376 ,  Y02B70/1433 ,  Y02B70/1475

摘要： A resonate gate drive circuit for driving at least one power switching device recovers energy loss for charging and discharging the gate capacitance of the power switching devices. The gate drive circuit uses a current source to charge and discharge the gate capacitance with a high current, reducing the switching loss of the power switching device. The gate drive circuit comprises four semiconductor bidirectional conducting switching devices connected in a full-bridge configuration. An inductor connected across the bridge configuration provides the current source. The gate drive circuit may be used in single and dual high-side and low-side, symmetrical or complementary, power converter gate drive applications.

摘要翻译： 用于驱动至少一个功率开关装置的谐振栅极驱动电路恢复能量损耗，以便对功率开关器件的栅极电容进行充电和放电。 栅极驱动电路使用电流源以高电流对栅极电容进行充电和放电，从而降低功率开关器件的开关损耗。 栅极驱动电路包括以全桥配置连接的四个半导体双向导通开关器件。 通过桥接配置连接的电感器提供电流源。 栅极驱动电路可用于单和双高侧，低边，对称或互补的功率转换器栅极驱动应用。

公开(公告)号：US20060170043A1

公开(公告)日：2006-08-03

申请号：US11266486

申请日：2005-11-04

申请人： Yan-Fei Liu ,  Zhihua Yang ,  Wilson Eberle

发明人： Yan-Fei Liu ,  Zhihua Yang ,  Wilson Eberle

IPC分类号： H01L29/76 ,  H01L29/94

CPC分类号： H02M1/088 ,  H02M1/08 ,  H02M3/33592 ,  H02M3/3376 ,  Y02B70/1433 ,  Y02B70/1475

摘要： A resonate gate drive circuit for driving at least one power switching device recovers energy loss for charging and discharging the gate capacitance of the power switching devices. The gate drive circuit uses a current source to charge and discharge the gate capacitance with a high current, reducing the switching loss of the power switching device. The gate drive circuit comprises four semiconductor bidirectional conducting switching devices connected in a full-bridge configuration. An inductor connected across the bridge configuration provides the current source. The gate drive circuit may be used in single and dual high-side and low-side, symmetrical or complementary, power converter gate drive applications.

公开(公告)号：US07612602B2

公开(公告)日：2009-11-03

申请号：US11045055

申请日：2005-01-31

申请人： Zhihua Yang ,  Yan-Fei Liu

发明人： Zhihua Yang ,  Yan-Fei Liu

IPC分类号： H03K17/74

CPC分类号： H03K17/04163 ,  H02M1/08 ,  H03K17/04123

摘要： A resonate gate drive circuit for driving at least one power switching devices recovers energy loss for charging and discharging the input capacitance of the power switching devices. The gate drive circuit charging and discharging the gate capacitor with a high level current, so the switching loss of the power switching devices can also be reduced. The gate drive circuit can clamp and keep the voltage across the gate capacitor to a certain level while the power switching devices turn on, and it can also clamp and keep the voltage across the gate capacitor to almost zero while the power switching devices turn off. The gate drive circuit comprises four small semiconductor bidirectional conducting switching devices connected in full-bridge configuration. An inductor is connected to the two junctions of the full-bridge configuration to help switching the current direction. A capacitor in series with the inductor is necessary for some applications. A bootstrap circuit, which is widely used in conventional gate drive circuitry, is also necessary for this resonant gate drive circuit when it is adopted for high-side and low-side applications.

摘要翻译： 用于驱动至少一个电力开关装置的谐振栅极驱动电路恢复用于对功率开关装置的输入电容进行充电和放电的能量损失。 栅极驱动电路以高电平电流对栅极电容器进行充电和放电，因此也可以降低功率开关器件的开关损耗。 栅极驱动电路可以在功率开关器件导通的同时将栅极电容器两端的电压钳位并保持一定水平，并且在电源开关器件关闭时，它也可以钳位并保持栅极电容器两端的电压几乎为零。 栅极驱动电路包括以全桥配置连接的四个小型半导体双向导通开关装置。 电感器连接到全桥配置的两个连接点，以帮助切换电流方向。 与电感器串联的电容器对于某些应用是必需的。 当用于高边和低边应用时，该谐振栅极驱动电路也需要用于常规栅极驱动电路的自举电路。

公开(公告)号：US20060170042A1

公开(公告)日：2006-08-03

申请号：US11045055

申请日：2005-01-31

申请人： Zhihua Yang ,  Yan-Fei Liu

发明人： Zhihua Yang ,  Yan-Fei Liu

IPC分类号： H01L29/76

CPC分类号： H03K17/04163 ,  H02M1/08 ,  H03K17/04123

摘要： A resonate gate drive circuit for driving at least one power switching devices recovers energy loss for charging and discharging the input capacitance of the power switching devices. The gate drive circuit charging and discharging the gate capacitor with a high level current, so the switching loss of the power switching devices can also be reduced. The gate drive circuit can clamp and keep the voltage across the gate capacitor to a certain level while the power switching devices turn on, and it can also clamp and keep the voltage across the gate capacitor to almost zero while the power switching devices turn off. The gate drive circuit comprises four small semiconductor bidirectional 10 conducting switching devices connected in full-bridge configuration. An inductor is connected to the two junctions of the full-bridge configuration to help switching the current direction. A capacitor in series with the inductor is necessary for some applications. A bootstrap circuit, which is widely used in conventional gate drive circuitry, is also necessary for this resonant gate drive circuit when it is adopted for high-side and low-side applications.

摘要翻译： 用于驱动至少一个电力开关装置的谐振栅极驱动电路恢复用于对功率开关装置的输入电容进行充电和放电的能量损失。 栅极驱动电路以高电平电流对栅极电容器进行充电和放电，因此也可以降低功率开关器件的开关损耗。 栅极驱动电路可以在功率开关器件导通的同时将栅极电容器两端的电压钳位并保持一定水平，并且在电源开关器件关闭时，它也可以钳位并保持栅极电容器两端的电压几乎为零。 栅极驱动电路包括以全桥配置连接的四个小型半导体双向10导通开关装置。 电感器连接到全桥配置的两个连接点，以帮助切换电流方向。 与电感器串联的电容器对于某些应用是必需的。 当用于高边和低边应用时，该谐振栅极驱动电路也需要用于常规栅极驱动电路的自举电路。

公开(公告)号：US20220109048A1

公开(公告)日：2022-04-07

申请号：US17487117

申请日：2021-09-28

申请人： Zhanming Li ,  Yan-Fei Liu ,  Wai Tung Ng

发明人： Zhanming Li ,  Yan-Fei Liu ,  Wai Tung Ng

IPC分类号： H01L29/06 ,  H01L29/20 ,  H01L29/778 ,  H01L29/66

摘要： A gallium nitride (GaN) semiconductor device has first and second electrodes connected to a top metal layer disposed in complementary first and second irregular shapes, each irregular shape including a wide connection area at a first end, a tapered area, and a narrow area at a second end. The first and second irregular shapes are arranged adjacent each other along complementary edges such that a gap between the complementary edges is of substantially constant width. The first and second wide connection areas include pads for wire bond or land grid array electrical connections to external circuitry. The first and second irregular shapes for source and drain metal of a field effect transistor (FET) or high electron mobility transistor (HEMT) allows the width of the gate finger to be short so that electrical current injected from the gate can reach all portions of the gate fingers efficiently during high frequency switching, making the topology suitable for high voltage power devices.

公开(公告)号：US11107755B2

公开(公告)日：2021-08-31

申请号：US16871026

申请日：2020-05-10

申请人： Zhanming Li ,  Yue Fu ,  Yan-Fei Liu

发明人： Zhanming Li ,  Yue Fu ,  Yan-Fei Liu

IPC分类号： H01L23/495 ,  H01L23/00

摘要： Packaging methods and structures for lateral high voltage gallium nitride (GaN) devices achieve electrical isolation while also maintaining thermal dissipation. The electrical isolation reduces or eliminates vertical leakage current, improving high voltage performance. The packages may use or be compatible standards such as JEDEC, which reduces packaging cost and facilitates implementation of the packaged devices in conventional circuit design approaches.

公开(公告)号：US20190379374A1

公开(公告)日：2019-12-12

申请号：US16423138

申请日：2019-05-27

申请人： Zhanming Li ,  Yan-Fei Liu ,  Yue Fu ,  Wai Tung Ng

发明人： Zhanming Li ,  Yan-Fei Liu ,  Yue Fu ,  Wai Tung Ng

IPC分类号： H03K17/30 ,  H03K17/06 ,  H03K17/22

摘要： A gate driver circuit for a gallium nitride (GaN) power transistor includes a RS-flipflop that receives a first pulse train at an S input terminal and a second pulse train at an R input terminal, and produces an output pulse train, and an amplifier that amplifies the output pulse train and produces a gate driver signal for the GaN power transistor. The RS-flipflop and the amplifier may be implemented together on a GaN monolithic integrated circuit, optionally together with the GaN power transistor. The GaN power transistor may be a high-side switch of a half-bridge circuit. The RS-flipflop may be implemented with enhancement mode and depletion mode GaN high electron mobility transistors (HEMTs). Embodiments avoid drawbacks of prior hybrid (e.g., silicon-GaN) approaches, such as parasitic inductances from bonding wires and on-board metal traces, especially at high operating frequencies, as well as reduce implementation cost and improve performance.

公开(公告)号：US20180309383A1

公开(公告)日：2018-10-25

申请号：US15767721

申请日：2016-11-07

申请人： Yan-Fei LIU

发明人： Hongliang Wang ,  Yan-Fei Liu

IPC分类号： H02M7/483 ,  H02M1/32 ,  H02M7/5387

CPC分类号： H02M7/483 ,  H02M1/32 ,  H02M7/487 ,  H02M7/5387 ,  Y02E10/56

摘要： A five-voltage level inverter topology circuit, and three-phase and five-voltage level inverter topology circuit, suitable for use with two serial-connected direct current (DC) power sources (C1, C2), comprise: a half-bridge inverter circuit comprising a first circuit module (M1) and a second circuit module (M2). The half-bridge inverter circuit can output 5 voltage levels including a 0V level. The five-voltage level inverter topology circuit adopts a 5-voltage level half-bridge structure, and only requires an alternating current (AC) filtering inductor (L1), thereby reducing a system cost and size, removing a leakage current, and providing high efficiency.

公开(公告)号：US20080122422A1

公开(公告)日：2008-05-29

申请号：US11951228

申请日：2007-12-05

申请人： Wanfeng Zhang ,  Yan-Fei Liu ,  Bin Wu

发明人： Wanfeng Zhang ,  Yan-Fei Liu ,  Bin Wu

IPC分类号： H02M3/156

CPC分类号： H02M3/157 ,  H02M1/4225 ,  H02M2001/4275 ,  Y02B70/126 ,  Y02P80/112

摘要： A method and apparatus to implement parallel current mode control that is suitable for digital and analog implementation. A duty cycle algorithm is composed of a voltage term and a parallel current term which depends on the inductor current change between the inductor current value at the beginning of a switching cycle and the reference inductor current value at the end of that switching cycle. Parallel current mode control can be applied to all DC-DC converters, including both non-isolated and isolated topologies. It can also be applied to AC-DC converters with power factor correction.

摘要翻译： 一种适用于数字和模拟实现的并行电流模式控制的方法和装置。 占空比算法由电压项和并联电流项组成，取决于开关周期开始时的电感电流值与开关周期结束时的参考电感电流值之间的电感电流变化。 并联电流模式控制可应用于所有DC-DC转换器，包括非隔离和隔离拓扑。 它也可以应用于具有功率因数校正的AC-DC转换器。

公开(公告)号：US06980783B2

公开(公告)日：2005-12-27

申请号：US10265168

申请日：2002-10-03

申请人： Yan-Fei Liu ,  Raymond Orr ,  Kai Xu

发明人： Yan-Fei Liu ,  Raymond Orr ,  Kai Xu

IPC分类号： H02M3/156 ,  H04B1/10

CPC分类号： H02M3/156 ,  H02M2001/0009 ,  H02M2001/0022

摘要： A circuit controls the low frequency load currents drawn by components of telecommunications systems. The circuit includes a power converter, a first sense circuit, a second sense circuit, a comparator, and a power converter control circuit. The power converter control circuit controls the power converter's duty cycle in accordance with the input signal compared to a reference. In this manner, the low frequency load currents may be easily and economically controlled.

摘要翻译： 电路控制电信系统组件所绘制的低频负载电流。 该电路包括功率转换器，第一感测电路，第二感测电路，比较器和功率转换器控制电路。 功率转换器控制电路根据与参考相比的输入信号来控制功率转换器的占空比。 以这种方式，可以容易且经济地控制低频负载电流。