Method of pattern etching a dielectric film while removing a mask layer
    1.
    发明授权
    Method of pattern etching a dielectric film while removing a mask layer 有权
    在去除掩模层的同时刻蚀电介质膜的方法

    公开(公告)号:US08252192B2

    公开(公告)日:2012-08-28

    申请号:US12411565

    申请日:2009-03-26

    IPC分类号: C03C15/00 C03C25/68 C23F1/00

    摘要: A method of pattern etching a thin film on a substrate is described. The method comprises preparing a film stack on a substrate, wherein the film stack comprises a dielectric layer formed on the substrate and a mask layer formed above the dielectric layer. A pattern is created in the mask layer, and the pattern is transferred from the mask layer to the dielectric layer by performing a plasma etching process. While transferring the pattern to the dielectric layer, the mask layer is substantially removed using the plasma etching process. The plasma etching process can use a process gas comprising a first gaseous component that etches the dielectric layer at a greater rate than the mask layer, and a second gaseous component that etches the dielectric layer at a lesser rate than the mask layer.

    摘要翻译: 描述了在衬底上图案蚀刻薄膜的方法。 该方法包括在衬底上制备膜堆叠,其中膜堆叠包括形成在衬底上的电介质层和形成在电介质层上方的掩模层。 在掩模层中形成图案,通过进行等离子体蚀刻工艺,将图案从掩模层转印到电介质层。 当将图案转印到电介质层时,使用等离子体蚀刻工艺基本上去除掩模层。 等离子体蚀刻工艺可以使用包括以比掩模层更高的速率蚀刻电介质层的第一气态组分的工艺气体和以比掩模层更低的速率蚀刻介电层的第二气体组分。

    Method for etching a silicon-containing ARC layer to reduce roughness and CD
    2.
    发明授权
    Method for etching a silicon-containing ARC layer to reduce roughness and CD 有权
    用于蚀刻含硅ARC层以减少粗糙度和CD的方法

    公开(公告)号:US07998872B2

    公开(公告)日:2011-08-16

    申请号:US12026913

    申请日:2008-02-06

    IPC分类号: H01L21/302

    摘要: A method of dry developing a multi-layer mask having a silicon-containing anti-reflective coating (ARC) layer on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying the silicon-containing ARC layer. A feature pattern is then formed in the lithographic layer using a lithographic process, wherein the feature pattern comprises a first critical dimension (CD). Thereafter, the feature pattern is transferred from the lithographic layer to the silicon-containing ARC layer using a dry plasma etching process, wherein the first CD in the lithographic layer is reduced to a second CD in the silicon-containing layer and a first edge roughness is reduced to a second edge roughness in the silicon-containing ARC layer.

    摘要翻译: 描述了在衬底上干燥显影具有含硅抗反射涂层(ARC)层的多层掩模的方法。 该方法包括在衬底上形成多层掩模,其中多层掩模包括覆盖含硅ARC层的光刻层。 然后使用光刻工艺在光刻层中形成特征图案,其中特征图案包括第一临界尺寸(CD)。 此后,使用干等离子体蚀刻工艺将特征图案从光刻层转移到含硅ARC层,其中光刻层中的第一CD被还原成含硅层中的第二CD,并且第一边缘粗糙度 在含硅ARC层中减少到第二边缘粗糙度。

    METHOD FOR ETCHING A SILICON-CONTAINING ARC LAYER TO REDUCE ROUGHNESS AND CD
    3.
    发明申请
    METHOD FOR ETCHING A SILICON-CONTAINING ARC LAYER TO REDUCE ROUGHNESS AND CD 有权
    用于蚀刻含硅的ARC层以减少粗糙度和CD的方法

    公开(公告)号:US20090197420A1

    公开(公告)日:2009-08-06

    申请号:US12026913

    申请日:2008-02-06

    IPC分类号: H01L21/302

    摘要: A method of dry developing a multi-layer mask having a silicon-containing anti-reflective coating (ARC) layer on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying the silicon-containing ARC layer. A feature pattern is then formed in the lithographic layer using a lithographic process, wherein the feature pattern comprises a first critical dimension (CD). Thereafter, the feature pattern is transferred from the lithographic layer to the silicon-containing ARC layer using a dry plasma etching process, wherein the first CD in the lithographic layer is reduced to a second CD in the silicon-containing layer and a first edge roughness is reduced to a second edge roughness in the silicon-containing ARC layer.

    摘要翻译: 描述了在衬底上干燥显影具有含硅抗反射涂层(ARC)层的多层掩模的方法。 该方法包括在衬底上形成多层掩模,其中多层掩模包括覆盖含硅ARC层的光刻层。 然后使用光刻工艺在光刻层中形成特征图案,其中特征图案包括第一临界尺寸(CD)。 此后,使用干等离子体蚀刻工艺将特征图案从光刻层转移到含硅ARC层,其中光刻层中的第一CD被还原成含硅层中的第二CD,并且第一边缘粗糙度 在含硅ARC层中减少到第二边缘粗糙度。

    Low damage method for ashing a substrate using CO2/CO-based process
    4.
    发明授权
    Low damage method for ashing a substrate using CO2/CO-based process 有权
    使用基于CO 2 / CO的工艺对基体进行灰化的低损伤方法

    公开(公告)号:US07637269B1

    公开(公告)日:2009-12-29

    申请号:US12511832

    申请日:2009-07-29

    IPC分类号: B08B6/00

    摘要: A method for removing a mask layer and reducing damage to a patterned dielectric layer is described. The method comprises disposing a substrate in a plasma processing system, wherein the substrate has a dielectric layer formed thereon and a mask layer overlying the dielectric layer. A pattern is formed in the mask layer and a feature formed in the dielectric layer corresponding to the pattern as a result of an etching process used to transfer the pattern in the mask layer to the dielectric layer. The feature includes a sidewall with a first roughness resulting from the etching process. A process gas comprising CO2 and CO is introduced into the plasma processing system, and plasma is formed. The mask layer is removed, and a second roughness, less than the first roughness, is produced by selecting a flow rate of the CO relative to a flow rate of the CO2.

    摘要翻译: 描述了去除掩模层并减少对图案化电介质层的损伤的方法。 该方法包括在等离子体处理系统中设置衬底,其中衬底具有形成在其上的电介质层和覆盖在电介质层上的掩模层。 在掩模层中形成图案,并且形成在与图案对应的电介质层中的特征,作为用于将掩模层中的图案转印到电介质层的蚀刻工艺的结果。 该特征包括由蚀刻工艺产生的具有第一粗糙度的侧壁。 将包含CO 2和CO的工艺气体引入等离子体处理系统中,形成等离子体。 除去掩模层,通过选择CO相对于CO 2的流量的流量来产生小于第一粗糙度的第二粗糙度。

    Etching apparatus
    6.
    发明授权

    公开(公告)号:US08361275B2

    公开(公告)日:2013-01-29

    申请号:US13415566

    申请日:2012-03-08

    IPC分类号: H01L21/3065

    摘要: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.

    Optical communication device, optical communication system, optical output control method and program
    7.
    发明授权
    Optical communication device, optical communication system, optical output control method and program 有权
    光通信设备,光通信系统,光输出控制方法和程序

    公开(公告)号:US08190023B2

    公开(公告)日:2012-05-29

    申请号:US12511432

    申请日:2009-07-29

    申请人: Masaru Nishino

    发明人: Masaru Nishino

    IPC分类号: H04B10/00

    摘要: An input of a command to stop optical output or a command to reduce optical output by a main signal transmitting section is received from the outside. When the input of the optical output stop command or optical output reduction command is received, an inter-device control signal communication section transmits the optical output stop command or optical output reduction command. Based on the input optical output stop command or optical output reduction command, an output of optical signals from the main signal transmitting section is stopped, or else the output level is reduced to less than the output level during normal operation.

    摘要翻译: 从外部接收输入停止光输出的命令的输入或减少主信号发送部的光输出的指令。 当接收到光输出停止命令或光输出降低命令的输入时,设备间控制信号通信部分发送光输出停止命令或光输出减少命令。 基于输入光输出停止命令或光输出降低命令,停止来自主信号发送部的光信号的输出,否则输出电平在正常工作期间降低到小于输出电平。

    ETCHING METHOD AND APPARATUS
    8.
    发明申请
    ETCHING METHOD AND APPARATUS 审中-公开
    蚀刻方法和装置

    公开(公告)号:US20100116786A1

    公开(公告)日:2010-05-13

    申请号:US12690795

    申请日:2010-01-20

    IPC分类号: C23F1/00 C23F1/08

    摘要: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.

    摘要翻译: 当通过使用包含含有卤素和碳的第一气体并且具有每分子碳数为两个或更少碳原子的第一气体的处理气体来蚀刻基板时,同时从气体供应源的中央和外围部分向基板供应处理气体 单元,分别面对基板的中心部分和周边部分,供应处理气体,使得中心部分的气体流量比在周边部分中更大。 当通过使用包含含有卤素和碳的第二气体并且每分子具有三个或更多个碳数的第二气体的处理气体进行蚀刻时,提供处理气体,使得周边部分的气体流量比在 中央部分

    Level-flattening circuit for WDM optical signals
    9.
    发明授权
    Level-flattening circuit for WDM optical signals 有权
    WDM光信号的平坦化电路

    公开(公告)号:US06594046B1

    公开(公告)日:2003-07-15

    申请号:US09307976

    申请日:1999-05-10

    申请人: Masaru Nishino

    发明人: Masaru Nishino

    IPC分类号: H04J1402

    摘要: It is an object of the invention to provide a level-flattening circuit for WDM optical signals which can be used in an optical signal repeating station. A level flattening circuit for WDM optical signals is supplied with WDM optical signal and demultiplexs them into individual optical signals having different wavelengths, levels of which are separately feedback controlled to provide flattened optical signal levels.

    摘要翻译: 本发明的目的是提供一种可用于光信号重复站的WDM光信号的电平平坦电路。 用于WDM光信号的电平扁平电路被提供有WDM光信号,并将其解复用为具有不同波长的各个光信号,其电平被单独反馈控制以提供平坦化的光信号电平。

    Damage-free ashing process and system for post low-k etch
    10.
    发明申请
    Damage-free ashing process and system for post low-k etch 有权
    用于后低k蚀刻的无损灰化过程和系统

    公开(公告)号:US20070032087A1

    公开(公告)日:2007-02-08

    申请号:US11195854

    申请日:2005-08-03

    IPC分类号: H01L21/461

    CPC分类号: H01L21/76814 H01L21/02063

    摘要: A process is provided for substrate ashing following the etching of features in a low dielectric constant (low-k) layer. The low-k layer can include ultra-low-k material, or a porous low-k material. The process may be configured to remove etch byproducts while preserving feature critical dimension. The ashing process comprises the use of a nitrogen and hydrogen containing chemistry with a passivation chemistry that includes oxygen, such as O2, CO, or CO2, or any combination thereof.

    摘要翻译: 提供了在低介电常数(低k)层中蚀刻特征之后的基板灰化的工艺。 低k层可以包括超低k材料或多孔低k材料。 该过程可以被配置为移除蚀刻副产物,同时保留特征临界尺寸。 灰化过程包括使用具有包含氧的钝化化学物质的氮和氢化学物质,例如O 2,CO或CO 2,或其任何组合 。