Systems and methods for composite persistence units
    3.
    发明授权
    Systems and methods for composite persistence units 有权
    复合持续单元的系统和方法

    公开(公告)号:US09177033B2

    公开(公告)日:2015-11-03

    申请号:US13332148

    申请日:2011-12-20

    IPC分类号: G06F17/30

    CPC分类号: G06F17/30557

    摘要: In an EclipseLink environment, persistence units are associated with a single data source. However, in accordance with an embodiment, a user can define multiple persistence units, each with a different set of entity types (i.e., classes) stored in multiple data sources, and expose them through a single composite persistence unit which combines the entities from across the multiple data sources through a single persistence context. A plurality of different types of data sources can be used, including Java Transaction API (JTA) and non-JTA data sources as well as EclipseLink's native JDBC connection pools. Each member persistence unit continues mapping its classes to its own data source. Therefore, a composite persistence unit allows one to map different entities to different data sources. Composite persistence units can be created at runtime.

    摘要翻译: 在EclipseLink环境中,持久性单元与单个数据源相关联。 然而,根据实施例,用户可以定义多个持久性单元,每个单元具有存储在多个数据源中的不同实体类型集合(即,类),并且通过单个复合持久化单元来暴露它们,该组合持续单元将来自跨 多个数据源通过单个持久化上下文。 可以使用多种不同类型的数据源,包括Java Transaction API(JTA)和非JTA数据源以及EclipseLink的本机JDBC连接池。 每个成员持久化单元继续将其类映射到自己的数据源。 因此,复合持久化单元允许将不同实体映射到不同的数据源。 可以在运行时创建复合持久化单元。

    Logical three dimensional interconnections between integrated circuit
chips using a two dimensional multi-chip module
    4.
    发明授权
    Logical three dimensional interconnections between integrated circuit chips using a two dimensional multi-chip module 失效
    使用二维多芯片模块的集成电路芯片之间的逻辑三维互连

    公开(公告)号:US5543640A

    公开(公告)日:1996-08-06

    申请号:US536076

    申请日:1995-09-29

    摘要: A high capacity gate array which incorporates an effectively three dimensional interconnect network. The array is formed from multiple smaller arrays which are connected to a common substrate by means of flip-chip bonding. The substrate is typically a multi-layer substrate which has interconnect lines embedded on or within it, thereby allowing a set of desired interconnections between the smaller logic cell arrays to be implemented. The contact points for connecting logic cells or arrays of cells to the substrate result from placing a multitude of solder bumps on the smaller arrays of logic cells at desired interconnect points. Connecting the interconnect point solder bumps to the multi-layer substrate then permits the individual logic cell arrays to be interconnected in a desired manner. A three dimensional interconnect network is realized by interconnecting corresponding points on different logic cell arrays so that the arrays are connected in parallel. This has the effect of producing a three dimensional interconnect network from a two dimensional arrangement of arrays or chips in a MCM package. The result is a high gate capacity logic device having an increased degree of gate utilization and shortened average interconnect distances, thereby enabling the production of complex devices which have a faster operating speed.

    摘要翻译: 一个高容量门阵列,它结合了有效的三维互连网络。 阵列由多个较小的阵列形成,其通过倒装芯片接合连接到公共基板。 衬底通常是具有嵌入其中或其内部的互连线的多层衬底,从而允许在较小的逻辑单元阵列之间实现一组期望的互连。 将逻辑单元或单元阵列连接到基板的接触点是将多个焊料凸块放置在所需互连点上较小的逻辑单元阵列上。 将互连点焊料凸块连接到多层基板然后允许各个逻辑单元阵列以期望的方式互连。 通过互连不同逻辑单元阵列上的对应点来实现三维互连网络,使得阵列并联连接。 这具有从MCM封装中的阵列或芯片的二维排列产生三维互连网络的效果。 结果是具有增加的栅极利用程度和缩短的平均互连距离的高栅极容量逻辑器件,从而能够生产具有更快的工作速度的复杂器件。

    SYSTEMS AND METHODS FOR COMPOSITE PERSISTENCE UNITS
    5.
    发明申请
    SYSTEMS AND METHODS FOR COMPOSITE PERSISTENCE UNITS 有权
    复合材料单体的系统与方法

    公开(公告)号:US20130086119A1

    公开(公告)日:2013-04-04

    申请号:US13332148

    申请日:2011-12-20

    IPC分类号: G06F17/30

    CPC分类号: G06F17/30557

    摘要: In an EclipseLink environment, persistence units are associated with a single data source. However, in accordance with an embodiment, a user can define multiple persistence units, each with a different set of entity types (i.e., classes) stored in multiple data sources, and expose them through a single composite persistence unit which combines the entities from across the multiple data sources through a single persistence context. A plurality of different types of data sources can be used, including Java Transaction API (JTA) and non-JTA data sources as well as EclipseLink's native JDBC connection pools. Each member persistence unit continues mapping its classes to its own data source. Therefore, a composite persistence unit allows one to map different entities to different data sources. Composite persistence units can be created at runtime.

    摘要翻译: 在EclipseLink环境中,持久性单元与单个数据源相关联。 然而,根据实施例,用户可以定义多个持久性单元,每个单元具有存储在多个数据源中的不同实体类型集合(即,类),并且通过单个复合持久化单元来暴露它们,该组合持续单元将来自跨 多个数据源通过单个持久化上下文。 可以使用多种不同类型的数据源,包括Java Transaction API(JTA)和非JTA数据源以及EclipseLink的本机JDBC连接池。 每个成员持久化单元继续将其类映射到自己的数据源。 因此,复合持久化单元允许将不同实体映射到不同的数据源。 可以在运行时创建复合持久化单元。

    Wheelchair bridge
    6.
    发明授权
    Wheelchair bridge 失效
    轮椅桥

    公开(公告)号:US07438363B1

    公开(公告)日:2008-10-21

    申请号:US11975355

    申请日:2007-10-17

    申请人: James Sutherland

    发明人: James Sutherland

    IPC分类号: A47B97/00

    摘要: A bridge that is attached to a wheelchair such that the bridge allows a wheelchair user to have support for ingress into and egress from the wheelchair without assistance and without the need to rely primarily on arm strength alone. The bridge is a generally L-shaped member that has a pair of aligned slits located on a lower portion thereof such that respective connection members pass through each slit and attach the bridge to a frame of the wheelchair the connection members allowing the bridge to be pivoted out of the way when needed.

    摘要翻译: 连接到轮椅上的桥梁,使得桥梁允许轮椅使用者在没有帮助的情况下支撑进入和离开轮椅而不需要主要依靠手臂强度。 桥是大致L形的构件,其具有位于其下部的一对对齐的狭缝,使得各个连接构件穿过每个狭缝并且将桥连接到轮椅的框架,使得桥可枢转的连接构件 在需要的时候出来。

    Chronological data record access
    7.
    发明申请
    Chronological data record access 审中-公开
    按时间顺序数据记录访问

    公开(公告)号:US20050125458A1

    公开(公告)日:2005-06-09

    申请号:US10729942

    申请日:2003-12-09

    IPC分类号: G06F17/30

    CPC分类号: G06F16/25

    摘要: The Chronological Data Record Access (“CDRA”) is an internal chain that is used in a Memory Based Database Environment (MBE) to propagate records stored in volatile memory to other mirrored systems, databases, disks, etc. The CDRA associates the latest modified version of a data record and is used to process modified records without the need to queue or move the data image. The CDRA creates support in a shared-nothing environment and time-sequenced handling of information updates so that all entities may work with current information in a timely fashion.

    摘要翻译: 按时间顺序数据记录访问(“CDRA”)是一种内部链,用于基于内存的数据库环境(MBE),将存储在易失性存储器中的记录传播到其他镜像系统,数据库,磁盘等。CDRA将最新修改 版本的数据记录,用于处理修改的记录,而不需要排队或移动数据图像。 CDRA在无共享环境中创建支持,并对信息更新进行时间排序处理,以便所有实体可以及时处理当前信息。

    Transverse closed-loop resonator
    10.
    发明申请
    Transverse closed-loop resonator 失效
    横向闭环谐振器

    公开(公告)号:US20060072875A1

    公开(公告)日:2006-04-06

    申请号:US10960831

    申请日:2004-10-06

    IPC分类号: G02B6/26 G02B6/02

    摘要: A transverse closed-loop fiber resonator (10) includes an inner cladding (102) having a surface (300) peripherally forming a closed-loop shape for confining light to the surface (300). The inner cladding has a first diameter thickness (104) and a first index of refraction profile in a cross-sectional portion of the transverse closed-loop fiber resonator (10). A ringed-core (120) corresponding to the closed-loop shape is disposed on the corresponding surface of the inner cladding (102). The ringed-core (120) has a second thickness (124) of material thinner than the first diameter thickness (104), and a second index of refraction profile greater than the first index of the inner cladding by an index delta in the cross-sectional portion of the transverse closed-loop fiber resonator such that the ringed-core can guide light within the ringed-core traversely around the closed-loop shape.

    摘要翻译: 横向闭环光纤谐振器(10)包括具有外围形成用于将光限制到表面(300)的闭环形状的表面(300)的内包层(102)。 内包层在横向闭环光纤谐振器(10)的横截面部分具有第一直径厚度(104)和第一折射率折射率。 对应于闭环形状的环形芯(120)设置在内包层(102)的相应表面上。 环形芯(120)具有比第一直径厚度(104)更薄的材料的第二厚度(124),并且第二折射率分布大于内包层的第一折射率, 横向闭环光纤谐振器的横截面部分,使得环形芯能围绕闭环形状横向移动环形芯内的光。