Active-load dominant circuit for common-mode glitch interference cancellation
    1.
    发明授权
    Active-load dominant circuit for common-mode glitch interference cancellation 有权
    用于共模干扰消除的有源负载主导电路

    公开(公告)号:US07719325B1

    公开(公告)日:2010-05-18

    申请号:US12273011

    申请日:2008-11-18

    IPC分类号: H03B1/00

    CPC分类号: H03K5/1252 H03K17/162

    摘要: An active-load dominant circuit for common-mode glitch interference cancellation, biased between a first voltage potential and a second voltage potential with an accompanying common-mode glitch interferer. The active-load dominant circuit includes a pair of pull-up networks and a pair of active-load networks. The common-mode glitch interferer is cancelled out due to a symmetric structure of the pair of pull-up networks. At least one set signal and at least one reset signal are provided to a latch in response to a clock signal or a complemented clock signal. At least one of the set signal and the reset signal can be pulled up to the first voltage potential or pulled down to the second voltage potential. The voltage difference of the set signal and the reset signal is large enough for a latch.

    摘要翻译: 用于共模干扰消除的有源负载主导电路,其在第一电压电势和第二电压电位之间被偏置,并具有伴随的共模故障干扰源。 有源负载主导电路包括一对上拉网络和一对有源负载网络。 由于一对上拉网络的对称结构,共模干扰信号被抵消。 至少一个设置信号和至少一个复位信号响应于时钟信号或补码时钟信号提供给锁存器。 设定信号和复位信号中的至少一个可以被上拉至第一电压电位或下拉至第二电压电位。 设定信号和复位信号的电压差对于锁存器来说足够大。

    ACTIVE-LOAD DOMINANT CIRCUIT FOR COMMON-MODE GLITCH INTERFERENCE CANCELLATION
    2.
    发明申请
    ACTIVE-LOAD DOMINANT CIRCUIT FOR COMMON-MODE GLITCH INTERFERENCE CANCELLATION 有权
    用于通用模式干扰消除的主动负载电路

    公开(公告)号:US20100123501A1

    公开(公告)日:2010-05-20

    申请号:US12273011

    申请日:2008-11-18

    IPC分类号: H03K3/35 H03K3/289

    CPC分类号: H03K5/1252 H03K17/162

    摘要: “An active-load dominant circuit for common-mode glitch interference cancellation, biased between a first voltage potential and a second voltage potential with an accompanying common-mode glitch interferer. The active-load dominant circuit includes a pair of pull-up networks and a pair of active-load networks. The common-mode glitch interferer is cancelled out due to a symmetric structure of the pair of pull-up networks. At least one set signal and at least one reset signal are provided to a latch in response to a clock signal or a complemented clock signal. At least one of the set signal and the reset signal can be pulled up to the first voltage potential or pulled down to the second voltage potential. The voltage difference of the set signal and the reset signal is large enough for a latch.”

    摘要翻译: “用于共模故障干扰消除的有源负载主导电路,其在第一电压电位和第二电压电位之间被偏置,并具有伴随的共模故障干扰源。 有源负载主导电路包括一对上拉网络和一对有源负载网络。 由于一对上拉网络的对称结构,共模干扰信号被抵消。 至少一个设置信号和至少一个复位信号响应于时钟信号或补码时钟信号提供给锁存器。 设定信号和复位信号中的至少一个可以被上拉至第一电压电位或下拉至第二电压电位。 设定信号和复位信号的电压差对于锁存器来说足够大。

    Fixed dead time PFC controller
    3.
    发明授权
    Fixed dead time PFC controller 失效
    固定死区PFC控制器

    公开(公告)号:US08390357B2

    公开(公告)日:2013-03-05

    申请号:US13118208

    申请日:2011-05-27

    IPC分类号: G06F1/04

    摘要: A fixed dead time PFC controller, comprising: an amplitude normalization circuit, used to generate a normalized signal according to a full-wave rectified input voltage; a comparator circuit, used to compare the normalized signal with a threshold voltage to generate a select signal, wherein the select signal exhibits a first state when the normalized signal is higher than the threshold voltage, and a second state when the normalized signal is lower than the threshold voltage; and a driving signal selection circuit, having a first input end coupled to a first driving signal, a second input end coupled to a second driving signal, a control end coupled to the select signal, and an output end for outputting a gate driving signal.

    摘要翻译: 一种固定死区PFC控制器,包括:振幅归一化电路,用于根据全波整流输入电压产生归一化信号; 比较器电路,用于将归一化信号与阈值电压进行比较以产生选择信号,其中当归一化信号高于阈值电压时,选择信号呈现第一状态,当归一化信号低于阈值电压时,第二状态 阈值电压; 以及驱动信号选择电路,其具有耦合到第一驱动信号的第一输入端,耦合到第二驱动信号的第二输入端,耦合到选择信号的控制端以及用于输出栅极驱动信号的输出端。

    Primary-side feedback control device and related method for a power converter
    4.
    发明授权
    Primary-side feedback control device and related method for a power converter 有权
    一次侧反馈控制装置及其相关方法

    公开(公告)号:US07911815B2

    公开(公告)日:2011-03-22

    申请号:US12346879

    申请日:2008-12-31

    IPC分类号: H02M3/335

    CPC分类号: H02M3/33523

    摘要: A primary-side feedback control device for a power converter includes a control unit for generating a pulse signal according to a feedback signal for controlling on and off states of a switching transistor of the power converter, a comparator coupled to an auxiliary winding of a primary side of the power converter for generating at least one control signal according to a voltage on the auxiliary winding and a reference voltage, a sample-and-hold unit coupled to the auxiliary winding, the comparator, and the control unit for generating the feedback signal according to the voltage on the auxiliary winding and the at least one control signal, and a voltage generator coupled to the control unit, the comparator, and the sample-and-hold unit for generating the reference voltage according to the feedback signal.

    摘要翻译: 用于功率转换器的初级侧反馈控制装置包括:控制单元,用于根据用于控制功率转换器的开关晶体管的导通和截止状态的反馈信号产生脉冲信号;比较器,耦合到初级侧的辅助绕组; 用于根据辅助绕组上的电压和参考电压产生至少一个控制信号的电源转换器侧,耦合到辅助绕组的采样和保持单元,比较器和控制单元,用于产生反馈信号 根据辅助绕组上的电压和至少一个控制信号,以及耦合到控制单元,比较器和采样保持单元的电压发生器,用于根据反馈信号产生参考电压。

    QUASI-RESONANT VALLEY VOLTAGE DETECTING METHOD AND APPARATUS
    5.
    发明申请
    QUASI-RESONANT VALLEY VOLTAGE DETECTING METHOD AND APPARATUS 有权
    QUASI-RESONANT VALLEY电压检测方法和装置

    公开(公告)号:US20100315062A1

    公开(公告)日:2010-12-16

    申请号:US12482358

    申请日:2009-06-10

    IPC分类号: G01R19/00

    CPC分类号: G01R19/0084

    摘要: The present invention discloses a quasi-resonant valley voltage detecting method, comprising the steps of: generating a valley detection signal by detecting a valley of a first quasi-resonant signal; generating a count value by counting the valley detection signal; and determining a level transition instance of a gating signal according to the count value, wherein the level transition instance of the gating signal is pulled back by the valley detection signal to trace the valley of the first quasi-resonant signal. The present invention also provides a quasi-resonant valley voltage detecting apparatus.

    摘要翻译: 本发明公开了一种准谐振谷值电压检测方法,包括以下步骤:通过检测第一准谐振信号的谷值产生谷值检测信号; 通过对谷值检测信号进行计数来生成计数值; 以及根据所述计数值确定门控信号的电平转换实例,其中门控信号的电平转换实例被谷值检测信号拉回以跟踪第一准谐振信号的谷值。 本发明还提供一种准谐振谷值电压检测装置。

    PFC LED driver capable of reducing current ripple
    6.
    发明授权
    PFC LED driver capable of reducing current ripple 有权
    PFC LED驱动器,能够减少电流纹波

    公开(公告)号:US08692475B2

    公开(公告)日:2014-04-08

    申请号:US13569749

    申请日:2012-08-08

    申请人: Yen-Hui Wang

    发明人: Yen-Hui Wang

    IPC分类号: H05B37/00

    CPC分类号: H05B33/083

    摘要: A PFC LED driver capable of reducing current ripple, comprising: a current source unit, having a control terminal coupled to a control voltage, which is a ratio of a full-wave rectified line input voltage, a first channel terminal coupled to a power line, and a second channel terminal used to generate an output current according to the control voltage; and at least one LED load unit, being in series with the current source unit, wherein each of the at least one LED load unit comprises: a first load, including a first parallel combination of an LED module and a capacitor, wherein the LED module has at least one light emitting diode; a diode, being in a first series combination with the first load; and a switch, being in a second parallel combination with the second series combination.

    摘要翻译: 一种能够减少电流纹波的PFC LED驱动器,包括:电流源单元,其具有耦合到控制电压的控制端子,所述控制端子是全波整流线路输入电压的比率,耦合到电力线的第一通道端子 以及用于根据控制电压产生输出电流的第二通道端子; 以及与所述电流源单元串联的至少一个LED负载单元,其中所述至少一个LED负载单元中的每一个包括:包括LED模块和电容器的第一并联组合的第一负载,其中所述LED模块 具有至少一个发光二极管; 二极管,与第一负载处于第一串联组合; 以及与第二串联组合处于第二并联组合的开关。

    Voltage level clamping circuit and comparator module
    7.
    发明授权
    Voltage level clamping circuit and comparator module 失效
    电压钳位电路和比较器模块

    公开(公告)号:US07656217B2

    公开(公告)日:2010-02-02

    申请号:US11934792

    申请日:2007-11-05

    IPC分类号: H03K5/08 H03L5/00

    CPC分类号: H03K5/08 H03K5/24

    摘要: A voltage level clamping circuit which can be implemented in an integrated circuit (IC) and a high-speed comparator module, wherein the IC includes a parasitic diode coupled between a first voltage source and a second voltage source. The voltage level clamping circuit includes a switch module coupled between the first voltage source and the second voltage source and a comparator module having an output terminal coupled to the switch module, a first input terminal coupled to the first voltage source, and a second input terminal coupled to the second voltage source, for comparing a voltage level of the first voltage source with a voltage level of the second voltage source to generate an output signal, and transmitting the output signal to the switch module to control a conducting state of the switch module to selectively clamp the voltage level of the second voltage source.

    摘要翻译: 一种可以在集成电路(IC)和高速比较器模块中实现的电压电平钳位电路,其中IC包括耦合在第一电压源和第二电压源之间的寄生二极管。 电压电平钳位电路包括耦合在第一电压源和第二电压源之间的开关模块和具有耦合到开关模块的输出端子的比较器模块,耦合到第一电压源的第一输入端子和第二输入端子 耦合到所述第二电压源,用于将所述第一电压源的电压电平与所述第二电压源的电压电平进行比较以产生输出信号,以及将所述输出信号发送到所述开关模块以控制所述开关模块的导通状态 以选择性地钳位第二电压源的电压电平。

    Current-level Controlling Device for a Power Supply Device and Related Power Supply Device
    8.
    发明申请
    Current-level Controlling Device for a Power Supply Device and Related Power Supply Device 有权
    电源装置和相关电源装置的电流控制装置

    公开(公告)号:US20090256545A1

    公开(公告)日:2009-10-15

    申请号:US12336537

    申请日:2008-12-17

    IPC分类号: G05F5/00

    CPC分类号: H02M3/33507

    摘要: A current-level controlling device for a power supply includes a reception end for receiving a current sense signal, a reference voltage generator for generating a reference voltage, an adaptive reference voltage generator, coupled to the reference voltage generator and the reception end, for adjusting the reference voltage according to variation of peak values of the current sense signal, so as to generate an adaptive reference voltage, a comparator, coupled to the reception end and the adaptive reference voltage generator, for comparing the current sense signal and the adaptive reference voltage, to generate a comparison result, and a control unit, coupled to the comparator, for controlling a switch transistor of the power supply according to the comparison result.

    摘要翻译: 用于电源的电流电平控制装置包括用于接收电流感测信号的接收端,用于产生参考电压的参考电压发生器,耦合到参考电压发生器和接收端的自适应参考电压发生器,用于调整 根据电流检测信号的峰值的变化产生参考电压,以产生耦合到接收端和自适应参考电压发生器的自适应参考电压,比较器,用于比较电流检测信号和自适应参考电压 ,以产生比较结果,以及耦合到比较器的控制单元,用于根据比较结果控制电源的开关晶体管。

    Comparator circuit for analog-to-digital converter
    9.
    发明授权
    Comparator circuit for analog-to-digital converter 有权
    模拟 - 数字转换器的比较器电路

    公开(公告)号:US06404374B1

    公开(公告)日:2002-06-11

    申请号:US09689674

    申请日:2000-10-13

    IPC分类号: H03M136

    CPC分类号: H03M1/0646 H03M1/36

    摘要: A comparator circuit used in an analog-to-digital converter includes an input voltage signal line; a reference voltage signal line; a plurality of comparators connected to said input voltage signal line and said reference voltage signal line; a plurality of amplifiers corresponding separately to each of said plurality of comparators and connected respectively between said input voltage signal lines, said reference voltage signal lines, and their corresponding comparators; and a thermocode channel connected to outputs of said plurality of comparators. A plurality of resistors with resistances in a constant ratio are provided in said reference voltage signal line and each is connected between the inputs of two adjacent amplifiers. A plurality of averaging capacitors are provided and each is connected between the outputs of two adjacent comparators; wherein said plurality of averaging capacitors may have the same capacitance.

    摘要翻译: 在模数转换器中使用的比较器电路包括输入电压信号线; 参考电压信号线; 连接到所述输入电压信号线和所述参考电压信号线的多个比较器; 多个放大器分别对应于所述多个比较器中的每一个并分别连接在所述输入电压信号线,所述参考电压信号线及其对应的比较器之间; 以及连接到所述多个比较器的输出端的热电极通道。 在所述参考电压信号线中提供具有恒定比例的电阻的多个电阻器,并且每个电阻器连接在两个相邻放大器的输入端之间。 提供多个平均电容器并且各自连接在两个相邻比较器的输出之间; 其中所述多个平均电容器可以具有相同的电容。

    Socket wrench with an energy-saving function
    10.
    发明授权
    Socket wrench with an energy-saving function 有权
    套筒扳手具有节能功能

    公开(公告)号:US08516927B1

    公开(公告)日:2013-08-27

    申请号:US13663567

    申请日:2012-10-30

    摘要: A socket wrench includes a handle having a housing and a grip portion, a drive shank having a ratchet wheel mounted in the housing, two pawl members engaged with the ratchet wheel, a switching member located between the pawl members, two elastic members each biased between the housing and the respective pawl member, a control knob connected with the switching member, a driven arm having a mounting sleeve and an arcuate mounting slot, a connecting plate provided on the handle, and two driving arms provided on the connecting plate and received in the mounting slot. When in use, one of the driving arms drives the driven arm by a leverage to drive the drive shank to rotate a socket so as to operate a workpiece in an energy-saving manner.

    摘要翻译: 套筒扳手包括具有壳体和握持部分的手柄,具有安装在壳体中的棘轮的驱动柄,与棘轮啮合的两个棘爪构件,位于棘爪构件之间的切换构件,两个弹性构件,各自偏置在 壳体和相应的棘爪构件,与切换构件连接的控制旋钮,具有安装套筒和弧形安装槽的从动臂,设置在手柄上的连接板,以及设置在连接板上的两个驱动臂, 安装槽。 在使用中,其中一个驱动臂通过杠杆驱动从动臂以驱动驱动柄以旋转插座,以便以节能的方式操作工件。