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    TARGET-BASED DUMMY INSERTION FOR SEMICONDUCTOR DEVICES
    1.
    发明申请
    TARGET-BASED DUMMY INSERTION FOR SEMICONDUCTOR DEVICES 有权
    用于半导体器件的基于目标的DUMMY插入

    公开(公告)号：US20130061196A1

    公开(公告)日：2013-03-07

    申请号：US13227118

    申请日：2011-09-07

    Applicant: Ying-Chou Cheng ,  Boren Luo ,  Wen-Hao Liu ,  Tsong-Hua Ou ,  Chih-Wei Hsu ,  Wen-Chun Huang ,  Ru-Gun Liu

    Inventor： Ying-Chou Cheng ,  Boren Luo ,  Wen-Hao Liu ,  Tsong-Hua Ou ,  Chih-Wei Hsu ,  Wen-Chun Huang ,  Ru-Gun Liu

    IPC: G06F17/50

    CPC classification number: G06F17/5068 ,  G06F2217/12 ,  G06F2217/80 ,  Y02P90/265

    Abstract: The present disclosure provides integrated circuit methods for target-based dummy insertion. A method includes providing an integrated circuit (IC) design layout, and providing a thermal model for simulating thermal effect on the IC design layout, the thermal model including optical simulation and silicon calibration. The method further includes providing a convolution of the thermal model and the IC design layout to generate a thermal image profile of the IC design layout, defining a thermal target for optimizing thermal uniformity across the thermal image profile, comparing the thermal target and the thermal image profile to determine a difference data, and performing thermal dummy insertion to the IC design layout based on the difference data to provide a target-based IC design layout.

    Abstract translation: 本公开提供了用于基于目标的虚拟插入的集成电路方法。 一种方法包括提供集成电路（IC）设计布局，并提供用于模拟IC设计布局热效应的热模型，热模型包括光学仿真和硅校准。 该方法还包括提供热模型和IC设计布局的卷积以产生IC设计布局的热图像轮廓，定义用于优化热图像轮廓的热均匀性的热目标，比较热目标和热图像 以确定差异数据，并且基于差异数据对IC设计布局进行热假插入以提供基于目标的IC设计布局。

    PARAMETERIZED DUMMY CELL INSERTION FOR PROCESS ENHANCEMENT
    2.
    发明申请
    PARAMETERIZED DUMMY CELL INSERTION FOR PROCESS ENHANCEMENT 有权
    用于过程增强的参数化DUMMY CELL插入

    公开(公告)号：US20120144361A1

    公开(公告)日：2012-06-07

    申请号：US12959150

    申请日：2010-12-02

    Applicant: Ying-Chou Cheng ,  Tsong-Hua Ou ,  Wen-Hao Liu ,  Ru-Gun Liu ,  Wen-Chun Huang

    Inventor： Ying-Chou Cheng ,  Tsong-Hua Ou ,  Wen-Hao Liu ,  Ru-Gun Liu ,  Wen-Chun Huang

    IPC: G06F17/50

    CPC classification number: G06F17/5068 ,  G06F2217/12 ,  G06F2217/80 ,  Y02P90/265

    Abstract: The present disclosure relates to parameterized dummy cell insertion for process enhancement and methods for fabricating the same. In accordance with one or more embodiments, methods include providing an integrated circuit (IC) design layout with defined pixel-units, simulating thermal effect to the IC design layout including each pixel-unit, generating a thermal effect map of the IC design layout including each pixel-unit, determining a target absorption value for the IC design layout, and performing thermal dummy cell insertion to each pixel-unit of the IC design layout based on the determined target absorption value.

    Abstract translation: 本公开涉及用于过程增强的参数化虚拟单元插入及其制造方法。 根据一个或多个实施例，方法包括提供具有定义的像素单元的集成电路（IC）设计布局，模拟包括每个像素单元的IC设计布局的热效应，生成IC设计布局的热效应图，包括 每个像素单元，确定IC设计布局的目标吸收值，并且基于所确定的目标吸收值，向IC设计布局的每个像素单元执行热虚拟单元插入。

    METHOD, SYSTEM, AND APPARATUS FOR ADJUSTING LOCAL AND GLOBAL PATTERN DENSITY OF AN INTEGRATED CIRCUIT DESIGN
    3.
    发明申请
    METHOD, SYSTEM, AND APPARATUS FOR ADJUSTING LOCAL AND GLOBAL PATTERN DENSITY OF AN INTEGRATED CIRCUIT DESIGN 有权
    用于调整集成电路设计的局部和全局模式密度的方法，系统和装置

    公开(公告)号：US20110204470A1

    公开(公告)日：2011-08-25

    申请号：US12712665

    申请日：2010-02-25

    Applicant: Ying-Chou Cheng ,  Cheng-Lung Tsai ,  Tsong-Hua Ou ,  Cheng Kun Tsai ,  Ru-Gun Liu ,  Wen-Chun Huang

    Inventor： Ying-Chou Cheng ,  Cheng-Lung Tsai ,  Tsong-Hua Ou ,  Cheng Kun Tsai ,  Ru-Gun Liu ,  Wen-Chun Huang

    IPC: H01L23/544 ,  G06F17/50

    CPC classification number: G06F17/5068

    Abstract: An integrated circuit (IC) design method providing a circuit design layout having a plurality of functional blocks disposed a distance away from each other; identifying a local pattern density to an approximate dummy region, on the circuit design layout, within a predefined distance to one of the functional blocks; performing a local dummy insertion to the approximate dummy region according to the local pattern density; repeating the identifying and performing to at least some other of the functional blocks; and implementing a global dummy insertion to a non-local dummy region according to a global pattern density.

    Abstract translation: 一种提供电路设计布局的集成电路（IC）设计方法，其具有彼此远离设置的多个功能块; 将电路设计布局上的近似虚拟区域的局部图案密度识别在与功能块之一预定义的距离内; 根据局部图案密度对近似虚拟区进行局部虚拟插入; 重复对所述功能块中的至少一些其他功能块的识别和执行; 并且根据全局模式密度对非局部虚拟区域实施全局虚拟插入。

    Method, system, and apparatus for adjusting local and global pattern density of an integrated circuit design
    7.
    发明授权
    Method, system, and apparatus for adjusting local and global pattern density of an integrated circuit design 有权
    用于调整集成电路设计的局部和全局图案密度的方法，系统和装置

    公开(公告)号：US08372742B2

    公开(公告)日：2013-02-12

    申请号：US12712665

    申请日：2010-02-25

    Applicant: Ying-Chou Cheng ,  Cheng-Lung Stanley Tsai ,  Tsong-Hua Ou ,  Cheng Kun Tsai ,  Ru-Gun Liu ,  Wen-Chun Huang

    Inventor： Ying-Chou Cheng ,  Cheng-Lung Stanley Tsai ,  Tsong-Hua Ou ,  Cheng Kun Tsai ,  Ru-Gun Liu ,  Wen-Chun Huang

    IPC: H01L21/82

    CPC classification number: G06F17/5068

    Abstract: An integrated circuit (IC) design method providing a circuit design layout having a plurality of functional blocks disposed a distance away from each other; identifying a local pattern density to an approximate dummy region, on the circuit design layout, within a predefined distance to one of the functional blocks; performing a local dummy insertion to the approximate dummy region according to the local pattern density; repeating the identifying and performing to at least some other of the functional blocks; and implementing a global dummy insertion to a non-local dummy region according to a global pattern density.

    Abstract translation: 一种提供电路设计布局的集成电路（IC）设计方法，其具有彼此远离设置的多个功能块; 将电路设计布局上的近似虚拟区域的局部图案密度识别在与功能块之一预定义的距离内; 根据局部图案密度对近似虚拟区进行局部虚拟插入; 重复对所述功能块中的至少一些其他功能块的识别和执行; 并且根据全局模式密度对非局部虚拟区域实施全局虚拟插入。

    Precision friction clutch module
    10.
    发明申请
    Precision friction clutch module 审中-公开
    精密摩擦离合器模块

    公开(公告)号：US20070232402A1

    公开(公告)日：2007-10-04

    申请号：US11397272

    申请日：2006-04-03

    Applicant: Ying-Chou Cheng

    Inventor： Ying-Chou Cheng

    IPC: F16D7/02

    CPC classification number: F16D7/024

    Abstract: A clutch includes a hub having a hub flange formed at a first end. The clutch further includes a clutch tube having a central aperture formed therein, a clutch tube flange, and a friction surface that is substantially planar. The central aperture is configured to receive the shaft and is substantially perpendicular to the friction surface. The clutch further includes a clutch plate having a clutch surface that is substantially planar and is in contact with the friction surface. The clutch further includes a fastener configured to couple the clutch plate to the hub; and a spring device configured to push the hub flange and the clutch tube flange away from one another and push the friction surface to contact the clutch surface.

    Abstract translation: 离合器包括具有在第一端形成的轮毂凸缘的轮毂。 离合器还包括其中形成有中心孔的离合器管，离合器管凸缘和基本上平面的摩擦表面。 中心孔被构造成接收轴并基本上垂直于摩擦表面。 离合器还包括离合器片，该离合器片具有基本平坦且与摩擦表面接触的离合器表面。 离合器还包括被配置成将离合器片联接到轮毂的紧固件; 以及弹簧装置，其构造成将轮毂凸缘和离合器管凸缘彼此远离推动并推动摩擦表面接触离合器表面。

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