TARGET-BASED DUMMY INSERTION FOR SEMICONDUCTOR DEVICES
    1.
    发明申请
    TARGET-BASED DUMMY INSERTION FOR SEMICONDUCTOR DEVICES 有权
    用于半导体器件的基于目标的DUMMY插入

    公开(公告)号:US20130061196A1

    公开(公告)日:2013-03-07

    申请号:US13227118

    申请日:2011-09-07

    IPC分类号: G06F17/50

    摘要: The present disclosure provides integrated circuit methods for target-based dummy insertion. A method includes providing an integrated circuit (IC) design layout, and providing a thermal model for simulating thermal effect on the IC design layout, the thermal model including optical simulation and silicon calibration. The method further includes providing a convolution of the thermal model and the IC design layout to generate a thermal image profile of the IC design layout, defining a thermal target for optimizing thermal uniformity across the thermal image profile, comparing the thermal target and the thermal image profile to determine a difference data, and performing thermal dummy insertion to the IC design layout based on the difference data to provide a target-based IC design layout.

    摘要翻译: 本公开提供了用于基于目标的虚拟插入的集成电路方法。 一种方法包括提供集成电路(IC)设计布局,并提供用于模拟IC设计布局热效应的热模型,热模型包括光学仿真和硅校准。 该方法还包括提供热模型和IC设计布局的卷积以产生IC设计布局的热图像轮廓,定义用于优化热图像轮廓的热均匀性的热目标,比较热目标和热图像 以确定差异数据,并且基于差异数据对IC设计布局进行热假插入以提供基于目标的IC设计布局。

    Target-based thermal design using dummy insertion for semiconductor devices
    2.
    发明授权
    Target-based thermal design using dummy insertion for semiconductor devices 有权
    基于目标的热设计,使用半导体器件的虚拟插入

    公开(公告)号:US08527918B2

    公开(公告)日:2013-09-03

    申请号:US13227118

    申请日:2011-09-07

    IPC分类号: G06F17/50

    摘要: The present disclosure provides integrated circuit methods for target-based dummy insertion. A method includes providing an integrated circuit (IC) design layout, and providing a thermal model for simulating thermal effect on the IC design layout, the thermal model including optical simulation and silicon calibration. The method further includes providing a convolution of the thermal model and the IC design layout to generate a thermal image profile of the IC design layout, defining a thermal target for optimizing thermal uniformity across the thermal image profile, comparing the thermal target and the thermal image profile to determine a difference data, and performing thermal dummy insertion to the IC design layout based on the difference data to provide a target-based IC design layout.

    摘要翻译: 本公开提供了用于基于目标的虚拟插入的集成电路方法。 一种方法包括提供集成电路(IC)设计布局,并提供用于模拟IC设计布局热效应的热模型,热模型包括光学仿真和硅校准。 该方法还包括提供热模型和IC设计布局的卷积以产生IC设计布局的热图像轮廓,定义用于优化热图像轮廓的热均匀性的热目标,比较热目标和热图像 以确定差异数据,并且基于差异数据对IC设计布局进行热假插入以提供基于目标的IC设计布局。

    MODEL IMPORT FOR ELECTRONIC DESIGN AUTOMATION
    10.
    发明申请
    MODEL IMPORT FOR ELECTRONIC DESIGN AUTOMATION 有权
    电子设计自动化模型进口

    公开(公告)号:US20110231804A1

    公开(公告)日:2011-09-22

    申请号:US13116981

    申请日:2011-05-26

    IPC分类号: G06F17/50

    CPC分类号: G06F17/50

    摘要: Methods and systems for providing processing parameters in a secure format are disclosed. In one aspect, a method for providing semiconductor fabrication processing parameters to a design facility is disclosed. The method comprises providing a set of processing parameters of a fabrication facility; creating a model from the set of processing parameters; converting the model into a corresponding set of kernels; converting the set of kernels into a corresponding set of matrices; and communicating the set of matrices to the design facility. In another aspect, a method for providing semiconductor fabrication processing parameters is disclosed. The method comprises providing a set of processing parameters of a fabrication facility; creating a processing model from the set of processing parameters; encrypting the processing model into a format for use with a plurality of EDA tools; and communicating the encrypted processing model format to a design facility.

    摘要翻译: 公开了以安全格式提供处理参数的方法和系统。 一方面,公开了一种向设计设备提供半导体制造处理参数的方法。 该方法包括提供制造设施的一组处理参数; 从一组处理参数创建模型; 将模型转换为相应的一组内核; 将所述内核集合转换成相应的矩阵集合; 并将该组矩阵传送到设计设施。 另一方面,公开了一种用于提供半导体制造处理参数的方法。 该方法包括提供制造设施的一组处理参数; 从一组处理参数创建一个处理模型; 将处理模型加密成与多个EDA工具一起使用的格式; 并将加密的处理模型格式传送到设计设施。