公开(公告)号：US20090096482A1

公开(公告)日：2009-04-16

申请号：US11872831

申请日：2007-10-16

申请人： Yingjie Zhou ,  Ming Lin ,  Nathan Le ,  Mitchell Buznitsky ,  Yuqian C. Wong ,  Craig Stein

发明人： Yingjie Zhou ,  Ming Lin ,  Nathan Le ,  Mitchell Buznitsky ,  Yuqian C. Wong ,  Craig Stein

IPC分类号： H03K19/173

CPC分类号： H03K19/0016

摘要： In one general aspect, a system may include a circuit board, a first integrated circuit attached to the circuit board, and a second integrated circuit attached to the circuit board being separate from the first integrated circuit and configured to operate in multiple power domains that include at least a core power domain and an I/O power domain and that is configured with a logic gate to receive and process external requests from the first integrated circuit and internal requests from the second integrated circuit for a common external resource.

摘要翻译： 在一个一般方面，系统可以包括电路板，附接到电路板的第一集成电路和附接到电路板的第二集成电路，其与第一集成电路分离，并且被配置为在多个电源域中操作，包括 至少一个核心功率域和I / O功率域，并且配置有逻辑门以接收和处理来自第一集成电路的外部请求以及来自第二集成电路的用于共同外部资源的内部请求。

公开(公告)号：US07514958B1

公开(公告)日：2009-04-07

申请号：US11872831

申请日：2007-10-16

申请人： Yingjie Zhou ,  Ming Lin ,  Nathan Le ,  Mitchell Buznitsky ,  Yuqian C. Wong ,  Craig Stein

发明人： Yingjie Zhou ,  Ming Lin ,  Nathan Le ,  Mitchell Buznitsky ,  Yuqian C. Wong ,  Craig Stein

IPC分类号： H03K19/177

CPC分类号： H03K19/0016

摘要： In one general aspect, a system may include a circuit board, a first integrated circuit attached to the circuit board, and a second integrated circuit attached to the circuit board being separate from the first integrated circuit and configured to operate in multiple power domains that include at least a core power domain and an I/O power domain and that is configured with a logic gate to receive and process external requests from the first integrated circuit and internal requests from the second integrated circuit for a common external resource.

摘要翻译： 在一个一般方面，系统可以包括电路板，附接到电路板的第一集成电路和附接到电路板的第二集成电路，其与第一集成电路分离，并且被配置为在多个电源域中操作，包括 至少一个核心功率域和I / O功率域，并且配置有逻辑门以接收和处理来自第一集成电路的外部请求以及来自第二集成电路的用于共同外部资源的内部请求。

公开(公告)号：US07895491B2

公开(公告)日：2011-02-22

申请号：US11418588

申请日：2006-05-04

申请人： Yuqian C. Wong

发明人： Yuqian C. Wong

IPC分类号： G01R31/28 ,  G06F11/00

CPC分类号： G01R31/318575

摘要： An integrated circuit with low-power built-in self-test logic (“IC-LPBIST”) is disclosed. The IC-LPBIST may include combinational logic and a loading circuit enabled to load a shift test pattern of data into the loading circuit without powering the combinational logic of the IC-LPBIST, wherein the shift test pattern of data is configured to test the combinational logic for logical faults.

摘要翻译： 公开了具有低功率内置自检逻辑（“IC-LPBIST”）的集成电路。 IC-LPBIST可以包括组合逻辑和加载电路，其能够将数据的移位测试模式加载到加载电路中，而不对IC-LPBIST的组合逻辑进行供电，其中数据的移位测试模式被配置为测试组合逻辑 用于逻辑故障。

公开(公告)号：US07039776B2

公开(公告)日：2006-05-02

申请号：US10417933

申请日：2003-04-17

申请人： Yuqian C. Wong ,  Langford M. Wasada ,  Daniel C. Bozich ,  Mitchell A. Buznitsky

发明人： Yuqian C. Wong ,  Langford M. Wasada ,  Daniel C. Bozich ,  Mitchell A. Buznitsky

IPC分类号： G06F12/02

CPC分类号： G06F12/0638 ,  G06F8/60 ,  G06F9/328

摘要： An embedded ROM-based processor system including a processor, system memory, a programmable memory, a data selector and a patch controller. The system memory includes a read-only memory (ROM). The programmable memory stores patch information including patch code and one or more patch vectors. Each patch vector includes a break-out address from the ROM and a patch-in address to a corresponding location within the patch code. The data selector has an input coupled to the system memory and an output coupled to the processor. The patch controller is operative to compare an address provided by the processor with each break-out address to determine a breakout condition, and to control the selector to transfer the processor to a corresponding location within the patch code in response to a break-out condition. The programmable memory may be volatile memory, where the patch information is loaded from an external memory during initialization.

摘要翻译： 一种嵌入式基于ROM的处理器系统，包括处理器，系统存储器，可编程存储器，数据选择器和补丁控制器。 系统存储器包括只读存储器（ROM）。 可编程存储器存储包括补丁码和一个或多个补丁向量的补丁信息。 每个补丁向量包括来自ROM的分支地址和补丁地址到补丁代码内的对应位置。 数据选择器具有耦合到系统存储器的输入端和耦合到处理器的输出端。 补丁控制器可操作以将由处理器提供的地址与每个分支地址进行比较以确定突破条件，并且响应于分组条件控制选择器将处理器传送到补丁代码内的对应位置 。 可编程存储器可以是易失性存储器，其中在初始化期间从外部存储器加载补丁信息。

公开(公告)号：US07506148B2

公开(公告)日：2009-03-17

申请号：US11623317

申请日：2007-01-16

申请人： Tong Zhang ,  Yuqian C. Wong ,  Robert W. Hulvey ,  Angel Polo ,  Kevin Cadieux

发明人： Tong Zhang ,  Yuqian C. Wong ,  Robert W. Hulvey ,  Angel Polo ,  Kevin Cadieux

IPC分类号： G06F9/00

CPC分类号： G06F9/4401 ,  G06F9/4411

摘要： A host-side wireless interface services communications between a wireless user input device and a serviced host. The host-side wireless interface includes a wireless network interface, a host interface, and may include additional components. The wireless network interface wirelessly communicates with the wireless user input device. The host interface communicatively couples to the wireless interface and to the serviced host. When the serviced host initiates bootstrap operations via a Basic Input/Output System (BIOS), the host interface operates in a BIOS host interface mode to allow input from the wireless user input device to the BIOS during the bootstrap operations. Further, when the serviced host initiates Operating System (OS) operations, the host interface operates in an OS host interface mode, wherein the OS host interface mode differs from the BIOS host interface mode. In this fashion, the user of the wireless user input device may interface with the BIOS during booting operations prior to loading and configuration of the OS.

摘要翻译： 主机侧无线接口为无线用户输入设备和服务主机之间的通信提供服务。 主机侧无线接口包括无线网络接口，主机接口，并且可以包括附加组件。 无线网络接口与无线用户输入设备无线通信。 主机接口通信地耦合到无线接口和服务主机。 当服务主机通过基本输入/输出系统（BIOS）启动引导操作时，主机接口以BIOS主机接口模式运行，以允许在引导操作期间从无线用户输入设备输入到BIOS。 此外，当服务主机启动操作系统（OS）操作时，主机接口以OS主机接口模式操作，其中OS主机接口模式与BIOS主机接口模式不同。 以这种方式，在加载和配置OS之前，无线用户输入设备的用户可以在引导操作期间与BIOS接口。

公开(公告)号：US07555669B2

公开(公告)日：2009-06-30

申请号：US10932491

申请日：2004-09-02

申请人： Yuqian C. Wong ,  Yuan Zhuang

发明人： Yuqian C. Wong ,  Yuan Zhuang

IPC分类号： G06F1/04

CPC分类号： G06F9/4825 ,  G04G15/006 ,  H04L7/10 ,  Y02D10/24

摘要： Timing vectors are used to pass execution of time-dependent operations from firmware/software to a hardware component (e.g., a state machine). These vectors may be stored as a vector table in a data memory that is accessible by both the firmware/software and the hardware component. Based on the processing being performed in the system, the firmware/software will determine that one or more operations are to be performed at a certain time. The firmware/software stores a reference to that time and the operation(s) in a vector. The hardware component monitors time in the system and the vectors to determine whether the current time matches the time associated with a given vector. When there is a match, the hardware component causes the operation(s) associated with the vector to be performed. The system also may perform different operations at a given time depending on the operating condition (e.g., state) of the system.

摘要翻译： 使用定时向量将来自固件/软件的时间相关操作的执行传递到硬件组件（例如，状态机）。 这些向量可以作为向量表存储在可由固件/软件和硬件组件访问的数据存储器中。 基于在系统中执行的处理，固件/软件将确定在一定时间执行一个或多个操作。 固件/软件存储对该时间的引用和向量中的操作。 硬件组件监视系统中的时间和向量，以确定当前时间是否与给定向量相关联的时间匹配。 当存在匹配时，硬件组件导致与矢量相关联的操作被执行。 系统还可以根据系统的操作条件（例如状态）在给定时间执行不同的操作。

公开(公告)号：US07313678B2

公开(公告)日：2007-12-25

申请号：US10609060

申请日：2003-06-28

申请人： Tong Zhang ,  Yuqian C. Wong

发明人： Tong Zhang ,  Yuqian C. Wong

IPC分类号： G06F15/177 ,  G06F13/00 ,  G06F3/00

CPC分类号： G06F9/4401 ,  G06F9/4411

摘要： A host-side wireless interface services communications between a wireless user input device and a serviced host. The host-side wireless interface includes a wireless network interface, a host-side wireless interface, and may include additional components. The wireless network interface wirelessly communicates with the wireless user input device. The wireless user input device and the serviced host computer interact to setup the operation of the wireless user input device with the serviced host computer without requiring input from another user input device. In setting up the wireless user input device, the host-side wireless interface storing configuration information in non-volatile memory.

摘要翻译： 主机侧无线接口为无线用户输入设备和服务主机之间的通信提供服务。 主机侧无线接口包括无线网络接口，主机侧无线接口，并且可以包括附加组件。 无线网络接口与无线用户输入设备无线通信。 无线用户输入设备和服务的主计算机进行交互，以便与服务的主计算机建立无线用户输入设备的操作，而不需要来自另一个用户输入设备的输入。 在设置无线用户输入设备时，主机侧无线接口将配置信息存储在非易失性存储器中。

公开(公告)号：US07206954B2

公开(公告)日：2007-04-17

申请号：US10361464

申请日：2003-02-10

申请人： Masood U. Syed ,  Yuqian C. Wong ,  Brima B. Ibrahim ,  Mitchell A. Buznitsky

发明人： Masood U. Syed ,  Yuqian C. Wong ,  Brima B. Ibrahim ,  Mitchell A. Buznitsky

IPC分类号： G06F1/32

CPC分类号： G06F1/3287 ,  G06F1/3203 ,  Y02D10/171

摘要： An embedded processor system including at least one gated power unit including an internal ROM and a power controller that provides one or more gated power signals to selectively provide power to each gated power unit. The power controller provides a gated clock signal to the embedded processor to selectively control power consumption of the processor. The power controller powers down each gated power unit after freezing the processor and then powers up each gated power unit before reactivating the processor. The embedded processor system may include isolation circuitry, such as clamp circuitry or the like, that is operative to minimize current flow into each gated power unit when powered down. The gated power units may include a static function. The ROM of an embedded ROM-based microprocessor system is powered down when the microprocessor is idle to reduce or otherwise eliminate intrinsic leakage.

摘要翻译： 一种嵌入式处理器系统，包括至少一个门控功率单元，其包括内部ROM和功率控制器，所述功率控制器提供一个或多个门控功率信号以选择性地为每个门控功率单元提供功率。 功率控制器向嵌入式处理器提供门控时钟信号以选择性地控制处理器的功耗。 电源控制器在冷冻处理器后关闭每个门控功率单元，然后在重新激活处理器之前上电每个门控功率单元。 嵌入式处理器系统可以包括诸如钳位电路等的隔离电路，其可操作以在断电时使流入每个门控功率单元的电流最小化。 门控功率单元可以包括静态功能。 当微处理器空闲以减少或以其他方式消除固有泄漏时，嵌入式基于ROM的微处理器系统的ROM被断电。

公开(公告)号：US07165171B2

公开(公告)日：2007-01-16

申请号：US10675803

申请日：2003-09-30

申请人： Tong Zhang ,  Yuqian C. Wong ,  Robert W. Hulvey ,  Angel Polo ,  Kevin Cadieux

发明人： Tong Zhang ,  Yuqian C. Wong ,  Robert W. Hulvey ,  Angel Polo ,  Kevin Cadieux

IPC分类号： G06F9/00

CPC分类号： G06F9/4401 ,  G06F9/4411

摘要： A host-side wireless interface services communications between a wireless user input device and a serviced host. The host-side wireless interface includes a wireless network interface, a host interface, and may include additional components. The wireless network interface wirelessly communicates with the wireless user input device. The host interface communicatively couples to the wireless interface and to the serviced host. When the serviced host initiates bootstrap operations via a Basic Input/Output System (BIOS), the host interface operates in a BIOS host interface mode to allow input from the wireless user input device to the BIOS during the bootstrap operations. Further, when the serviced host initiates Operating System (OS) operations, the host interface operates in an OS host interface mode, wherein the OS host interface mode differs from the BIOS host interface mode. In this fashion, the user of the wireless user input device may interface with the BIOS during booting operations prior to loading and configuration of the OS.

摘要翻译： 主机侧无线接口为无线用户输入设备和服务主机之间的通信提供服务。 主机侧无线接口包括无线网络接口，主机接口，并且可以包括附加组件。 无线网络接口与无线用户输入设备无线通信。 主机接口通信地耦合到无线接口和服务主机。 当服务主机通过基本输入/输出系统（BIOS）启动引导操作时，主机接口以BIOS主机接口模式运行，以允许在引导操作期间从无线用户输入设备输入到BIOS。 此外，当服务主机启动操作系统（OS）操作时，主机接口以OS主机接口模式操作，其中OS主机接口模式与BIOS主机接口模式不同。 以这种方式，在加载和配置OS之前，无线用户输入设备的用户可以在引导操作期间与BIOS接口。