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公开(公告)号：US20100289110A1
公开(公告)日：2010-11-18
申请号：US12650957
申请日：2009-12-31
申请人： Yoichiro TARUI , Atsushi Narazaki , Ryoichi Fujii
发明人： Yoichiro TARUI , Atsushi Narazaki , Ryoichi Fujii
IPC分类号： H01L23/58
CPC分类号： H01L29/0619 , H01L29/0692 , H01L29/0696 , H01L29/1608 , H01L29/408 , H01L29/7811 , H01L29/8611 , H01L29/872 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device using one or more guard rings includes a p-type guard ring region surrounding a pn junction region, an insulating film covering the p-type guard ring region, one or more conductive films electrically connected with the p-type guard ring region through one or more contact holes made in the insulating film, and a semi-insulating film covering the insulating film and the conductive films. Thus, a desired breakdown voltage characteristic can be ensured even if a foreign matter or the like adheres to a surface of the conductive films.
摘要翻译： 使用一个或多个保护环的半导体器件包括围绕pn结区域的p型保护环区域，覆盖p型保护环区域的绝缘膜，与p型保护环区域电连接的一个或多个导电膜 通过在绝缘膜中形成的一个或多个接触孔，以及覆盖绝缘膜和导电膜的半绝缘膜。 因此，即使异物等附着在导电膜的表面，也能够确保期望的击穿电压特性。
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公开(公告)号：US08809969B2
公开(公告)日：2014-08-19
申请号：US12650957
申请日：2009-12-31
申请人： Yoichiro Tarui , Atsushi Narazaki , Ryoichi Fujii
发明人： Yoichiro Tarui , Atsushi Narazaki , Ryoichi Fujii
IPC分类号： H01L29/76
CPC分类号： H01L29/0619 , H01L29/0692 , H01L29/0696 , H01L29/1608 , H01L29/408 , H01L29/7811 , H01L29/8611 , H01L29/872 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device using one or more guard rings includes a p-type guard ring region surrounding a pn junction region, an insulating film covering the p-type guard ring region, one or more conductive films electrically connected with the p-type guard ring region through one or more contact holes made in the insulating film, and a semi-insulating film covering the insulating film and the conductive films. Thus, a desired breakdown voltage characteristic can be ensured even if a foreign matter or the like adheres to a surface of the conductive films.
摘要翻译： 使用一个或多个保护环的半导体器件包括围绕pn结区域的p型保护环区域，覆盖p型保护环区域的绝缘膜，与p型保护环区域电连接的一个或多个导电膜 通过在绝缘膜中形成的一个或多个接触孔，以及覆盖绝缘膜和导电膜的半绝缘膜。 因此，即使异物等附着在导电膜的表面，也能够确保期望的击穿电压特性。
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公开(公告)号：US08450183B2
公开(公告)日：2013-05-28
申请号：US12961905
申请日：2010-12-07
申请人： Ryoichi Fujii , Shigeto Honda , Atsushi Narazaki , Kaoru Motonami
发明人： Ryoichi Fujii , Shigeto Honda , Atsushi Narazaki , Kaoru Motonami
IPC分类号： H01L21/76 , H01L31/0312 , H01L23/58
CPC分类号： H01L29/063 , H01L29/0615 , H01L29/0661 , H01L29/8611 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a power semiconductor device according to the present invention includes the steps of: (a) forming a silicon nitride film on a semiconductor substrate; (b) after the step (a), forming a ring-shaped trench along a peripheral portion of the semiconductor substrate 6; (c) forming a first silicon oxide film on an inner surface of the trench; (d) after the step (c), forming a second silicon oxide film on an entire surface of the semiconductor substrate to bury the trench; (e) planarizing the second silicon oxide film by using the silicon nitride film as a stopper; and (f) forming a third silicon oxide film in a region in which the silicon nitride film is removed.
摘要翻译： 根据本发明的制造功率半导体器件的方法包括以下步骤：（a）在半导体衬底上形成氮化硅膜; （b）在步骤（a）之后，沿着半导体衬底6的周边部分形成环形沟槽; （c）在所述沟槽的内表面上形成第一氧化硅膜; （d）在步骤（c）之后，在半导体衬底的整个表面上形成第二氧化硅膜以埋置沟槽; （e）通过使用氮化硅膜作为塞子来平坦化第二氧化硅膜; 和（f）在除去氮化硅膜的区域中形成第三氧化硅膜。
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公开(公告)号：US20110059612A1
公开(公告)日：2011-03-10
申请号：US12827259
申请日：2010-06-30
申请人： Kazunari NAKATA , Kaoru Motonami , Atsushi Narazaki , Ayumu Onoyama , Shigeto Honda , Ryoichi Fujii , Tomoya Hirata
发明人： Kazunari NAKATA , Kaoru Motonami , Atsushi Narazaki , Ayumu Onoyama , Shigeto Honda , Ryoichi Fujii , Tomoya Hirata
IPC分类号： H01L21/302
CPC分类号： H01L21/3083 , H01L21/304 , H01L21/6835 , H01L21/6836 , H01L2221/68327 , H01L2221/6834 , H01L2924/0002 , H01L2924/30105 , H01L2924/00
摘要： A passivation film having a predetermined width from an outer peripheral end portion toward an inner side and extending along the outer peripheral end portion is formed on a front surface of a semiconductor substrate. An outer peripheral end surface orthogonal to the front surface and a rear surface is formed by grinding the outer peripheral end portion of the semiconductor substrate. A thickness of the semiconductor substrate is reduced to a predetermined thickness by grinding the rear surface. The ground rear surface is etched by discharging a mixed acid onto the rear surface while rotating the semiconductor substrate with the rear surface facing upward, to remove a fracture layer. Thereby, chipping or cracking of the semiconductor substrate is suppressed.
摘要翻译： 在半导体衬底的前表面上形成有从外周端向内侧具有预定宽度且沿外周端部延伸的钝化膜。 通过研磨半导体衬底的外周端部形成与前表面和后表面正交的外周端面。 通过研磨后表面将半导体衬底的厚度减小到预定厚度。 通过将混合酸排放到后表面上同时使后表面朝上的半导体衬底旋转来蚀刻地面后表面，以除去断裂层。 由此，能够抑制半导体基板的切削或破裂。
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公开(公告)号：US08435417B2
公开(公告)日：2013-05-07
申请号：US12827259
申请日：2010-06-30
申请人： Kazunari Nakata , Kaoru Motonami , Atsushi Narazaki , Ayumu Onoyama , Shigeto Honda , Ryoichi Fujii , Tomoya Hirata
发明人： Kazunari Nakata , Kaoru Motonami , Atsushi Narazaki , Ayumu Onoyama , Shigeto Honda , Ryoichi Fujii , Tomoya Hirata
IPC分类号： B44C1/22
CPC分类号： H01L21/3083 , H01L21/304 , H01L21/6835 , H01L21/6836 , H01L2221/68327 , H01L2221/6834 , H01L2924/0002 , H01L2924/30105 , H01L2924/00
摘要： A passivation film having a predetermined width from an outer peripheral end portion toward an inner side and extending along the outer peripheral end portion is formed on a front surface of a semiconductor substrate. An outer peripheral end surface orthogonal to the front surface and a rear surface is formed by grinding the outer peripheral end portion of the semiconductor substrate. A thickness of the semiconductor substrate is reduced to a predetermined thickness by grinding the rear surface. The ground rear surface is etched by discharging a mixed acid onto the rear surface while rotating the semiconductor substrate with the rear surface facing upward, to remove a fracture layer. Thereby, chipping or cracking of the semiconductor substrate is suppressed.
摘要翻译： 在半导体衬底的前表面上形成有从外周端向内侧具有预定宽度且沿外周端部延伸的钝化膜。 通过研磨半导体衬底的外周端部形成与前表面和后表面正交的外周端面。 通过研磨后表面将半导体衬底的厚度减小到预定厚度。 通过将混合酸排放到后表面上同时使后表面朝上的半导体衬底旋转来蚀刻地面后表面，以除去断裂层。 由此，能够抑制半导体基板的切削或破裂。
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公开(公告)号：US20110220914A1
公开(公告)日：2011-09-15
申请号：US12961905
申请日：2010-12-07
申请人： Ryoichi Fujii , Shigeto Honda , Atsushi Narazaki , Kaoru Motonami
发明人： Ryoichi Fujii , Shigeto Honda , Atsushi Narazaki , Kaoru Motonami
IPC分类号： H01L29/66 , H01L21/302
CPC分类号： H01L29/063 , H01L29/0615 , H01L29/0661 , H01L29/8611 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a power semiconductor device according to the present invention includes the steps of: (a) forming a silicon nitride film on a semiconductor substrate; (b) after the step (a), forming a ring-shaped trench along a peripheral portion of the semiconductor substrate 6; (c) forming a first silicon oxide film on an inner surface of the trench; (d) after the step (c), forming a second silicon oxide film on an entire surface of the semiconductor substrate to bury the trench; (e) planarizing the second silicon oxide film by using the silicon nitride film as a stopper; and (f) forming a third silicon oxide film in a region in which the silicon nitride film is removed.
摘要翻译： 根据本发明的制造功率半导体器件的方法包括以下步骤：（a）在半导体衬底上形成氮化硅膜; （b）在步骤（a）之后，沿着半导体衬底6的周边部分形成环形沟槽; （c）在所述沟槽的内表面上形成第一氧化硅膜; （d）在步骤（c）之后，在半导体衬底的整个表面上形成第二氧化硅膜以埋置沟槽; （e）通过使用氮化硅膜作为塞子来平坦化第二氧化硅膜; 和（f）在除去氮化硅膜的区域中形成第三氧化硅膜。
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公开(公告)号：US3992510A
公开(公告)日：1976-11-16
申请号：US575005
申请日：1975-05-06
CPC分类号： C01B7/13
摘要： A process for recovery of iodine from waste containing iodine or iodine compound, comprising the steps of burning the waste in a cumbustion chamber, and scrubbing out the iodine or iodine compound in the resulting combustion gas with a basic aqueous solution of sodium thiosulfate.
摘要翻译： 一种从含有碘或碘化合物的废物中回收碘的方法，包括将废物在燃烧室中燃烧并用碱性硫代硫酸钠水溶液洗涤所得燃烧气体中的碘或碘化合物的步骤。
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公开(公告)号：US4764027A
公开(公告)日：1988-08-16
申请号：US857101
申请日：1986-04-29
申请人： Yoshihiro Wada , Ryoichi Fujii , Takashi Suzuki
发明人： Yoshihiro Wada , Ryoichi Fujii , Takashi Suzuki
摘要： A display electrode arrangement for an electronic clinical thermometer includes two groups of segment electrodes and two groups of common electrodes, and a driving circuit for selectively driving segment signals and common signals. Each of the two groups of segment electrodes and common electrodes is operated to display only a "3" or a "4" in the Centigrade degrees, and a "9" or a "10" for the Fahrenheit degrees. Those numerals may be displayed by combining the displayed portions.
摘要翻译： 电子体温计的显示电极装置包括两组分段电极和两组公共电极组，以及用于选择性地驱动分段信号和公共信号的驱动电路。 两组段电极和公共电极中的每一个被操作以仅在“摄氏度”中仅显示“3”或“4”，对于华氏度而言仅显示“9”或“10”。 可以通过组合显示的部分来显示这些数字。
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9.发明授权
公开(公告)号：US4812835A
公开(公告)日：1989-03-14
申请号：US81611
申请日：1987-08-03
申请人： Yoshihiro Wada , Ryoichi Fujii
发明人： Yoshihiro Wada , Ryoichi Fujii
CPC分类号： G09F9/302
摘要： A segment arrangement suitable for a Celsius and Fahrenheit clinical thermometer comprises two upper digit displays and two lower digit displays. The upper digit displays can merely display four figures "3", "4", "9", and "10". The lower digit displays can display "00" through "99" figures, so as to display 35.0-42.0 degrees Centigrade and 96.8-105.8 degrees Fahrenheit. The two upper digit displays have such a specific configuration that a first digit display is provided which comprises a vertical major segment and a second digit display is provided which comprises two vertical minor segments, three horizontal segments, and one vertical major segment. The vertical major segment of the first digit display is electrically coupled to one of the two vertical minor segments.
摘要翻译： 适用于摄氏和华氏临床温度计的分段装置包括两个高位显示器和两个低位数显示器。 高位显示只能显示四个数字“3”，“4”，“9”和“10”。 低位显示可以显示“00”到“99”的数字，以显示35.0-42.0摄氏度和96.8-105.8华氏度。 两个高位显示器具有这样一种特定的配置，即提供包括垂直主段的第一数字显示，并且提供包括两个垂直次要段，三个水平段和一个垂直主段的第二数字显示。 第一位显示器的垂直主要部分电耦合到两个垂直次要部分之一。
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公开(公告)号：US5213107A
公开(公告)日：1993-05-25
申请号：US675352
申请日：1991-03-25
申请人： Ryoichi Fujii
发明人： Ryoichi Fujii
IPC分类号： A61B5/0404 , A61B5/0432
CPC分类号： A61B5/0404 , A61B5/04325 , A61B2560/0209
摘要： A portable electrocardiograph capable of providing a low electricity consumption rate by controlling an electric power supply from a power supply device, the portable electrocardiograph includes a unit for detecting electrocardiographic signals and for converting the electrocardiographic signals into electrocardiographic complex data, a unit connected with the detecting unit for displaying the electrocardiographic complex data, and a unit for controlling an electric power supply for either the detecting unit or the displaying unit in accordance with a predetermined mode so that the electric power supply from the power supply device is continued during a predetermined time period.
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