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    CIRCUIT AND METHOD FOR DRIVING OLED DISPLAY
    1.
    发明申请
    CIRCUIT AND METHOD FOR DRIVING OLED DISPLAY 有权
    用于驱动OLED显示器的电路和方法

    公开(公告)号：US20110102410A1

    公开(公告)日：2011-05-05

    申请号：US12912223

    申请日：2010-10-26

    申请人： Hyun-Ho CHO ,  Yong-Icc Jung ,  Young-Bok Kim ,  Joon-Ho Na ,  Dae-Seong Kim ,  Dae-Keun Han

    发明人： Hyun-Ho CHO ,  Yong-Icc Jung ,  Young-Bok Kim ,  Joon-Ho Na ,  Dae-Seong Kim ,  Dae-Keun Han

    IPC分类号： G09G5/00

    CPC分类号： G09G3/3291 ,  G09G2300/0819 ,  G09G2320/0285 ,  G09G2320/0295 ,  G09G2320/045

    摘要： A circuit for driving an organic light emitting diode display includes a display panel that displays an image by using organic light emitting diodes disposed at intersection areas of a plurality of gate lines and a plurality of data lines; a threshold voltage detection control unit that supplies a precharge voltage by sequentially turning on transistors for threshold voltage detection, which are connected among the data lines and the organic light emitting diodes on the display panel, in units of horizontal lines, and enables threshold voltages to be detected; and a source driver that detects threshold voltages of all organic light emitting diodes arranged on a corresponding horizontal line, and repeats an operation, as necessary, for sampling/holding the detected threshold voltages through M sample/hold circuits, converting the sampled/held threshold voltages into digital signals, and storing the digital signals in a memory.

    摘要翻译： 用于驱动有机发光二极管显示器的电路包括：显示面板，其通过使用设置在多条栅极线和多条数据线的交叉区域上的有机发光二极管来显示图像; 阈值电压检测控制单元，其以水平线为单位顺序地接通连接在显示面板上的数据线和有机发光二极管之间的用于阈值电压检测的晶体管，从而提供预充电电压， 被检测到 以及源驱动器，其检测布置在相应的水平线上的所有有机发光二极管的阈值电压，并根据需要重复进行通过M个采样/保持电路采样/保持检测到的阈值电压的操作，转换采样/保持阈值 电压转换为数字信号，并将数字信号存储在存储器中。

    Semiconductor chip having power supply line with minimized voltage drop
    2.
    发明授权
    Semiconductor chip having power supply line with minimized voltage drop 有权
    具有电源线的半导体芯片具有最小的电压降

    公开(公告)号：US08531037B2

    公开(公告)日：2013-09-10

    申请号：US12740316

    申请日：2008-10-27

    申请人： Yong-Icc Jung ,  Dae-Keun Han ,  Dae-Seong Kim ,  Joon-Ho Na

    发明人： Yong-Icc Jung ,  Dae-Keun Han ,  Dae-Seong Kim ,  Joon-Ho Na

    IPC分类号： H01L29/40

    CPC分类号： H01L23/60 ,  H01L23/5286 ,  H01L24/06 ,  H01L24/80 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/14

    摘要： Disclosed is a power supply line in which a voltage drop generated in a resistance component of a metal line which delivers a power voltage is minimized so that the level of the power supply voltage delivered to a semiconductor chip becomes constant in the entire area of the semiconductor chip. The semiconductor chip includes: at least two power supply pads to which a power voltage applied from an external unit of the semiconductor chip is supplied; power supply main metal lines connected to each of the power supply pads; power supply branch metal lines extended from each of the power supply main metal lines to deliver a power voltage to a circuit in the semiconductor chip; and at least an electrostatic discharge (ESD) improvement dummy pad, wherein the ESD improvement dummy pad is electrically connected to the corresponding power supply main metal line and the corresponding power supply branch metal line to minimize a voltage drop.

    摘要翻译： 公开了一种电源线，其中在输送电源电压的金属线路的电阻分量中产生的电压降最小化，使得在半导体芯片的整个区域中传递到半导体芯片的电源电压的电平变得恒定 芯片。 半导体芯片包括：从半导体芯片的外部单元施加电力电压的至少两个电源焊盘; 电源主金属线连接到每个电源板; 从每个电源主金属线路延伸的电源分支金属线路将电力电压传送到半导体芯片中的电路; 以及至少一个静电放电（ESD）改善虚拟焊盘，其中ESD改进虚拟焊盘电连接到相应的电源主金属线和相应的电源支路金属线，以最小化电压降。

    SEMICONDUCTOR CHIP HAVING POWER SUPPLY LINE WITH MINIMIZED VOLTAGE DROP
    3.
    发明申请
    SEMICONDUCTOR CHIP HAVING POWER SUPPLY LINE WITH MINIMIZED VOLTAGE DROP 有权
    具有最小化电压降电源线的半导体芯片

    公开(公告)号：US20100308472A1

    公开(公告)日：2010-12-09

    申请号：US12740316

    申请日：2008-10-27

    申请人： Yong-Icc Jung ,  Dae-Keun Han ,  Dae-Seong Kim ,  Joon-Ho Na

    发明人： Yong-Icc Jung ,  Dae-Keun Han ,  Dae-Seong Kim ,  Joon-Ho Na

    IPC分类号： H01L23/528

    CPC分类号： H01L23/60 ,  H01L23/5286 ,  H01L24/06 ,  H01L24/80 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/14

    摘要： Disclosed is a power supply line in which a voltage drop generated in a resistance component of a metal line which delivers a power voltage is minimized so that the level of the power supply voltage delivered to a semiconductor chip becomes constant in the entire area of the semiconductor chip. The semiconductor chip includes: at least two power supply pads to which a power voltage applied from an external unit of the semiconductor chip is supplied; power supply main metal lines connected to each of the power supply pads; power supply branch metal lines extended from each of the power supply main metal lines to deliver a power voltage to a circuit in the semiconductor chip; and at least an electrostatic discharge (ESD) improvement dummy pad, wherein the ESD improvement dummy pad is electrically connected to the corresponding power supply main metal line and the corresponding power supply branch metal line to minimize a voltage drop.

    摘要翻译： 公开了一种电源线，其中在输送电源电压的金属线路的电阻分量中产生的电压降最小化，使得在半导体芯片的整个区域中传递到半导体芯片的电源电压的电平变得恒定 芯片。 半导体芯片包括：从半导体芯片的外部单元施加电力电压的至少两个电源焊盘; 电源主金属线连接到每个电源板; 从每个电源主金属线路延伸的电源分支金属线路将电力电压传送到半导体芯片中的电路; 以及至少一个静电放电（ESD）改善虚拟焊盘，其中ESD改进虚拟焊盘电连接到相应的电源主金属线和相应的电源支路金属线，以最小化电压降。

    METHOD OF ARRANGING GAMMA BUFFERS AND FLAT PANEL DISPLAY APPLYING THE METHOD
    4.
    发明申请
    METHOD OF ARRANGING GAMMA BUFFERS AND FLAT PANEL DISPLAY APPLYING THE METHOD 审中-公开
    应用该方法的装置缓冲器和平板显示器的方法

    公开(公告)号：US20100141687A1

    公开(公告)日：2010-06-10

    申请号：US12594794

    申请日：2008-03-26

    申请人： Dae-Keun Han ,  Dae-Seong Kim ,  Joon-Ho Na ,  Hong-Hee Son ,  Hyun-Ho Cho ,  Hyung-Seog Oh

    发明人： Dae-Keun Han ,  Dae-Seong Kim ,  Joon-Ho Na ,  Hong-Hee Son ,  Hyun-Ho Cho ,  Hyung-Seog Oh

    IPC分类号： G09G5/10

    CPC分类号： G09G3/2007 ,  G09G2310/0275 ,  G09G2320/0276 ,  G09G2320/041

    摘要： Provided are a method of arranging gamma buffers capable of decreasing a Kelvin of a source driver included in a flat panel display and minimizing a temperature deviation between source drivers, and the flat panel display applying the method. The method of arranging a plurality of gamma buffers which are arranged in one or more source drivers to output corresponding gamma voltages, includes a step of calculating power consumptions of the gamma buffers, wherein the method further comprises one or more steps of: changing tab points of the gamma buffers by using the calculated power consumptions of the gamma buffers; and changing positions of the gamma buffers by using the calculated power consumptions of the gamma buffers.

    摘要翻译： 提供了一种布置能够降低平板显示器中包括的源极驱动器的开尔文并使源极驱动器之间的温度偏差最小化的应用该方法的平板显示器的方法。 布置在一个或多个源驱动器中以输出相应伽马电压的多个伽马缓冲器的方法包括计算伽马缓冲器的功耗的步骤，其中该方法还包括一个或多个步骤：改变标记点 的γ缓冲器的功率消耗; 以及通过使用计算出的伽马缓冲器的功率消耗来改变伽马缓冲器的位置。

    Liquid crystal display panel driving circuit
    5.
    发明授权
    Liquid crystal display panel driving circuit 有权
    液晶显示面板驱动电路

    公开(公告)号：US08963905B2

    公开(公告)日：2015-02-24

    申请号：US12912187

    申请日：2010-10-26

    申请人： Hyun-Ho Cho ,  Ji-Hun Kim ,  Joon-Ho Na ,  Hyung-Seog Oh ,  Dae-Seong Kim ,  Dae-Keun Han

    发明人： Hyun-Ho Cho ,  Ji-Hun Kim ,  Joon-Ho Na ,  Hyung-Seog Oh ,  Dae-Seong Kim ,  Dae-Keun Han

    IPC分类号： G09G5/00 ,  H03M1/00 ,  G09G3/36 ,  G09G3/20

    CPC分类号： G09G3/3685 ,  G09G3/20 ,  G09G3/3696 ,  G09G2310/027

    摘要： Disclosed is a liquid crystal display panel driving circuit for driving a liquid crystal display panel with a resolution of N bits. N-bit digital data including upper X bits and lower Y bits is inputted. The liquid crystal display panel driving circuit includes a resistor string unit according to areas, a DAC converter switching unit according to areas, and an interpolation amplifier. The resistor string unit outputs analog reference voltages at different ratios according to three areas. The DAC converter switching unit receives the N-bit digital data, selects (Y+1) analog voltages from the analog reference voltages based on the upper X bits, outputs the (Y+1) analog voltages, and outputs the (Y+1) analog voltages of different combinations based on the lower Y bits. The interpolation amplifier receives the (Y+1) analog voltages and generates an interpolated output voltage by setting weights for the (Y+1) analog voltages by using multi-factors.

    摘要翻译： 公开了一种以N位分辨率驱动液晶显示面板的液晶显示面板驱动电路。 输入包括高X位和低Y位的N位数字数据。 液晶显示面板驱动电路包括根据区域的电阻串单元，根据区域的DAC转换器切换单元和内插放大器。 电阻串单元根据三个区域输出不同比例的模拟参考电压。 DAC转换器切换单元接收N位数字数据，从模拟参考电压基于高X位选择（Y + 1）模拟电压，输出（Y + 1）模拟电压，并输出（Y + 1） ）基于较低Y位的不同组合的模拟电压。 内插放大器通过使用多因素设置（Y + 1）模拟电压的权重，接收（Y + 1）模拟电压并产生内插输出电压。

    OFFSET COMPENSATION GAMMA BUFFER AND GRAY SCALE VOLTAGE GENERATION CIRCUIT USING THE SAME
    6.
    发明申请
    OFFSET COMPENSATION GAMMA BUFFER AND GRAY SCALE VOLTAGE GENERATION CIRCUIT USING THE SAME 审中-公开
    偏移补偿伽马缓冲器和灰度级电压发生电路

    公开(公告)号：US20100265274A1

    公开(公告)日：2010-10-21

    申请号：US12741924

    申请日：2008-10-30

    申请人： Dae-Keun Han ,  Dae-Seong Kim ,  Joon-Ho Na ,  An-Young Kim ,  Man-Jeong Ko

    发明人： Dae-Keun Han ,  Dae-Seong Kim ,  Joon-Ho Na ,  An-Young Kim ,  Man-Jeong Ko

    IPC分类号： G09G5/10 ,  G09G3/36

    CPC分类号： G09G3/3688 ,  G09G2310/027

    摘要： Disclosed are an offset compensation gamma buffer and a gray scale voltage generation circuit using the same. The offset compensation gamma buffer includes: a buffer which outputs an input voltage input to a positive or negative input terminal as an output voltage; and a switching unit which selectively connects the input voltage and the output voltage of the buffer to the positive and negative input terminals in response to a control signal. The output voltage of the offset compensation gamma buffer is supplied to the input of a gray scale voltage generation circuit of a source driver for driving a liquid crystal panel. The offset of the offset compensation gamma buffer is compensated using an inversion timing of the control signal. The output voltage of the offset compensation gamma buffer is supplied as a reference voltage of the voltage divider unit for generating the gray scale voltages, and the offset of the gray scale voltages is also compensated.

    摘要翻译： 公开了一种偏移补偿伽马缓冲器和使用其的灰度级电压产生电路。 偏移补偿伽马缓冲器包括：输出输入到正或负输入端的输入电压作为输出电压的缓冲器; 以及切换单元，其响应于控制信号选择性地将缓冲器的输入电压和输出电压连接到正负输入端子。 偏移补偿伽马缓冲器的输出电压被提供给用于驱动液晶面板的源极驱动器的灰度级电压产生电路的输入端。 使用控制信号的反转定时来补偿偏移补偿伽马缓冲器的偏移。 偏移补偿伽马缓冲器的输出电压作为分压器单元的基准电压被提供，用于产生灰度级电压，并且补偿灰度级电压的偏移。

    SEMICONDUCTOR INTEGRATED CIRCUIT HAVING HEAT RELEASE PATTERN
    9.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT HAVING HEAT RELEASE PATTERN 审中-公开
    具有热释放图案的半导体集成电路

    公开(公告)号：US20100027223A1

    公开(公告)日：2010-02-04

    申请号：US12520088

    申请日：2007-11-26

    申请人： Joon Ho Na ,  Dae-Keun Han ,  Dae-Seong Kim

    发明人： Joon Ho Na ,  Dae-Keun Han ,  Dae-Seong Kim

    IPC分类号： H05K7/20 ,  H01L23/34

    CPC分类号： H01L24/06 ,  H01L23/3677 ,  H01L23/522 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2224/45099

    摘要： Provided are a semiconductor integrated circuit having a heat release pattern in a chip so as to release heat generated inside the chip and a system board having a heat release unit used to release heat generated inside the semiconductor integrated circuit. The semiconductor integrated circuit includes: one or more output pads directly connected to an output terminal having a heat release pattern; a power supply pad supplying power; and one or more dummy pads connected to a metal line for supplying power or an internal output terminal of an internal function block, wherein the heat release pattern includes a plurality of unit contacts at the output terminal or a plurality of strip contacts having an area of about or larger than the sum of two or more of the unit contacts.

    摘要翻译： 提供了一种半导体集成电路，其具有芯片中的散热图案，以便释放芯片内部产生的热量，以及具有用于释放半导体集成电路内部产生的热的放热单元的系统板。 半导体集成电路包括：直接连接到具有放热图案的输出端子的一个或多个输出焊盘; 供电电源; 以及一个或多个虚拟焊盘，其连接到用于供电的金属线或内部功能块的内部输出端子，其中所述散热图案包括在所述输出端子处的多个单元触点或多个带状触点， 大于或大于两个或更多个单元触点的总和。

    Method for removing offset between channels of LCD panel
    10.
    发明授权
    Method for removing offset between channels of LCD panel 有权
    清除LCD面板通道之间偏移的方法

    公开(公告)号：US08441473B2

    公开(公告)日：2013-05-14

    申请号：US12593102

    申请日：2008-03-17

    申请人： Dae-Keun Han ,  Dae-Seong Kim ,  Hyung-Seog Oh ,  Joon-Ho Na ,  Hyun-Ho Cho

    发明人： Dae-Keun Han ,  Dae-Seong Kim ,  Hyung-Seog Oh ,  Joon-Ho Na ,  Hyun-Ho Cho

    IPC分类号： G06F3/038

    CPC分类号： G09G3/3614 ,  G09G3/3685 ,  G09G2320/0247

    摘要： A method of removing offsets between channels of a liquid crystal panel is provided. The method includes: alternately arranging first type output buffers and second type output buffers for driving the pixels in units of at least two rows of the pixels; and arranging the first type output buffers and the second type output buffers in units of at least two columns of the pixels so that the output buffers with types opposite to those of previous two columns are arranged. The second type output buffers are embodied by switching connections among the differential transistors and connections among the load transistors in the first type output buffers.

    摘要翻译： 提供一种去除液晶面板通道之间偏移的方法。 该方法包括：交替排列第一类型的输出缓冲器和第二类型的输出缓冲器，用于以至少两行像素为单位驱动像素; 并且以至少两列像素为单位布置第一类型输出缓冲器和第二类型输出缓冲器，使得排列具有与前两列相反类型的输出缓冲器。 第二类型输出缓冲器通过在差分晶体管之间切换连接和在第一类型输出缓冲器中的负载晶体管之间的连接来实现。