公开(公告)号：US20060077718A1

公开(公告)日：2006-04-13

申请号：US11284949

申请日：2005-11-23

申请人： Yoshinori Sakamoto ,  Tatsuya Bando

发明人： Yoshinori Sakamoto ,  Tatsuya Bando

IPC分类号： G11C16/04

CPC分类号： G11C16/3477 ,  G11C16/16

摘要： The number of rewrites for memory cells is to be increased, and the reliability of data reading to be substantially improved. Where data in memory cells are to be erased, the switching of an erase voltage to be applied to the control gate of each memory cell, while switching from one to another of voltages of any different levels, as the control gate voltage (=soft erase voltage) is accomplished according to the quantity of electric charges accumulated at the floating gate of each memory cell so as to keep substantially constant the voltage applied to the tunnel film of the memory cell. Upon acceptance of an erase command, a CPU supplies a control signal to a decoder, and on the basis of the resultant decode signal an erase voltage switching circuit generates a soft erase voltage of a certain level. After that, while switching from one to another of soft erase voltages differing in level, data in the memory cell are erased. Upon completion of erasing data in the memory cell, erase verification is carried out.

公开(公告)号：US07072224B2

公开(公告)日：2006-07-04

申请号：US11284949

申请日：2005-11-23

申请人： Yoshinori Sakamoto ,  Tatsuya Bando

发明人： Yoshinori Sakamoto ,  Tatsuya Bando

IPC分类号： G11C11/34

CPC分类号： G11C16/3477 ,  G11C16/16

摘要： The number of rewrites for memory cells is to be increased, and the reliability of data reading to be substantially improved. Where data in memory cells are to be erased, the switching of an erase voltage to be applied to the control gate of each memory cell, while switching from one to another of voltages of any different levels, as the control gate voltage (=soft erase voltage) is accomplished according to the quantity of electric charges accumulated at the floating gate of each memory cell so as to keep substantially constant the voltage applied to the tunnel film of the memory cell. Upon acceptance of an erase command, a CPU supplies a control signal to a decoder, and on the basis of the resultant decode signal an erase voltage switching circuit generates a soft erase voltage of a certain level. After that, while switching from one to another of soft erase voltages differing in level, data in the memory cell are erased. Upon completion of erasing data in the memory cell, erase verification is carried out.

摘要翻译： 要增加存储器单元的重写次数，并且显着提高数据读取的可靠性。 在要擦除存储器单元中的数据的情况下，切换要施加到每个存储单元的控制栅极的擦除电压，同时切换到任意不同电平的电压，作为控制栅极电压（=软擦除 电压）根据在每个存储单元的浮置栅极处累积的电荷量来实现，以便保持施加到存储单元的隧道膜的电压基本上恒定。 在接受擦除命令时，CPU向解码器提供控制信号，并且基于所得到的解码信号，擦除电压切换电路产生一定电平的软擦除电压。 之后，当从一个切换到另一个不同电平的软擦除电压时，存储单元中的数据被擦除。 在完成擦除存储器单元中的数据时，执行擦除验证。

公开(公告)号：US07068541B2

公开(公告)日：2006-06-27

申请号：US10700592

申请日：2003-11-05

申请人： Yoshinori Sakamoto ,  Tatsuya Bando

发明人： Yoshinori Sakamoto ,  Tatsuya Bando

IPC分类号： G11C11/34

CPC分类号： G11C16/3477 ,  G11C16/16

摘要： The number of rewrites for memory cells is to be increased, and the reliability of data reading to be substantially improved. Where data in memory cells are to be erased, the switching of an erase voltage to be applied to the control gate of each memory cell, while switching from one to another of voltages of any different levels, as the control gate voltage (=soft erase voltage) is accomplished according to the quantity of electric charges accumulated at the floating gate of each memory cell so as to keep substantially constant the voltage applied to the tunnel film of the memory cell. Upon acceptance of an erase command, a CPU supplies a control signal to a decoder, and on the basis of the resultant decode signal an erase voltage switching circuit generates a soft erase voltage of a certain level. After that, while switching from one to another of soft erase voltages differing in level, data in the memory cell are erased. Upon completion of erasing data in the memory cell, erase verification is carried out.

公开(公告)号：US20090155546A1

公开(公告)日：2009-06-18

申请号：US12064342

申请日：2006-08-28

申请人： Naoki Yamashita ,  Kiyoshi Ishikawa ,  Yoshinori Sakamoto ,  Takuma Hojo

发明人： Naoki Yamashita ,  Kiyoshi Ishikawa ,  Yoshinori Sakamoto ,  Takuma Hojo

IPC分类号： B32B5/00 ,  G03F7/20 ,  G03F7/004

CPC分类号： G03F7/0043 ,  B81C99/009 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  G03F7/0045 ,  G03F7/0757 ,  G03F7/203 ,  Y10T428/24802

摘要： Disclosed are a film-forming composition which can form a pattern having an enhanced contrast by the action of uneven surface morphology produced after image development, and a method for forming a pattern and a three-dimensional mold using the composition. A composition comprising at least one of a hydrolysate and a condensation product of an alkoxy metal compound represented by the chemical formula (A), the composition additionally comprising a compound which can respond to at least one of light and heat to control the solubility of a finished film in a developing solution. R1n-M(OR2)4-n  (A) wherein M represents a silicon, a germanium, a titanium, a tantalum, an indium or a tin; R1 represents a hydrogen atom or a monovalent organic group; R2 represents a monovalent organic group; and n represents an integer of 1 to 3.

摘要翻译： 公开了一种成膜组合物，其可以通过图像显影后产生的不均匀表面形态的作用形成具有增强的对比度的图案，以及使用该组合物形成图案的方法和三维模具。 一种组合物，其包含由化学式（A）表示的烷氧基金属化合物的水解产物和缩合产物中的至少一种，所述组合物另外包含可以响应于光和热中的至少一种以控制溶解度的化合物 成品薄膜在开发中的解决方案。 <？in-line-formula description =“In-line Formulas”end =“lead”？> R1n-M（OR2）4-n（A）<？in-line-formula description =“In-line Formulas”end =“尾”→其中M表示硅，锗，钛，钽，铟或锡; R1表示氢原子或一价有机基团; R2表示一价有机基团; n表示1〜3的整数。

公开(公告)号：US06409844B1

公开(公告)日：2002-06-25

申请号：US09623218

申请日：2000-08-30

申请人： Naohiro Shikata ,  Yoshiaki Kondou ,  Yukio Nishikawa ,  Yoshihiko Nishizawa ,  Yoshinori Sakamoto ,  Takeshi Fujiwaki

发明人： Naohiro Shikata ,  Yoshiaki Kondou ,  Yukio Nishikawa ,  Yoshihiko Nishizawa ,  Yoshinori Sakamoto ,  Takeshi Fujiwaki

IPC分类号： C23C2207

CPC分类号： C23C22/60

摘要： An article of magnesium or its alloy having a surface layer containing magnesium condensed phosphate and magnesium phosphate, which can be produced by treating an article of magnesium or its alloy with a treating liquid containing 1,000 to 20,000 ppm of alkaline metal ions, 1,000 to 50,000 ppm of condensed phosphate ions, and 100 to 20,000 ppm of borate ions, and having pH of at least 8. The treated article has good corrosion resistance, and a coating can be formed on the surface of the article with good adhesion.

摘要翻译： 一种镁或其合金制品，其具有包含镁缩合磷酸盐和磷酸镁的表面层，其可以通过用含有1,000至20,000ppm碱金属离子的处理液处理镁或其合金制品，其为1,000至50,000ppm 的浓缩磷酸根离子，100〜20,000ppm的硼酸根离子，pH值在8以上。处理过的制品具有良好的耐腐蚀性，可以在物品的表面形成具有良好粘附性的涂层。

公开(公告)号：US4958017A

公开(公告)日：1990-09-18

申请号：US283805

申请日：1988-12-13

申请人： Shohei Fujinawa ,  Yoshinori Sakamoto ,  Harumasa Iizuka

发明人： Shohei Fujinawa ,  Yoshinori Sakamoto ,  Harumasa Iizuka

IPC分类号： C07H19/16

CPC分类号： C07H19/16

摘要： An industrially advantageous process for producing an inosine-guanosine mixture having a higher weight ratio of guanosine/inosine than a starting mixture of nucleoside crystals and inosine subtantially free of guanosine from which comprises adjusting an aqueous fluid containing 10 to 30% by weight/volume of a nucleoside mixture to a pH of 9.1 to 9.5, wherein the total amount of inosine and guanosine is more than 95% by weight based on dry matters and the weight ratio of guanosine/inosine is 0.5 to 1, separating the resultant solids and then crystallizing inosine from the resulting solution.

摘要翻译： 一种工业上有利的生产肌苷 - 鸟苷混合物的方法，其比鸟苷/肌苷重量比高于核苷结晶的起始混合物和肌苷酸不含鸟苷，其中包括调节含有10至30重量％/体积的 核苷混合物，其pH为9.1至9.5，其中肌苷和鸟苷的总量基于干物质大于95重量％，并且鸟苷/肌苷的重量比为0.5至1，分离所得固体，然后结晶 肌苷从所得溶液中。

公开(公告)号：US20120084317A1

公开(公告)日：2012-04-05

申请号：US13187627

申请日：2011-07-21

申请人： Yoshinori Sakamoto

发明人： Yoshinori Sakamoto

IPC分类号： G06F17/30

CPC分类号： G06F16/2365 ,  G06F16/162 ,  G06F16/24568 ,  G06Q40/04

摘要： When a detecting complex event condition expression is changed, a rule comparing unit compares the complex event condition expressions before and after the change. The changed portion identifying unit identifies the changed portion based on the comparison result, and the parallel operating unit operates the complex event condition expressions before and after the change in parallel for the detecting complex event condition expression including the identified changed portion. In this manner, the complex event processing apparatus disclosed therein can dynamically change a detecting complex event condition expression used in the complex event processing.

摘要翻译： 当检测复合事件条件表达式改变时，规则比较单元比较改变之前和之后的复杂事件条件表达式。 改变部分识别单元基于比较结果识别改变的部分，并行操作单元对包括所识别的改变部分的检测复数事件条件表达式并行地改变之前和之后操作复数事件条件表达式。 以这种方式，其中公开的复杂事件处理装置可以动态地改变在复杂事件处理中使用的检测复合事件条件表达式。

公开(公告)号：US20080318165A1

公开(公告)日：2008-12-25

申请号：US11575299

申请日：2005-08-31

申请人： Takeshi Tanaka ,  Yoshinori Sakamoto ,  Masaru Takahama

发明人： Takeshi Tanaka ,  Yoshinori Sakamoto ,  Masaru Takahama

IPC分类号： G03F7/004 ,  C08G77/04 ,  C08L83/05 ,  C08L83/06

CPC分类号： H01L21/31144 ,  C08G77/04 ,  C08G77/70 ,  C09D183/04 ,  G03F7/0757 ,  G03F7/091 ,  C08L83/00

摘要： A material for forming an antireflective film that enables a large difference in etching rates to be obtained between a resist pattern and an antireflective film.A composition for forming an antireflective film includes a siloxane polymer containing a light-absorbing compound group.

摘要翻译： 用于形成能够在抗蚀剂图案和抗反射膜之间获得蚀刻速率差大的抗反射膜的材料。 用于形成抗反射膜的组合物包括含有光吸收性化合物基团的硅氧烷聚合物。

公开(公告)号：US06665176B2

公开(公告)日：2003-12-16

申请号：US10162273

申请日：2002-06-03

申请人： Shinichi Amemiya ,  Osamu Furuta ,  Yoshinori Sakamoto

发明人： Shinichi Amemiya ,  Osamu Furuta ,  Yoshinori Sakamoto

IPC分类号： G06F116

CPC分类号： G06F1/1616 ,  G06F1/1656 ,  G06F1/166

摘要： In order to provide an electronic device permitting a reduction in size or an expansion of its internal space while maintaining its mechanical strength, a structure having mechanical strength is integrally formed with hinges for fitting a lid-shaped display unit to a box-shaped body and a carrying handle projecting outward from the box-shaped body.

公开(公告)号：US06243313B1

公开(公告)日：2001-06-05

申请号：US09618940

申请日：2000-07-18

申请人： Yoshinori Sakamoto ,  Tatsuya Ishii ,  Atsushi Nozoe ,  Hitoshi Miwa ,  Kazuyoshi Oshima

发明人： Yoshinori Sakamoto ,  Tatsuya Ishii ,  Atsushi Nozoe ,  Hitoshi Miwa ,  Kazuyoshi Oshima

IPC分类号： G11C702

CPC分类号： G11C16/28 ,  G11C7/06 ,  G11C7/065 ,  G11C11/5621 ,  G11C11/5642 ,  G11C16/0416 ,  G11C29/00

摘要： In order to eliminate erroneous reading of data by preventing noise which might otherwise be transmitted at the data read time through parasitic capacitance in the data lines to other data lines, switches (Qt1 and Qt1′) are interposed between a sense amplifier (SA) for amplifying the potential of a data line (DL) and the data line, and the sense amplifier is fed with an operating voltage after the potential of the data line is transmitted to the sense amplifier, and the switch is turned off.

摘要翻译： 为了通过防止数据读取时通过数据线中的寄生电容发送到其他数据线的噪声来消除数据的错误读取，开关（Qt1和Qt1'）被插入在用于 放大数据线（DL）和数据线的电位，并且在数据线的电位被传送到读出放大器之后，感测放大器被馈送工作电压，并且开关被关断。