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    Image recording system and relay apparatus
    2.
    发明申请
    Image recording system and relay apparatus 审中-公开
    图像记录系统和中继装置

    公开(公告)号：US20050219601A1

    公开(公告)日：2005-10-06

    申请号：US11002705

    申请日：2004-12-01

    申请人： Akira Tamagaki ,  Akihiko Taniguchi ,  Junichi Kajiwara ,  Takao Horiuchi ,  Yoshiomi Hamano ,  Kiyoshi Inoue ,  Hiroki Kai ,  Koichi Sumida ,  Yohichi Shimazawa

    发明人： Akira Tamagaki ,  Akihiko Taniguchi ,  Junichi Kajiwara ,  Takao Horiuchi ,  Yoshiomi Hamano ,  Kiyoshi Inoue ,  Hiroki Kai ,  Koichi Sumida ,  Yohichi Shimazawa

    IPC分类号： G06F3/12 ,  B41J3/407 ,  G03G21/04 ,  G06F15/00 ,  G06K9/00 ,  G06T1/00 ,  H04N1/00 ,  H04N1/32 ,  H04N1/387 ,  H04N5/91

    CPC分类号： H04N1/32144 ,  H04N1/00278 ,  H04N2201/3205 ,  H04N2201/327 ,  H04N2201/3271

    摘要： A relay apparatus (relay unit) is provided between a PC, from which image data is transmitted, and an image recording apparatus (image recording unit). The relay apparatus executes a process for correcting a color on the image data transmitted from the PC to the image recording apparatus. In addition, a storage unit of the relay apparatus stores unique information of the image recording apparatus, such as a production number. The relay apparatus executes processes for correcting the image data and for adding the unique information to the image data transmitted from the PC, and then transmits the processed image data to the image recording apparatus. Thus, realized is an image recording system and the relay apparatus, in which it is not necessary to provide a circuit which executes a process for embedding unique information in the image data in the image recording apparatus, so that deterioration in quality of the image caused by the unique information can be prevented as much as possible.

    摘要翻译： 在发送图像数据的PC与图像记录装置（图像记录单元）之间提供中继装置（中继单元）。 中继装置执行用于校正从PC发送到图像记录装置的图像数据的颜色的处理。 此外，中继装置的存储单元存储诸如生产号码的图像记录装置的唯一信息。 中继装置执行用于校正图像数据并将唯一信息添加到从PC发送的图像数据的处理，然后将处理的图像数据发送到图像记录装置。 因此，实现了一种图像记录系统和中继装置，其中不需要提供执行用于在图像记录装置中的图像数据中嵌入唯一信息的处理的电路，从而导致图像质量的劣化 可以通过独特的信息尽可能的防止。

    Power supply device preventing inrush current
    3.
    发明授权
    Power supply device preventing inrush current 有权
    电源装置防止浪涌电流

    公开(公告)号：US06934141B2

    公开(公告)日：2005-08-23

    申请号：US10421693

    申请日：2003-04-24

    申请人： Yoshiomi Hamano ,  Kiyoshi Inoue ,  Junichi Kajiwara ,  Takao Horiuchi ,  Koichi Sumida ,  Akira Tamagaki ,  Akihiko Taniguchi ,  Hiroki Kai

    发明人： Yoshiomi Hamano ,  Kiyoshi Inoue ,  Junichi Kajiwara ,  Takao Horiuchi ,  Koichi Sumida ,  Akira Tamagaki ,  Akihiko Taniguchi ,  Hiroki Kai

    IPC分类号： H02H9/02 ,  H01H9/54 ,  H02H9/00 ,  H02J1/00 ,  H02M3/00 ,  H01H47/00

    CPC分类号： H02H9/001 ,  H01H9/542

    摘要： A power supply device 3 including: a current source 31 for supplying current to a load circuit 4 which operates on the supplied current, and a power switch unit 32 between the current source 31 and the load circuit 4 to control passage of current, wherein: the power switch unit 32 includes a switching element 323 connected in parallel with the open-close element 321, a power supply controller 33 including an open-close element controller 31 which controls operation of the open-close element 321 and a switching element controller 332 which controls operation of the switching element 323, and a voltage detector 34 which detects terminal voltage of the load circuit 4; and the power switch unit 32 turns on the switching element before supplying current to the load circuit and closes the open-close element when the terminal voltage of the load circuit becomes almost equal to supply voltage.

    摘要翻译： 一种电源装置3，包括：电流源31，用于向负载电路4提供电流，该负载电路4对所提供的电流进行操作，以及电流源31和负载电路4之间的电源开关单元32，用于控制电流的通过，其中： 电源开关单元32包括与开闭元件321并联连接的开关元件323，电源控制器33，其包括控制开闭元件321的动作的开闭元件控制器31以及开关元件控制器332 控制开关元件323的动作以及检测负载电路4的端子电压的电压检测器34; 并且当负载电路的端子电压变得几乎等于电源电压时，电源开关单元32在向负载电路供电之前接通开关元件并闭合开 - 闭元件。

    Expansion information processing module, information processing module, settings information inheriting method, and setting information inheriting program
    4.
    发明申请
    Expansion information processing module, information processing module, settings information inheriting method, and setting information inheriting program 有权
    扩展信息处理模块，信息处理模块，设置信息继承方法和设置信息继承程序

    公开(公告)号：US20060012826A1

    公开(公告)日：2006-01-19

    申请号：US11181173

    申请日：2005-07-13

    申请人： Junichi Kajiwara ,  Kiyoshi Inoue ,  Jun Morimoto

    发明人： Junichi Kajiwara ,  Kiyoshi Inoue ,  Jun Morimoto

    IPC分类号： G06F3/12

    CPC分类号： H04N1/00204 ,  H04N2201/001 ,  H04N2201/0034 ,  H04N2201/0039 ,  H04N2201/0094 ,  Y10S370/911

    摘要： An expansion image processing board 6 (expansion information processing module) of the present invention, which is installable in a network printer 2 having an image processing board 5 (information processing module), includes: a second printer function control section 28 (expansion information processing section) which controls the network printer 2; and a router 31 (data relaying section) which relays data to the second printer function control section 28 or the image processing board 5. Therefore, the expansion image processing board 6 is capable of simply and efficiently extending a functionality of the network printer 2.

    摘要翻译： 可安装在具有图像处理板5（信息处理模块）的网络打印机2中的本发明的扩展图像处理板6（扩展信息处理模块）包括：第二打印机功能控制部分28（扩展信息处理 部分），其控制网络打印机2; 以及将数据中继到第二打印机功能控制部28或图像处理板5的路由器31（数据中继部）。因此，扩展图像处理板6能够简单且有效地扩展网络打印机2的功能。

    Image forming apparatus
    6.
    发明授权
    Image forming apparatus 有权
    图像形成装置

    公开(公告)号：US09535383B2

    公开(公告)日：2017-01-03

    申请号：US13087482

    申请日：2011-04-15

    申请人： Kiyoshi Inoue

    发明人： Kiyoshi Inoue

    IPC分类号： G03G15/36 ,  H04N1/00 ,  H04N1/38 ,  H04N1/387 ,  G03G15/00

    CPC分类号： B41J13/0009 ,  G03G15/36 ,  G03G15/50 ,  G03G15/502 ,  G03G2215/00569 ,  G03G2215/00582 ,  G06F3/1218 ,  G06F3/1219 ,  H04N1/00002 ,  H04N1/00015 ,  H04N1/00031 ,  H04N1/00053 ,  H04N1/00063 ,  H04N1/3873 ,  H04N2201/0094

    摘要： When trial printing is executed in a repeat printing mode, trial printing is performed in size of an image of one piece in a layout in which a plurality of images are supposed to be printed in the repeat printing mode normally. A user who has checked a finished state of the trial printing sets, when the finished state is in a desired state, the recording paper on which the trial printing is performed to the paper feed portion again and executes the repeat printing. Thereby, in a blank space excluding a print image which is printed with a first time trial printing, a scheduled quantity of a plurality of images are repeatedly printed.

    摘要翻译： 当在重复打印模式下执行试打印时，在重复打印模式中正常地应该以多张图像被打印的布局中的一个图像的大小执行试打印。 当完成状态处于期望状态时，​​已经检查了试纸打印的完成状态的用户再次对进纸部分进行了试纸打印的记录纸，并执行了重复打印。 由此，除了在第一次试打印上打印的打印图像之外的空白空间中，重复打印多张图像的调度量。

    SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE SEMICONDUCTOR MEMORY CELLS
    7.
    发明申请
    SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE SEMICONDUCTOR MEMORY CELLS 有权
    具有电可擦除和可编程半导体存储器单元的半导体存储器

    公开(公告)号：US20120127792A1

    公开(公告)日：2012-05-24

    申请号：US13363400

    申请日：2012-02-01

    申请人： Kunihiro KATAYAMA ,  Takayuki Tamura ,  Kiyoshi Inoue

    发明人： Kunihiro KATAYAMA ,  Takayuki Tamura ,  Kiyoshi Inoue

    IPC分类号： G11C16/10

    CPC分类号： G11C16/28 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/30 ,  G11C2211/5621 ,  G11C2211/5632 ,  G11C2211/5634 ,  G11C2211/5641 ,  G11C2211/5642

    摘要： In a nonvolatile memory apparatus, a system bus receives address, command, and/or control signals. Memory cells store bits of data by shifting a threshold voltage to one of plural ranges. In writing a first page, the threshold voltage of a first memory cell remains in a first range or shifts into a second range. In writing a second page, the threshold voltage remains in the first or second voltages, or shifts into a third range from the first range or into a fourth range from the second range. Before writing the second page, the memory reads data from the first memory cell for generating the second page writing data. A shifting direction of the threshold voltage from the first to the second range is the same as a shifting direction from the first to the third range.

    摘要翻译： 在非易失性存储装置中，系统总线接收地址，命令和/或控制信号。 存储单元通过将阈值电压移位到多个范围之一来存储数据位。 在写入第一页时，第一存储器单元的阈值电压保持在第一范围或者移位到第二范围。 在写第二页时，阈值电压保持在第一或第二电压中，或者从第二范围移动到从第一范围到第四范围的第三范围。 在写入第二页之前，存储器从第一存储器单元读取用于生成第二页写入数据的数据。 从第一到第二范围的阈值电压的移动方向与从第一到第三范围的移动方向相同。

    Semiconductor memory having electrically erasable and programmable semiconductor memory cells
    9.
    发明授权
    Semiconductor memory having electrically erasable and programmable semiconductor memory cells 有权
    具有电可擦除和可编程的半导体存储器单元的半导体存储器

    公开(公告)号：US07881111B2

    公开(公告)日：2011-02-01

    申请号：US12504307

    申请日：2009-07-16

    申请人： Kunihiro Katayama ,  Takayuki Tamura ,  Kiyoshi Inoue

    发明人： Kunihiro Katayama ,  Takayuki Tamura ,  Kiyoshi Inoue

    IPC分类号： G11C16/04

    CPC分类号： G11C16/28 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/30 ,  G11C2211/5621 ,  G11C2211/5632 ,  G11C2211/5634 ,  G11C2211/5641 ,  G11C2211/5642

    摘要： An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.

    摘要翻译： 一种可电气可变的非易失性多级存储器件和操作这种器件的方法，其包括将至少一个存储器单元的状态设置为从包括至少第一至第四电平状态的多个状态中选择的一种状态 响应于要存储在一个存储器单元中的信息，并且通过利用在第二和第二电平状态之间设置的第一参考电平来读取存储单元的状态来确定读出状态是否对应于第一至第四电平状态之一 第三电平状态，在第一和第二电平状态之间设置的第二参考电平和在第三和第四电平状态之间设置的第三参考电平。

    SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE SEMICONDUCTOR MEMORY CELLS
    10.
    发明申请
    SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE SEMICONDUCTOR MEMORY CELLS 有权
    具有电可擦除和可编程半导体存储器单元的半导体存储器

    公开(公告)号：US20100014351A1

    公开(公告)日：2010-01-21

    申请号：US12504307

    申请日：2009-07-16

    申请人： Kunihiro KATAYAMA ,  Takayuki Tamura ,  Kiyoshi Inoue

    发明人： Kunihiro KATAYAMA ,  Takayuki Tamura ,  Kiyoshi Inoue

    IPC分类号： G11C16/04 ,  G11C7/00

    CPC分类号： G11C16/28 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/30 ,  G11C2211/5621 ,  G11C2211/5632 ,  G11C2211/5634 ,  G11C2211/5641 ,  G11C2211/5642

    摘要： An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.

    摘要翻译： 一种可电气可变的非易失性多级存储器件和操作这种器件的方法，其包括将至少一个存储器单元的状态设置为从包括至少第一至第四电平状态的多个状态中选择的一种状态 响应于要存储在一个存储器单元中的信息，并且通过利用在第二和第二电平状态之间设置的第一参考电平来读取存储单元的状态来确定读出状态是否对应于第一至第四电平状态之一 第三电平状态，在第一和第二电平状态之间设置的第二参考电平和在第三和第四电平状态之间设置的第三参考电平。