Abstract:
A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.
Abstract:
A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.
Abstract:
According to an aspect of the invention, there is provided a solid-state imaging device which discharges a signal from a photodiode in each cell in which the photodiode, a read gate reading a signal from the photodiode and a detector detecting a read signal are two-dimensionally arranged on a semiconductor substrate, then stores a signal in each photodiode, and reads a signal from each photodiode after a storage time. The device comprises a circuit performing an operation of applying to each corresponding cell a first pulse used to discharge a signal in each photodiode corresponding to one horizontal line for a plurality of horizontal lines in a first horizontal scanning period, and an operation of applying to each diode corresponding cell a second pulse used to read a signal in each photodiode corresponding to one horizontal lines for a plurality of horizontal lines in a second horizontal scanning period.
Abstract:
According to one embodiment, a solid-state imaging device includes a pixel outputting a photoelectrically converted signal, an ADC circuit disposed in an edge portion of a pixel area to convert an analog signal of the pixel into a digital signal on the basis of a result of comparison between a signal level output from the pixel and a ramp wave which is a reference, and a multi-ramp-wave generating circuit generating a plurality of ramp waves with different amplitudes and combining the plurality of ramp waves to obtain the ramp wave.
Abstract:
An image pickup device includes a signal processing unit which processes a signal generated by separating a luminous signal into wavelength components of two or more colors by use of a sensor unit including two-dimensionally arranged pixels to which a wavelength separating unit for separating light wavelengths is arranged at a front face of a photoelectric converting element which converts the luminous signal condensed by an optical lens unit into electric signals, wherein the optical lens unit includes at least one optical lens having different focusing positions in accordance with the wavelengths of the luminous signal, and the signal processing unit includes an outline signal generating unit which extracts an outline signal from an output signal of the sensor unit.
Abstract:
According to one embodiment, a solid-state imaging device includes, a pixel section, a read pulse amplitude control unit which controls exposure time for which a photo diode carries out the photoelectric conversion and dividing the signal charge accumulated in the photo diode into fractions so that the fractions are read from the photo diode, a plurality of line memories to which the plurality of read signals are saved. And the device further includes an addition unit which synthesizes the plurality of read signals into one signal, the addition unit includes first determination unit which reads the signal saved to the predetermined line memory and comparing a signal level of the read signal with a predetermined level to determine whether or not to add a signal read from a different line memory to the compared signal.
Abstract:
A solid-state image sensing device has a plurality of pixels, a read-out circuit for reading out electric signals obtained by the photoelectric conversion element, and a signal processing unit for performing signal processing for the electric signal read out from the read-out circuit. The plurality of pixels include a first pixel having a transparent film, a plurality of second pixels each having a first color filter, a plurality of third pixels each having a second color filter, and a plurality of fourth pixels each having a third color filter. The signal processing unit has a color acquisition unit for acquiring a white pixel value and first to third color pixel values, an edge judgment unit, a color separation unit and a single color pixel calculation unit.
Abstract:
According to one embodiments, a pixel array unit in which pixels PC are arranged in a matrix manner, a sample-and-hold signal conversion circuit that detects a signal component of each of the pixels PC in a CDS, and a timing control circuit that controls to sample a reference level of an analog CDS after a reference level of a digital CDS is converted into a digital value are included.
Abstract:
An alarm device includes: a wireless circuit section which wirelessly exchanges event signals with an other alarm device; an alert section which outputs an alarm; an operation section which accepts predetermined operations; a sensor section which issues an abnormal condition detection signal when an abnormal condition occurred is detected within a monitoring area; an abnormal condition monitoring section which, upon receiving the abnormal condition detection signal from the sensor section, outputs an abnormal condition alarm as a linkage source from the alert section, and transmits an event signal indicating an abnormal condition to the other alarm devices, and conversely, upon receiving an event signal indicating an abnormal condition from the other alarm device, outputs an abnormal condition alarm as a linkage destination from the alert section; a communication test transmission processing section which, at a predetermined timing, transmits an event signal indicating a communication test to the other alarm device and; a communication test reception processing section which, upon receiving an event signal indicating a communication test from the other alarm device, announces the reception status of this event signal.
Abstract:
In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair. The horizontal select transistors in each pair share one of the source/drain regions so as to be connected to the horizontal signal line in common, and the others of the source/drain regions are connected to the vertical signal line individually.