公开(公告)号：US08138423B2

公开(公告)日：2012-03-20

申请号：US11719803

申请日：2005-11-18

申请人： Mitsuhiro Watanabe ,  Kinji Saijo ,  Shinji Ohsawa ,  Kazuo Yoshida ,  Koji Nanbu

发明人： Mitsuhiro Watanabe ,  Kinji Saijo ,  Shinji Ohsawa ,  Kazuo Yoshida ,  Koji Nanbu

IPC分类号： H05K1/03

CPC分类号： H05K3/427 ,  H05K1/0265 ,  H05K1/116 ,  H05K3/062 ,  H05K3/20 ,  H05K3/4658 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0376 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2203/0361 ,  H05K2203/0384 ,  H05K2203/1476 ,  Y10T156/10

摘要： A printed wiring board and a method for manufacturing the printed wiring board in which widths of a first and a second circuit are close to each other and substantial miniaturization can be achieved. In order to achieve this object, a first circuit and a second circuit having different thicknesses are formed in the same reference plane by etching a metal-clad laminate including a conductive layer and an insulating layer. The thicker of the circuits has a clad-like configuration in which three layers, a first copper layer/a different kind of metal layer/a second copper layer, are sequentially stacked. The manufacture of the printed wiring board includes a clad composite material in which three layers of a first copper layer/a different kind of metal layer/a second copper layer are sequentially stacked as a start material, and selective etching characteristics between the layers are utilized.

摘要翻译： 一种印刷电路板和用于制造印刷电路板的方法，其中第一和第二电路的宽度彼此接近并且可以实现实质的小型化。 为了实现该目的，通过蚀刻包括导电层和绝缘层的覆金属层压体，在相同的参考平面中形成具有不同厚度的第一电路和第二电路。 较厚的电路具有包层状构造，其中依次层叠有三层，第一铜层/不同种类的金属层/第二铜层。 印刷电路板的制造包括其中依次层叠有三层第一铜层/不同种类的金属层/第二铜层作为起始材料的覆层复合材料，并且利用层之间的选择性蚀刻特性 。

公开(公告)号：US07623170B2

公开(公告)日：2009-11-24

申请号：US11154604

申请日：2005-06-17

申请人： Nobuo Nakamura ,  Yoriko Tanaka ,  Yoshitaka Egawa ,  Shinji Ohsawa ,  Tadashi Sugiki ,  Yukio Endo

发明人： Nobuo Nakamura ,  Yoriko Tanaka ,  Yoshitaka Egawa ,  Shinji Ohsawa ,  Tadashi Sugiki ,  Yukio Endo

IPC分类号： H04N5/335

CPC分类号： H04N5/2355 ,  H04N5/235 ,  H04N5/35527 ,  H04N5/35572 ,  H04N5/35581 ,  H04N5/372 ,  H04N5/3728 ,  H04N5/374

摘要： An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column. The control circuit controls each of the unit cells, causing the charge-limiting device to limit the charge generated by the light-receiving device during a first period and transferred to the charge-accumulating section through the transfer device. The charge generated by the light-receiving device during a second period following the first period and transferred to the charge-accumulating section through the transfer device is added to the electric charge accumulated in the charge-accumulating section.

摘要翻译： 一种图像拾取装置，包括单位单元阵列，垂直信号线和控制电路。 单位单元以行和列排列。 每个单元具有用于接收光并产生与该光相对应的电荷的光接收装置，用于累积由光接收装置产生的电荷的电荷累积部分，用于将电荷从 光接收装置到蓄电部，以及用于限制积蓄在蓄电部中的电荷的充电限制装置。 垂直信号线分别沿着单位单元的列延伸，每个用于接收与相关列的任何单位单元的电荷累积部分中累积的电荷相对应的电数据项。 控制电路控制每个单元电池，使得充电限制装置在第一时段期间限制由光接收装置产生的电荷，并通过传送装置传送到电荷累积部分。 在第一时间段之后的第二时段期间由光接收装置产生的电荷通过传送装置传送到电荷累积部分的电荷被加到累积在电荷累积部分中的电荷中。

公开(公告)号：US07586523B2

公开(公告)日：2009-09-08

申请号：US11553233

申请日：2006-10-26

申请人： Yoshitaka Egawa ,  Ryuta Okamoto ,  Shinji Ohsawa ,  Hiroshige Goto

发明人： Yoshitaka Egawa ,  Ryuta Okamoto ,  Shinji Ohsawa ,  Hiroshige Goto

IPC分类号： H04N5/235 ,  H04N5/30

CPC分类号： H04N5/235 ,  H04N5/2355 ,  H04N5/335

摘要： A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.

摘要翻译： 公开了一种包括像素部分，AD转换器，行存储器，控制器和合成器的固态图像传感器。 行存储器存储从AD转换器输出的数字信号。 控制器控制像素部分和AD转换器，通过使用AD转换器将不同曝光时间的模拟信号接收到AD转换处理，并将这样的AD转换的信号在一帧的电荷累积期间传送到行存储器。 合成器具有来自线路存储器的不同曝光时间的数字信号，将通过将短曝光时间和长曝光时间的信号相加得到的第一信号与通过将短曝光时间的信号进行放大而获得的第二信号进行比较， 短曝光时间长时间曝光的信号，选择较大的一个比较信号并输出​​所选信号。

公开(公告)号：US07175919B2

公开(公告)日：2007-02-13

申请号：US10399530

申请日：2001-10-04

申请人： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

发明人： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

IPC分类号： B32B15/01

CPC分类号： H05K3/025 ,  B23K20/04 ,  B32B15/01 ,  H05K3/062 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2203/0384 ,  H05K2203/068 ,  Y10T428/12 ,  Y10T428/12438 ,  Y10T428/12896 ,  Y10T428/12979

摘要： An adhesive-free multilayered metal laminate having a given thickness which is obtained by bonding a metal sheet having a thin metal film on a surface thereof to a metal foil without using an adhesive; and a process for continuously producing the laminate. The process comprises the steps of; setting a metal sheet on a reel for metal sheet unwinding; setting a metal foil on a reel for metal foil unwinding; unwinding the metal sheet from the metal sheet-unwinding reel and activating a surface of the metal sheet to thereby form a first thin metal film on the metal sheet surface; unwinding the metal foil from the metal foil-unwinding reel and activating a surface of the metal foil to thereby form a second thin metal film on the metal foil surface; and press-bonding the activated surface of the first thin metal film to that of the second thin metal film so that the first thin metal film formed on the metal sheet is in contact with the second thin metal film formed on the metal foil.

摘要翻译： 具有给定厚度的无粘合剂的多层金属层压体，其通过在其表面上将不具有金属薄膜的金属薄片接合而不使用粘合剂而获得; 以及连续制造层压体的方法。 该方法包括以下步骤： 将金属板放在卷轴上用于金属板退绕; 在金属箔退绕卷轴上设置金属箔; 从金属板退绕卷轴退绕金属片并激活金属片的表面，从而在金属片表面上形成第一薄金属膜; 从金属箔退绕卷轴退绕金属箔并激活金属箔的表面，从而在金属箔表面上形成第二薄金属膜; 并且将第一薄金属膜的活化表面压接到第二薄金属膜的活化表面，使得形成在金属片上的第一薄金属膜与形成在金属箔上的第二薄金属膜接触。

公开(公告)号：US20050193555A1

公开(公告)日：2005-09-08

申请号：US11119820

申请日：2005-05-03

申请人： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

发明人： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

IPC分类号： H05K1/02 ,  H05K3/06 ,  H05K3/46 ,  H05K1/03

CPC分类号： H05K1/0221 ,  H05K3/062 ,  H05K3/4647 ,  H05K2201/0361 ,  H05K2201/09254 ,  H05K2203/0384 ,  H05K2203/0733 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49156

摘要： A multilayer printed wiring board having a wiring lead-out port has a signal circuit conductor perfectly covered by an earth circuit in its inside and a wiring lead-out port. A signal circuit conductor having a branch pattern is preferable. A large number of products can be easily manufactured with good size reproducibility. The multilayer printed wiring board is manufactured by selectively etching the copper of a cladding sheet manufactured by bonding a copper foil to a nickel foil with 0.1-3 % reduction and forming a signal circuit conductor covered by an earth circuit and the wiring lead-out port.

摘要翻译： 具有布线引出口的多层印刷布线板具有完全被其内部的接地电路覆盖的信号电路导体和布线引出口。 具有分支图案的信号电路导体是优选的。 可以容易地制造大量的产品，具有良好的尺寸再现性。 多层印刷线路板是通过选择性地蚀刻通过将铜箔接合到镍箔上而制造的包层片的铜，其中，铜箔的折射率减少了0.1-3％，并且形成了由接地电路覆盖的信号电路导体和布线引出端口 。

公开(公告)号：US06903768B1

公开(公告)日：2005-06-07

申请号：US09349232

申请日：1999-07-08

申请人： Shinji Ohsawa ,  Yukio Endo ,  Yoshitaka Egawa

发明人： Shinji Ohsawa ,  Yukio Endo ,  Yoshitaka Egawa

IPC分类号： H01L27/146 ,  H04N5/335 ,  H04N5/365 ,  H04N5/369 ,  H04N5/3745 ,  H04N5/217

CPC分类号： H04N5/3658 ,  H04N5/361

摘要： In a solid state image sensor device comprising a cell area wherein unit cells each having photoelectric diodes are arranged in a matrix form on a semiconductor substrate, the cell area being composed of a photo-sensitive pixel region for sensing an image, and an optical black pixel region for defining an optical black level, and a vertical shift register for selecting the unit cells of the image sensing cell array, in a group along each of horizontal lines, and vertical signal lines, each of which reads each of signals from the unit cells selected by turning on an address register by means of the vertical shift register, the vertical signal lines in the optical black pixel region are connected with each other through a wiring. Since the vertical signal lines in the optical black pixel region are connected with each other by a wiring, even if outputs from an optical black pixel region vary in the pixels, the outputs are made averaged and uniform and a variation in fixed pattern noises between the horizontal lines are reduced.

摘要翻译： 在包括单元区域的固态图像传感器装置中，其中每个具有光电二极管的单位单元以矩阵形式布置在半导体衬底上，所述单元区域由用于感测图像的光敏像素区域和光学黑色 用于定义光学黑色电平的像素区域和用于选择每个水平线的组中的图像感测单元阵列的单位单元的垂直移位寄存器和每个从单元读取每个信号的垂直信号线 通过借助于垂直移位寄存器接通地址寄存器而选择的单元，光学黑色像素区域中的垂直信号线通过布线相互连接。 由于光学黑色像素区域中的垂直信号线通过布线彼此连接，所以即使来自光学黑色像素区域的输出在像素中变化，则输出被平均化和均匀，并且固定图案噪声的变化在 水平线减少。

公开(公告)号：US20050082669A1

公开(公告)日：2005-04-21

申请号：US10504426

申请日：2003-03-10

申请人： Kinji Saijo ,  Kazuo Yoshida ,  Shinji Ohsawa

发明人： Kinji Saijo ,  Kazuo Yoshida ,  Shinji Ohsawa

IPC分类号： H01L21/56 ,  H01L21/60 ,  H05K3/32 ,  H01L21/44 ,  H01L23/48 ,  H01L29/40

CPC分类号： H05K3/328 ,  H01L21/563 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/81054 ,  H01L2224/81192 ,  H01L2224/81208 ,  H01L2224/8121 ,  H01L2224/8123 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30107 ,  H05K2201/0367 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05655

摘要： An electronic circuit device capable of providing a stable electrical connection between an electronic component chip and a connecting multi-layer substrate, and being downsized at high density; and a production method therefor. An electronic component chip (1) and a connecting multi-layer substrate (2) or electronic component chips are heated in an inactive atmosphere such as argon or a reducing atmosphere such as hydrogen and pressure-welded to each other with or without an intermediary of an interposer (6), or their joint surfaces are activated and then pressure-welded at room temperature or by heating, thereby producing an electronic circuit device (40) by directly and metallurgically joining them by using any one of the above methods.

摘要翻译： 一种电子电路装置，其能够在电子部件芯片和连接多层基板之间提供稳定的电连接，并且以高密度进行小型化; 及其制造方法。 电子元件芯片（1）和连接多层基板（2）或电子元件芯片在诸如氩气或诸如氢气的还原气氛的惰性气氛中被加热，并且在有或没有中间 插入器（6）或其接合表面被激活，然后在室温或加热下进行压焊，从而通过使用上述任一方法直接和冶金连接它们来生产电子电路装置（40）。

公开(公告)号：US06881944B2

公开(公告)日：2005-04-19

申请号：US10375196

申请日：2003-02-28

申请人： Shinji Ohsawa ,  Yoshitaka Egawa

发明人： Shinji Ohsawa ,  Yoshitaka Egawa

IPC分类号： H01L27/146 ,  H04N5/335 ,  H04N5/355 ,  H04N5/369 ,  H04N5/374 ,  H04N5/378 ,  H01L27/00

CPC分类号： H04N5/3598 ,  H04N5/357 ,  H04N5/374

摘要： A solid state image sensor includes an imaging circuit, a selection circuit, a signal line and an adjustment circuit. The imaging circuit has a plurality of unit cells including a photo-detection section and a first reference potential generating section which generates a first reference potential. The selection circuit selects the unit cell. The signal line is supplied with a signal potential corresponding to a signal charge from the unit cell in a read-out operation, and supplied with the first reference potential in a reset operation. The adjustment circuit operates in response to an adjustment instruction signal which is asserted in an adjustment operation following the reset operation, and applies a second reference potential to the signal line in accordance with a potential of the signal line.

摘要翻译： 固态图像传感器包括成像电路，选择电路，信号线和调整电路。 成像电路具有包括光检测部和第一参考电位生成部的多个单位电池，其产生第一基准电位。 选择电路选择单元。 信号线在读出操作中被提供有对应于来自单位单元的信号电荷的信号电位，并在复位操作中被提供有第一参考电位。 调整电路响应于在复位操作之后的调整操作中断言的调整指令信号而工作，并且根据信号线的电位向信号线施加第二参考电位。

公开(公告)号：US20050012839A1

公开(公告)日：2005-01-20

申请号：US10916409

申请日：2004-08-12

申请人： Yoshiyuki Matsunaga ,  Shinji Ohsawa ,  Nobuo Nakamura ,  Hirofumi Yamashita ,  Hiroki Miura

发明人： Yoshiyuki Matsunaga ,  Shinji Ohsawa ,  Nobuo Nakamura ,  Hirofumi Yamashita ,  Hiroki Miura

IPC分类号： H01L27/146 ,  H04N5/335 ,  H04N5/357 ,  H04N5/361 ,  H04N5/363 ,  H04N5/369 ,  H04N5/374 ,  H04N5/3745 ,  H04N5/376 ,  H04N5/378

CPC分类号： H04N5/3658 ,  H01L27/14609 ,  H01L27/14643 ,  H04N5/3575 ,  H04N5/365 ,  H04N5/374 ,  H04N5/3745 ,  H04N5/378

摘要： An MOS-type solid-state imaging apparatus includes an imaging region formed by two-dimensionally arranging unit cells serving as photoelectric conversion portions on a semiconductor substrate, a plurality of vertical address lines arranged in a row direction of the imaging region to select a row of unit cells to be addressed, a plurality of vertical signal lines arranged in a column direction of the imaging region to read out signals from the unit cells in each column, a plurality of load transistors each connected to one end of each of the vertical signal lines, and a plurality of horizontal selection transistors each connected to the other end of each of the vertical signal lines. In this apparatus, each unit cell includes a photodiode serving as a photoelectric conversion portion, an amplification transistor having a gate to which an output from the photodiode is supplied, and a source and a drain respectively connected to the vertical signal line and the vertical address line, an address capacitor connected between the gate of the amplification transistor and the vertical address line, and a reset transistor connected in parallel with the address capacitor.

摘要翻译： MOS型固态成像装置包括：通过二维排列在半导体衬底上作为光电转换部分的单位单元形成的成像区域，沿着成像区域的行方向布置的多个垂直地址线，以选择行 要被寻址的单位单元，沿着成像区域的列方向布置的多条垂直信号线，以从每列中的单位单元读出信号;多个负载晶体管，每个连接到每个垂直信号的一端 线，以及多个水平选择晶体管，每个连接到每个垂直信号线的另一端。 在该装置中，每个单位单元包括用作光电转换部分的光电二极管，具有栅极的放大晶体管，来自光电二极管的输出端分别连接到垂直信号线和垂直地址的源极和漏极 连接在放大晶体管的栅极和垂直地址线之间的地址电容器，以及与地址电容器并联连接的复位晶体管。

公开(公告)号：US06838318B1

公开(公告)日：2005-01-04

申请号：US10009196

申请日：2000-06-09

申请人： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

发明人： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H05K3/06 ,  H05K3/28 ,  H05K3/40 ,  H01L21/44 ,  B21D33/00 ,  B32B15/20

CPC分类号： H01L23/3114 ,  H01L23/3107 ,  H01L23/49582 ,  H01L23/49861 ,  H01L2224/16 ,  H01L2924/07811 ,  H05K3/062 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/10378 ,  H05K2203/0384 ,  H05K2203/1572 ,  Y10T29/30 ,  Y10T29/301 ,  Y10T29/302 ,  Y10T29/49002 ,  Y10T428/1291 ,  H01L2924/00

摘要： A clad plate for forming an interposer for a semiconductor device which can be manufactured at low cost and has good characteristics, an interposer for a semiconductor device, and a method of manufacturing them. Copper foil materials (19, 24, 33) forming conductive layers (10, 17, 18) and nickel plating (20, 21) forming etching stopper layers (11, 12) are formed and pressed to form a clad plate (34) for forming an interposer for a semiconductor device. Thus, a clad plate (34) for forming an interposer for a semiconductor device is manufactured. The clad plate (34) is selectively etched to form a columnar conductor (17), and an insulating layer (13) is formed on the copper foil material forming a wiring layer (10). A bump (18) for connection of a semiconductor chip and the wiring layer (10) are formed on the opposite side to the side on which the columnar conductor (17) is formed. Thus, an interposer for a semiconductor device is manufactured.