公开(公告)号：US20130049813A1

公开(公告)日：2013-02-28

申请号：US13425606

申请日：2012-03-21

申请人： Yuki Sato ,  Hiroyuki Tsurumi

发明人： Yuki Sato ,  Hiroyuki Tsurumi

IPC分类号： H03K3/00

CPC分类号： H03K17/00 ,  H03K17/08122 ,  H03K17/6871 ,  H03K2217/0063

摘要： The high-side switch circuit includes a first output MOS transistor that is connected, at a first end thereof, to a power supply terminal. The high-side switch circuit includes a second output MOS transistor that is connected to a second end of the first output MOS transistor at a first end thereof and to a voltage output terminal at a second end thereof. The high-side switch circuit includes a current detecting circuit that detects a current flowing through the first output MOS transistor and outputs a detection signal. The high-side switch circuit includes a first gate driver that applies a first control voltage to a gate of the first output MOS transistor. The high-side switch circuit includes a second gate driver that applies a second control voltage to a gate of the second output MOS transistor.

摘要翻译： 高侧开关电路包括在其第一端处连接到电源端子的第一输出MOS晶体管。 高侧开关电路包括第二输出MOS晶体管，其在第一端连接到第一输出MOS晶体管的第二端，并在其第二端连接到电压输出端。 高侧开关电路包括电流检测电路，其检测流过第一输出MOS晶体管的电流并输出检测信号。 高侧开关电路包括对第一输出MOS晶体管的栅极施加第一控制电压的第一栅极驱动器。 高侧开关电路包括向第二输出MOS晶体管的栅极施加第二控制电压的第二栅极驱动器。

公开(公告)号：US20110193631A1

公开(公告)日：2011-08-11

申请号：US12969773

申请日：2010-12-16

申请人： Katsuhiro Yasuda ,  Hiroyuki Tsurumi ,  Yuki Sato

发明人： Katsuhiro Yasuda ,  Hiroyuki Tsurumi ,  Yuki Sato

IPC分类号： H03F3/45

CPC分类号： H03F3/187 ,  H03F3/45475 ,  H03F2203/45392

摘要： According to embodiments, in a case that a source voltage is lowered and a potential difference between the source voltage and a ripple terminal voltage is below a constant potential difference, the ripple terminal voltage is lowered until the ripple terminal voltage reaches a first threshold value when a lowered value of the source voltage is equal to or larger than a predetermined voltage that exceeds the first threshold value by the constant potential difference, and the ripple terminal voltage is lowered until the ripple terminal voltage reaches a second threshold value smaller than the first threshold value when the lowered value of the source voltage is below the predetermined voltage.

摘要翻译： 根据实施例，在源极电压降低并且源极电压和纹波端子电压之间的电位差低于恒定电位差的情况下，纹波端子电压降低直到纹波端子电压达到第一阈值， 源极电压的降低值等于或大于通过恒定电位差超过第一阈值的预定电压，并且纹波端电压降低直到纹波端电压达到小于第一阈值的第二阈值 当源电压的降低值低于预定电压时的值。

公开(公告)号：US08604842B2

公开(公告)日：2013-12-10

申请号：US13425606

申请日：2012-03-21

申请人： Yuki Sato ,  Hiroyuki Tsurumi

发明人： Yuki Sato ,  Hiroyuki Tsurumi

IPC分类号： H03K3/00 ,  H03K5/153

CPC分类号： H03K17/00 ,  H03K17/08122 ,  H03K17/6871 ,  H03K2217/0063

摘要： The high-side switch circuit includes a first output MOS transistor that is connected, at a first end thereof, to a power supply terminal. The high-side switch circuit includes a second output MOS transistor that is connected to a second end of the first output MOS transistor at a first end thereof and to a voltage output terminal at a second end thereof. The high-side switch circuit includes a current detecting circuit that detects a current flowing through the first output MOS transistor and outputs a detection signal. The high-side switch circuit includes a first gate driver that applies a first control voltage to a gate of the first output MOS transistor. The high-side switch circuit includes a second gate driver that applies a second control voltage to a gate of the second output MOS transistor.

摘要翻译： 高侧开关电路包括在其第一端处连接到电源端子的第一输出MOS晶体管。 高侧开关电路包括第二输出MOS晶体管，其在第一端连接到第一输出MOS晶体管的第二端，并在其第二端连接到电压输出端。 高侧开关电路包括电流检测电路，其检测流过第一输出MOS晶体管的电流并输出检测信号。 高侧开关电路包括对第一输出MOS晶体管的栅极施加第一控制电压的第一栅极驱动器。 高侧开关电路包括向第二输出MOS晶体管的栅极施加第二控制电压的第二栅极驱动器。

公开(公告)号：US08232838B2

公开(公告)日：2012-07-31

申请号：US12969773

申请日：2010-12-16

申请人： Katsuhiro Yasuda ,  Hiroyuki Tsurumi ,  Yuki Sato

发明人： Katsuhiro Yasuda ,  Hiroyuki Tsurumi ,  Yuki Sato

IPC分类号： H03F1/14

CPC分类号： H03F3/187 ,  H03F3/45475 ,  H03F2203/45392

摘要： According to embodiments, in a case that a source voltage is lowered and a potential difference between the source voltage and a ripple terminal voltage is below a constant potential difference, the ripple terminal voltage is lowered until the ripple terminal voltage reaches a first threshold value when a lowered value of the source voltage is equal to or larger than a predetermined voltage that exceeds the first threshold value by the constant potential difference, and the ripple terminal voltage is lowered until the ripple terminal voltage reaches a second threshold value smaller than the first threshold value when the lowered value of the source voltage is below the predetermined voltage.

摘要翻译： 根据实施例，在源极电压降低并且源极电压和纹波端子电压之间的电位差低于恒定电位差的情况下，纹波端子电压降低直到纹波端子电压达到第一阈值， 源极电压的降低值等于或大于通过恒定电位差超过第一阈值的预定电压，并且纹波端电压降低直到纹波端电压达到小于第一阈值的第二阈值 当源电压的降低值低于预定电压时的值。

公开(公告)号：US08908886B2

公开(公告)日：2014-12-09

申请号：US13489098

申请日：2012-06-05

申请人： Akira Yamauchi ,  Hiroyuki Tsurumi

发明人： Akira Yamauchi ,  Hiroyuki Tsurumi

IPC分类号： H03F99/00

CPC分类号： H03F1/523 ,  H03F3/45179 ,  H03F2200/03 ,  H03F2203/45481

摘要： The power amplifying apparatus includes a first comparator that compares the first detection signal and the fourth detection signal and outputs a first comparison signal depending on whether or not a difference between the first current and the fourth current is equal to or greater than a first predetermined value. The power amplifying apparatus includes a second comparator that compares the second detection signal and the third detection signal and outputs a second comparison signal depending on whether or not a difference between the second current and the third current is equal to or greater than a second predetermined value.

摘要翻译： 功率放大装置包括第一比较器，其比较第一检测信号和第四检测信号，并且根据第一电流和第四电流之间的差是否等于或大于第一预定值输出第一比较信号 。 功率放大装置包括第二比较器，其比较第二检测信号和第三检测信号，并且根据第二电流和第三电流之间的差是否等于或大于第二预定值输出第二比较信号 。

公开(公告)号：US06388496B1

公开(公告)日：2002-05-14

申请号：US09549512

申请日：2000-04-14

申请人： Hiroyuki Tsurumi ,  Toshiro Kubota

发明人： Hiroyuki Tsurumi ,  Toshiro Kubota

IPC分类号： H03K508

CPC分类号： H03F3/3081 ,  H03F3/3432 ,  H03F3/68 ,  H03K17/08112 ,  H03K17/663

摘要： The present invention relates to a semiconductor output circuit that protects a circuit including such a reverse operation as reverses the potentials of a collector and an emitter of a bipolar transistor. A cathode of a protective diode is connected to a P type side of a base-emitter PN junction of a bipolar transistor constituting a semiconductor output circuit, while an anode of the protective diode is connected to an N type side of the base-emitter PN junction. By positively operating the bipolar transistor in a reverse direction with a reverse current gain &bgr;R>1, a reverse voltage between a collector and an emitter of the bipolar transistor is precluded from exceeding Veco to prevent the transistor from being broken down due to its reverse operation. In addition, by connecting the anode of the protective diode to a P type side of a base-collector PN junction of the bipolar transistor constituting the semiconductor output circuit, while connecting the cathode of the protective diode to an N type side of the base-collector junction, Veco is increased to a higher level within the entire circuit to prevent the bipolar transistor from being broken down due to its reverse operation.

摘要翻译： 本发明涉及一种半导体输出电路，其保护包括这样的反向操作的电路，以反转双极晶体管的集电极和发射极的电位。 保护二极管的阴极连接到构成半导体输出电路的双极晶体管的基极 - 发射极PN结的P型侧，而保护二极管的阳极连接到基极 - 发射极PN的N型侧 交界处 通过在反向电流增益βR> 1的情况下以相反方向正极操作双极晶体管，双极晶体管的集电极和发射极之间的反向电压不会超过Veco，以防止晶体管由于其反向操作而分解 。 此外，通过将保护二极管的阳极连接到构成半导体输出电路的双极晶体管的基极集电极PN结的P型侧，同时将保护二极管的阴极连接到基极集电极PN结的N型侧， 集电极结，Veco在整个电路内增加到更高的电平，以防止双极晶体管由于其反向操作而分解。

公开(公告)号：US20050218987A1

公开(公告)日：2005-10-06

申请号：US11091430

申请日：2005-03-29

申请人： Hiroyuki Tsurumi

发明人： Hiroyuki Tsurumi

IPC分类号： H03F3/26 ,  H03F1/08 ,  H03F3/30

CPC分类号： H03F3/3022 ,  H03F1/083

摘要： A power amplifier includes an input circuit, three power supply lines with voltages successively decreasing in an order of first, second and third power supply lines, a push-side driving circuit and a pull-side driving circuit which receive control signals from the input circuit, three driving signal lines which are led out of the driving circuits, three output transistors which have current paths connected at one ends to the first, second and third power supply lines, and have gates connected to the three driving signal lines, respectively, an output terminal which is commonly connected to the other ends of the current paths of the output transistors, an impedance circuit which adjusts a gate impedance of the output transistor connected to the third power supply line, and a feedback circuit connected between the output terminal and the input circuit.

摘要翻译： 功率放大器包括：输入电路，具有按照第一，第二和第三电源线的顺序依次递减的三个电源线，从侧输入电路接收控制信号的推侧驱动电路和拉动侧驱动电路 从驱动电路引出的三个驱动信号线，三个输出晶体管，其一端具有电流通路连接到第一，第二和第三电源线，并分别连接到三个驱动信号线的栅极， 输出端子，其共同连接到输出晶体管的电流路径的另一端;调节连接到第三电源线的输出晶体管的栅极阻抗的阻抗电路，以及连接在输出端子和 输入电路。

公开(公告)号：US6107886A

公开(公告)日：2000-08-22

申请号：US275258

申请日：1999-03-23

申请人： Hiromi Kusakabe ,  Hiroyuki Tsurumi

发明人： Hiromi Kusakabe ,  Hiroyuki Tsurumi

IPC分类号： H04S3/00 ,  H03F1/02 ,  H03F3/181 ,  H03F3/68 ,  H03F3/04

CPC分类号： H03F3/181 ,  H03F1/0277

摘要： A power amplifier comprises a pair of power-supply rails, a power-supply voltage divider, an intermediate power-supply line, a first and second BTL amplifiers, and a first to fourth switching circuits. The power-supply rails are composed of a first power-supply line to which a power-supply potential is applied and a second power-supply line to which the ground potential is applied. The power-supply divider produces an intermediate potential by dividing the voltage between the power-supply rails in two and supplies it to the intermediate power-supply line. The first BTL amplifier is provided between the second power-supply line and the intermediate power-supply line. The second BTL amplifier is provided between the first power-supply line and the intermediate power-supply line. The first and second BTL amplifiers each include an output bridge circuit. At small signal input, the switching circuit connects not only the output bridge circuit of the first BTL amplifier between the intermediate power-supply line and second power-supply line, but also the output bridge circuit of the second BTL amplifier between the first power-supply line and the intermediate power-supply line. At large signal input, the switching circuit connects each of the output bridge circuits of the first and second BTL amplifiers between the power-supply rails.

摘要翻译： 功率放大器包括一对电源轨，电源分压器，中间电源线，第一和第二BTL放大器以及第一至第四开关电路。 电源轨由施加电源电位的第一电源线和施加地电位的第二电源线构成。 电源分压器通过将电源轨之间的电压分成两部分来产生中间电位，并将其提供给中间电源线。 第一个BTL放大器设置在第二个电源线和中间电源线之间。 第二个BTL放大器设置在第一电源线和中间电源线之间。 第一和第二BTL放大器各自包括输出桥式电路。 在小信号输入时，开关电路不仅连接中间电源线和第二电源线之间的第一BTL放大器的输出桥电路，而且连接第二BTL放大器的输出桥电路， 供电线路和中间供电线路。 在大信号输入端，开关电路将电源轨之间的第一和第二BTL放大器的输出桥接电路连接起来。

公开(公告)号：US08050423B2

公开(公告)日：2011-11-01

申请号：US12165716

申请日：2008-07-01

申请人： Akira Yamauchi ,  Hiroyuki Tsurumi

发明人： Akira Yamauchi ,  Hiroyuki Tsurumi

IPC分类号： H04B15/00

CPC分类号： H03F3/68 ,  H03F2200/03

摘要： An n-channel integrated circuit device (n is an integer of 1 or greater) for muting an audio signal includes a control circuit configured to generate a control signal and a delayed control signal, a charging and discharging circuit configured to charge and discharge a time constant control terminal according to the control signal and the delayed control signal, an N-th voltage-to-current converting circuit (N is an integer from 1 to n) configured to generate a (2N−1)-th current corresponding to a voltage on the time constant control terminal and a (2N)-th current corresponding to an intermediate voltage, a (2N−1)-th mirror circuit configured to copy the (2N−1)-th current to generate (4N−3)-th and (4N−2)-th intermediate currents, a (2N)-th mirror circuit configured to copy the (2N)-th current to generate (4N−1)-th and (4N)-th intermediate currents, a (2N−1)-th selecting and combining circuit configured to combine a (2N−1)-th mute control current using the (4N−3)-th intermediate current and the (4N−1)-th intermediate current, and a (2N)-th selecting and combining circuit configured to combine a (2N)-th mute control current using the (4N−2)-th intermediate current and the (4N)-th intermediate current.

摘要翻译： 用于使音频信号静音的n沟道集成电路器件（n为1或更大的整数）包括被配置为产生控制信号和延迟的控制信号的控制电路，被配置为对时间进行充放电的充电和放电电路 恒定控制端子，根据控制信号和延迟的控制信号，配置为产生与第一电压对应的第（2N-1）电流的第N电压 - 电流转换电路（N为1至n的整数） 时间常数控制端子上的电压和与中间电压对应的第（2N）电流，配置成复制第（2N-1）个电流以产生（4N-3）电流的第（2N-1） 和第（4N-2）中间电流，第（2N）个第二镜电路，被配置为复制第（2N）个电流以产生（4N-1）和（4N）中间电流， （2N-1）个选择和组合电路，被配置为使用第（4N-3）个int（第2N-1）个int （4N-1）中间电流和第（2Nn）中间电流以及第（2N）个选择和组合电路，其被配置为使用（4N-2）中间电流和（4N-2）中间电流组合第（2N）个静音控制电流 （4N）中间电流。

公开(公告)号：US07557660B2

公开(公告)日：2009-07-07

申请号：US11865815

申请日：2007-10-02

申请人： Hiroyuki Tsurumi

发明人： Hiroyuki Tsurumi

IPC分类号： H02H7/20

CPC分类号： H03F1/523 ,  H03F3/2171 ,  H03F3/2173 ,  H03F2200/03 ,  H03F2200/465 ,  H03F2200/471 ,  H03F2200/78

摘要： A power amplification device includes a BTL amplification circuit including a first amplification circuit and a second amplification circuit, the first amplification circuit including a first output transistor, a first power detection circuit, a second output transistor, and a second power detection circuit, the second amplification circuit including a third output transistor, a third power detection circuit, a fourth output transistor, and a fourth power detection circuit, a first comparator which compares output values of the first and fourth power detection circuits, and a second comparator which compares output values of the second and third power detection circuits.

摘要翻译： 功率放大装置包括具有第一放大电路和第二放大电路的BTL放大电路，第一放大电路包括第一输出晶体管，第一功率检测电路，第二输出晶体管和第二功率检测电路，第二放大电路 放大电路，包括第三输出晶体管，第三功率检测电路，第四输出晶体管和第四功率检测电路，比较第一和第四功率检测电路的输出值的第一比较器和比较输出值的第二比较器 的第二和第三功率检测电路。