公开(公告)号：US20130234277A1

公开(公告)日：2013-09-12

申请号：US13793445

申请日：2013-03-11

Applicant: Takaaki Negoro ,  Hirofumi Watanabe ,  Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune

Inventor： Takaaki Negoro ,  Hirofumi Watanabe ,  Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune

IPC: H01L27/146 ,  H01L29/73

CPC classification number: H01L27/14681 ,  H01L27/14683 ,  H01L29/73 ,  H01L29/739 ,  H01L31/1105

Abstract: The invention relates to a semiconductor device having a vertical transistor bipolar structure of emitter, base, and collector formed in this order from a semiconductor substrate surface in a depth direction. The semiconductor device includes an electrode embedded from the semiconductor substrate surface into the inside and insulated by an oxide film. In the surface of the substrate, a first-conductivity-type first semiconductor region, a second-conductivity-type second semiconductor region, and a first-conductivity-type third semiconductor region are arranged, from the surface side, inside a semiconductor device region surrounded by the electrode and along the electrode with the oxide film interposed therebetween, the second semiconductor region located below the first semiconductor region, the third semiconductor region located below the second semiconductor region. The electrode is insulated from the first to third semiconductor regions, and current gain is variable through application of voltage to the electrode.

Abstract translation: 本发明涉及一种半导体器件，其具有从半导体衬底表面沿深度方向依次形成的发射极，基极和集电极的垂直晶体管双极结构。 半导体器件包括从半导体衬底表面嵌入内部并由氧化物膜绝缘的电极。 在基板的表面中，从第一导电型第一半导体区域，第二导电型第二半导体区域和第一导电型第三半导体区域的表面侧配置在半导体器件区域 被电极围绕并且沿着电极，氧化膜插入其间，位于第一半导体区域下方的第二半导体区域，位于第二半导体区域下方的第三半导体区域。 电极与第一至第三半导体区域绝缘​​，电流增益可通过向电极施加电压而变化。

公开(公告)号：US09337234B2

公开(公告)日：2016-05-10

申请号：US14349414

申请日：2012-10-05

Applicant: Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune ,  Hirofumi Watanabe ,  Takaaki Negoro ,  Kazunari Kimino

Inventor： Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune ,  Hirofumi Watanabe ,  Takaaki Negoro ,  Kazunari Kimino

IPC: H01L27/146 ,  H04N5/3745 ,  H04N5/378 ,  H01L27/144

CPC classification number: H01L27/14681 ,  H01L27/1443 ,  H01L27/14609 ,  H01L27/14656 ,  H04N5/3745 ,  H04N5/378

Abstract: A photoelectric converter includes a first pn junction comprised of at least two semiconductor regions of different conductivity types, and a first field-effect transistor including a first source connected with one of the semiconductor regions, a first drain, a first insulated gate and a same conductivity type channel as that of the one of the semiconductor regions. The first drain is supplied with a second potential at which the first pn junction becomes zero-biased or reverse-biased relative to a potential of the other of the semiconductor regions. When the first source turns to a first potential and the one of the semiconductor regions becomes zero-biased or reverse-biased relative to the other semiconductor regions, the first pn junction is controlled not to be biased by a deep forward voltage by supplying a first gate potential to the first insulated gate, even when either of the semiconductor regions is exposed to light.

Abstract translation: 光电转换器包括由至少两个不同导电类型的半导体区组成的第一pn结，以及包括与半导体区之一连接的第一源的第一场效应晶体管，第一漏极，第一绝缘栅极和 导电型沟道，与半导体区域中的一个相同。 第一漏极被提供有第二电位，在该第二电位处，第一pn结相对于另一个半导体区域的电位变为零偏置或反向偏置。 当第一源极变为第一电位并且半导体区域中的一个相对于其它半导体区域变为零偏置或反向偏置时，通过提供第一源极的第一电位，第一pn结被控制为不被深的正向电压偏置， 即使当半导体区域中的任一个暴露于光时，第一绝缘栅极的栅极电位。

公开(公告)号：US09142579B2

公开(公告)日：2015-09-22

申请号：US13811623

申请日：2011-07-22

Applicant: Yutaka Hayashi ,  Yasushi Nagamune ,  Toshitaka Ota

Inventor： Yutaka Hayashi ,  Yasushi Nagamune ,  Toshitaka Ota

IPC: H01J40/14 ,  H01L27/146 ,  H01L27/144 ,  H01L31/103 ,  H04N5/361 ,  H01L31/101

CPC classification number: H01L27/14609 ,  H01L27/1446 ,  H01L31/101 ,  H01L31/103 ,  H04N5/361

Abstract: In order to achieve a photoelectric conversion cell and an array of high sensitivity and high dynamic range, there is a need for a photoelectric conversion cell and an array in which combination of an amplified photoelectric conversion element and a selection element are resistant to external noise, and the combination is resistant to effects from address selection pulse noise at array readout time. In the present invention, in order to solve the problem, a photoelectric conversion cell has been configured with a combination of an amplified photoelectric conversion element (100) and a selection element (10 and the like) which are resistant to external noise, and various means of solution of the combination are provided which are resistant to the effects of address selection pulse noise at array readout time. As a result, a dynamic range of 6 to 7 orders of magnitude for light detection has become possible.

Abstract translation: 为了实现光电转换单元和高灵敏度和高动态范围的阵列，需要一种光电转换单元和阵列，其中放大的光电转换元件和选择元件的组合抵抗外部噪声， 并且该组合抵抗阵列读出时的地址选择脉冲噪声的影响。 在本发明中，为了解决上述问题，光电转换单元已经被配置成具有耐外部噪声的放大光电转换元件（100）和选择元件（10等）的组合，并且各种 提供了组合的解决方案，其抵抗阵列读出时间的地址选择脉冲噪声的影响。 结果，光检测的动态范围为6〜7个数量级成为可能。

公开(公告)号：US09571770B2

公开(公告)日：2017-02-14

申请号：US13745197

申请日：2013-01-18

Applicant: Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune ,  Hirofumi Watanabe ,  Kazuhiro Yoneda ,  Katsuhiko Aisu ,  Takaaki Negoro

Inventor： Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune ,  Hirofumi Watanabe ,  Kazuhiro Yoneda ,  Katsuhiko Aisu ,  Takaaki Negoro

IPC: H04N5/378 ,  H01L27/144

CPC classification number: H04N5/378 ,  H01L27/144

Abstract: A sense circuit includes a differential amplifier circuit including an inverting input section, a non-inverting input section and an output section, an electrical capacitor connected between the inverting input section and the output section, and a field effect transistor including a source, a drain, and a gate. One of the source and the drain is connected to the inverting input section, and the other of the source and the drain is connected to the output section. A reference potential is supplied to the non-inverting input section, and an output section of a photoelectric conversion cell having an added switching function is connected to the inverting input section.

Abstract translation: 感测电路包括差分放大器电路，其包括反相输入部分，非反相输入部分和输出部分，连接在反相输入部分和输出部分之间的电容器，以及场效应晶体管，其包括源极，漏极 ，和一个门。 源极和漏极之一连接到反相输入部分，源极和漏极中的另一个连接到输出部分。 参考电位被提供给非反相输入部分，并且具有增加的开关功能的光电转换单元的输出部分连接到反相输入部分。

公开(公告)号：US09362328B2

公开(公告)日：2016-06-07

申请号：US13793445

申请日：2013-03-11

Applicant: Takaaki Negoro ,  Hirofumi Watanabe ,  Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune

Inventor： Takaaki Negoro ,  Hirofumi Watanabe ,  Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune

IPC: H01L27/146 ,  H01L29/73 ,  H01L31/11 ,  H01L29/739

CPC classification number: H01L27/14681 ,  H01L27/14683 ,  H01L29/73 ,  H01L29/739 ,  H01L31/1105

Abstract: The invention relates to a semiconductor device having a vertical transistor bipolar structure of emitter, base, and collector formed in this order from a semiconductor substrate surface in a depth direction. The semiconductor device includes an electrode embedded from the semiconductor substrate surface into the inside and insulated by an oxide film. In the surface of the substrate, a first-conductivity-type first semiconductor region, a second-conductivity-type second semiconductor region, and a first-conductivity-type third semiconductor region are arranged, from the surface side, inside a semiconductor device region surrounded by the electrode and along the electrode with the oxide film interposed therebetween, the second semiconductor region located below the first semiconductor region, the third semiconductor region located below the second semiconductor region. The electrode is insulated from the first to third semiconductor regions, and current gain is variable through application of voltage to the electrode.

Abstract translation: 本发明涉及一种半导体器件，其具有从半导体衬底表面沿深度方向依次形成的发射极，基极和集电极的垂直晶体管双极结构。 半导体器件包括从半导体衬底表面嵌入内部并由氧化物膜绝缘的电极。 在基板的表面中，从第一导电型第一半导体区域，第二导电型第二半导体区域和第一导电型第三半导体区域的表面侧配置在半导体器件区域 被电极围绕并且沿着电极，氧化膜插入其间，位于第一半导体区域下方的第二半导体区域，位于第二半导体区域下方的第三半导体区域。 电极与第一至第三半导体区域绝缘​​，电流增益可通过向电极施加电压而变化。

公开(公告)号：US20130240716A1

公开(公告)日：2013-09-19

申请号：US13845343

申请日：2013-03-18

Applicant: Yutaka Hayashi ,  Kazuhiro YONEDA ,  Hirofumi WATANABE ,  Katsuhiko AISU ,  Takaaki NEGORO ,  Toshitaka OTA ,  Yasushi NAGAMUNE

Inventor： Yutaka Hayashi ,  Kazuhiro YONEDA ,  Hirofumi WATANABE ,  Katsuhiko AISU ,  Takaaki NEGORO ,  Toshitaka OTA ,  Yasushi NAGAMUNE

IPC: H01L27/146

CPC classification number: H01L27/14681 ,  H04N5/243 ,  H04N5/3745

Abstract: Provided is a method of varying the gain of an amplifying photoelectric conversion device and a variable gain photoelectric conversion device which are capable of achieving both signal processing under low illuminance and high-current processing under high light intensity, and thereby capable of securing a wide dynamic range. An amplifying photoelectric conversion part includes a photoelectric conversion element and amplification transistors forming a Darlington circuit. The sources and the drains of field-effect transistors are connected to the bases and the emitters of the amplification transistors, respectively. The gates of the field-effect transistors each function as a gain control part.

Abstract translation: 提供了一种改变放大光电转换装置和可变增益光电转换装置的增益的方法，其能够在高照度和高电流处理下在高光强度下实现信号处理，从而能够确保宽动态 范围。 放大光电转换部分包括形成达林顿电路的光电转换元件和放大晶体管。 场效应晶体管的源极和漏极分别连接到放大晶体管的基极和发射极。 场效应晶体管的栅极各自用作增益控制部分。

公开(公告)号：US20130187030A1

公开(公告)日：2013-07-25

申请号：US13745197

申请日：2013-01-18

Applicant: Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune ,  Hirofumi Watanabe ,  Kazuhiro Yoneda ,  Katsuhiko Aisu ,  Takaaki Negoro

Inventor： Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune ,  Hirofumi Watanabe ,  Kazuhiro Yoneda ,  Katsuhiko Aisu ,  Takaaki Negoro

IPC: H01L27/144

CPC classification number: H04N5/378 ,  H01L27/144

Abstract: A sense circuit includes a differential amplifier circuit including an inverting input section, a non-inverting input section and an output section, an electrical capacitor connected between the inverting input section and the output section, and a field effect transistor including a source, a drain, and a gate. One of the source and the drain is connected to the inverting input section, and the other of the source and the drain is connected to the output section. A reference potential is supplied to the non-inverting input section, and an output section of a photoelectric conversion cell having an added switching function is connected to the inverting input section.

Abstract translation: 感测电路包括差分放大器电路，其包括反相输入部分，非反相输入部分和输出部分，连接在反相输入部分和输出部分之间的电容器，以及场效应晶体管，其包括源极，漏极 ，和一个门。 源极和漏极之一连接到反相输入部分，源极和漏极中的另一个连接到输出部分。 参考电位被提供给非反相输入部分，并且具有增加的开关功能的光电转换单元的输出部分连接到反相输入部分。

公开(公告)号：US20130119240A1

公开(公告)日：2013-05-16

申请号：US13811623

申请日：2011-07-22

Applicant: Yutaka Hayashi ,  Yasushi Nagamune ,  Toshitaka Ota

Inventor： Yutaka Hayashi ,  Yasushi Nagamune ,  Toshitaka Ota

IPC: H01L27/146 ,  H01L31/101

CPC classification number: H01L27/14609 ,  H01L27/1446 ,  H01L31/101 ,  H01L31/103 ,  H04N5/361

Abstract: In order to achieve a photovoltaic cell and an array of high sensitivity and high dynamic range, there is a need for a photovoltaic cell and an array which are combined so that an amplified photovoltaic element and a selection element are resistant to external noise, and so that the combination is resistant to effects from address selection pulse noise at array readout time. In the present invention, in order to solve the problem, a photovoltaic cell has been configured with a combination of an amplified photovoltaic element (100) and a selection element (10 and the like) which are resistant to external noise, and various means of solution of the combination are provided which are resistant to the effects of address selection pulse noise at array readout time. As a result, a dynamic range of 6 to 7 orders of magnitude for light detection has become possible.

Abstract translation: 为了实现光电池和高灵敏度和高动态范围的阵列，需要组合光伏电池和阵列，使得放大的光电元件和选择元件抵抗外部噪声，因此 该组合在阵列读出时间内抵抗来自地址选择脉冲噪声的影响。 在本发明中，为了解决这个问题，光电池已经被配置为具有抵抗外部噪声的放大光电元件（100）和选择元件（10等）的组合， 提供了组合的解决方案，其在阵列读出时间内抵抗地址选择脉冲噪声的影响。 结果，光检测的动态范围为6〜7个数量级成为可能。

公开(公告)号：US07592576B1

公开(公告)日：2009-09-22

申请号：US11772475

申请日：2007-07-02

Applicant: Yutaka Hayashi ,  Yasushi Nagamune ,  Toshitaka Ohta

Inventor： Yutaka Hayashi ,  Yasushi Nagamune ,  Toshitaka Ohta

IPC: H01L27/00

CPC classification number: H01L27/14681 ,  H01L27/0203

Abstract: The present invention is made to realize a two dimensional optical sensor array having improved performance, for instance, at least one of improved response time, improved intermixing problem, improved dynamic range, improved ability to sense a lower illuminance optical image and improved signal to noise ratio. For these purposes, an optical sensor array with a novel sensing method is proposed. For sensing each of the optical sensor in the array, one of a selected group of plurality of interconnecting means is selected and is driven from a first electrical potential to a second electrical potential while rest of the selected group of plurality of interconnecting means are kept to the first electrical potential, then, photo-electrical current from optical sensors connected to the selected one of the selected group of plurality of interconnecting means is sequentially sensed at around the second electrical potential through the selected one of the selected group of plurality of interconnecting means, by sequentially driving each one of unselected group of plurality of interconnecting means from a third electrical potential to a fourth electrical potential and then from the fourth electrical potential to the third electrical potential.

Abstract translation: 本发明旨在实现具有改进的性能的二维光学传感器阵列，例如改进的响应时间，改进的混合问题，改善的动态范围，改进的感测较低照度光学图像的能力和改善的信噪比中的至少一个 比。 为了这些目的，提出了一种具有新颖感测方法的光学传感器阵列。 为了感测阵列中的每个光学传感器，选择多个互连装置的选定组中的一个被选择并且从第一电位驱动到第二电位，而所选择的多个互连装置的剩余部分被保持为 然后，连接到所选择的多个互连装置组中的选定组的光传感器的光电流通过所选择的一组多个互连装置中的所选择的一个在第二电位周围被依次感测 通过将未选择的多个互连装置中的每一个从第三电位依次驱动到第四电位，然后从第四电位驱动到第三电位。

公开(公告)号：US20130224557A1

公开(公告)日：2013-08-29

申请号：US13881747

申请日：2011-10-13

Applicant: Tomohiro Hayakawa ,  Takayoshi Hosoya ,  Hiroyuki Kawai ,  Hideo Hayashi ,  Yutaka Hayashi ,  Kohsuke Togashi ,  Naotaka Gotoh

Inventor： Tomohiro Hayakawa ,  Takayoshi Hosoya ,  Hiroyuki Kawai ,  Hideo Hayashi ,  Yutaka Hayashi ,  Kohsuke Togashi ,  Naotaka Gotoh

IPC: H01M2/16

CPC classification number: H01M2/1653 ,  C08G18/04 ,  C08G18/4009 ,  H01M2/162 ,  H01M2/1666 ,  H01M2/1686 ,  H01M10/052 ,  Y02E60/122 ,  Y02P70/54

Abstract: Provided is a separator for non-aqueous batteries, capable of being usefully used in non-aqueous batteries, and a non-aqueous battery equipped with this separator. The separator for non-aqueous batteries includes: a base layer comprising a fiber aggregate, and an electrolyte-swellable resin layer formed on at least one surface of the base layer, the resin layer comprising a urethane resin (C) obtained by reacting a polyol (A) including a vinyl polymer (a1) and a polyether polyol (a2) with a polyisocyanate (B). The vinyl polymer (a1) has as a main chain a vinyl polymer (a1′) having two hydroxyl groups at one of the termini of the main chain, and a polyoxyethylene chain having a number average molecular weight of 200 to 800 as a side chain, the percentage of the polyoxyethylene chain based on the vinyl polymer (a1) being within the range of 70 mass % to 98 mass %.

Abstract translation: 本发明提供一种能够用于非水电池的非水电池用隔膜，以及配备有该隔膜的非水电池。 非水电池用隔膜包括：包含纤维聚集体的基层和形成在基层的至少一个表面上的电解质溶胀性树脂层，所述树脂层包含聚氨酯树脂（C），其通过使多元醇 （A）包括乙烯基聚合物（a1）和聚醚多元醇（a2）与多异氰酸酯（B）。 乙烯基聚合物（a1）作为主链具有在主链的一个末端具有两个羟基的乙烯基聚合物（a1'）和作为侧链的数均分子量为200〜800的聚氧乙烯链 基于乙烯基聚合物（a1）的聚氧乙烯链的百分比在70质量％至98质量％的范围内。