公开(公告)号：US20070248745A1

公开(公告)日：2007-10-25

申请号：US11727207

申请日：2007-03-23

申请人： Yutaka Wakai ,  Kaoru Okinaga ,  Yukio Koike ,  Tomofumi Yanagi

发明人： Yutaka Wakai ,  Kaoru Okinaga ,  Yukio Koike ,  Tomofumi Yanagi

IPC分类号： C23C14/54

CPC分类号： B05C11/1005 ,  H01M4/0404 ,  H01M4/0419 ,  H01M4/8825 ,  H01M4/8882

摘要： A system for controlling the coating width of an electrode plate, The system includes; a coating device which ejects a paste at a predetermined width from each of a plurality of slit nozzles toward a fed core substrate to form a coating layer on the surface of the core substrate; a gap controlling device which controls the gap between the slit nozzles of the coating device and the core substrate; a coating width measuring device which measures the width of the coating layer on the surface of the core substrate; and a controlling unit which controls the gap controlling device based on the results obtained by comparing the measured coating width with a predetermined coating width. In this system, the stripe-shaped coating layer is formed without using a masking tape, and the width of the coating layer is controlled with high accuracy.

摘要翻译： 一种用于控制电极板的涂层宽度的系统，该系统包括： 涂布装置，从多个狭缝喷嘴中的每一个向供给的芯基板喷射预定宽度的浆料，以在芯基板的表面上形成涂层; 控制涂布装置的狭缝喷嘴与芯基板之间的间隙的间隙控制装置; 测量芯基板表面上的涂层宽度的涂布宽度测量装置; 以及控制单元，其基于通过将测量的涂布宽度与预定涂布宽度进行比较而获得的结果来控制间隙控制装置。 在该系统中，不使用遮蔽带形成条状涂层，并且以高精度控制涂层的宽度。

公开(公告)号：US07690326B2

公开(公告)日：2010-04-06

申请号：US11727207

申请日：2007-03-23

申请人： Yutaka Wakai ,  Kaoru Okinaga ,  Yukio Koike ,  Tomofumi Yanagi

发明人： Yutaka Wakai ,  Kaoru Okinaga ,  Yukio Koike ,  Tomofumi Yanagi

IPC分类号： B05C11/00

CPC分类号： B05C11/1005 ,  H01M4/0404 ,  H01M4/0419 ,  H01M4/8825 ,  H01M4/8882

摘要： A system for controlling the coating width of an electrode plate, The system includes: a coating device which ejects a paste at a predetermined width from each of a plurality of slit nozzles toward a fed core substrate to form a coating layer on the surface of the core substrate; a gap controlling device which controls the gap between the slit nozzles of the coating device and the core substrate; a coating width measuring device which measures the width of the coating layer on the surface of the core substrate; and a controlling unit which controls the gap controlling device based on the results obtained by comparing the measured coating width with a predetermined coating width. In this system, the stripe-shaped coating layer is formed without using a masking tape, and the width of the coating layer is controlled with high accuracy.

摘要翻译： 一种用于控制电极板的涂布宽度的系统，该系统包括：涂覆装置，其以预定宽度从多个狭缝喷嘴中朝向进给的芯基板喷射预定的宽度，以在该表面上形成涂层 核心基板; 控制涂布装置的狭缝喷嘴与芯基板之间的间隙的间隙控制装置; 测量芯基板表面上的涂层宽度的涂布宽度测量装置; 以及控制单元，其基于通过将测量的涂布宽度与预定涂布宽度进行比较而获得的结果来控制间隙控制装置。 在该系统中，不使用遮蔽带形成条状涂层，并且以高精度控制涂层的宽度。

公开(公告)号：US06387445B1

公开(公告)日：2002-05-14

申请号：US09646038

申请日：2000-09-13

申请人： Yasushi Aiba ,  Yukio Koike

发明人： Yasushi Aiba ,  Yukio Koike

IPC分类号： C23C1608

CPC分类号： C23C16/0281 ,  C23C16/14 ,  H01L21/28556 ,  H01L21/28568

摘要： A tungsten layer is formed on the surface of an object to be treated (e.g., a semiconductor wafer), supplying a process gas which includes a material gas of a tungsten fluoride (e.g., WF6) gas and a reducing gas (e.g., H2 gas) for reducing the material gas. In this case, an intermediate tungsten film forming step is carried out between a nuclear crystalline film forming step of forming a nuclear crystalline film of tungsten on the surface of the object and a main tungsten film forming step of forming a main tungsten film on the nuclear crystalline film. At the intermediate tungsten film forming step, an intermediate tungsten film is formed while the flow ratio of the material gas to the reducing gas is smaller than that at the main tungsten film forming step. Thus, the incubation time T2 after the deposition of the nuclear crystalline film is removed, so that it is possible to enhance the whole mean deposition rate and to improve the uniformity of the thickness between objects to be processed.

摘要翻译： 在待处理物体的表面（例如，半导体晶片）上形成钨层，供给包括氟化钨（例如WF 6）气体和还原气体（例如，H 2气体）的原料气体的处理气体 ）用于减少原料气体。 在这种情况下，中间钨膜形成步骤是在物体表面上形成钨的核晶体膜的核晶形成步骤和在核上形成主钨膜的主钨膜形成步骤之间进行的 结晶膜。 在中间钨膜形成步骤中，形成中间钨膜，同时原料气体与还原气体的流量比主钨膜形成步骤小。 因此，去除沉积核晶体膜后的孵育时间T2，从而可以提高整个平均沉积速率并提高待处理物体之间厚度的均匀性。

公开(公告)号：US5727604A

公开(公告)日：1998-03-17

申请号：US508571

申请日：1995-07-27

申请人： Yukio Koike ,  Chitoshi Hara ,  Masao Nakamura ,  Mitsuyoshi Kio ,  Tetsushiro Torigoe

发明人： Yukio Koike ,  Chitoshi Hara ,  Masao Nakamura ,  Mitsuyoshi Kio ,  Tetsushiro Torigoe

IPC分类号： H01M4/28 ,  B05C11/02 ,  H01M4/04 ,  H01M4/20 ,  H01M4/26 ,  H01M4/64 ,  B65B1/04

CPC分类号： H01M4/0416 ,  B05C11/02 ,  H01M4/04 ,  H01M4/0404 ,  H01M4/20 ,  H01M4/26 ,  Y02P70/54 ,  Y10T29/49115

摘要： Weight of the paste (21) per area is measured continuously without contact by irradiating the belt-shaped paste-coated punched metal electrode (41) with .beta. ray (51), during running of the electrode (41) on a production line, then trapping dosage of the .beta. ray radiation transmitted through the electrode (41) by an ionization chamber (4b, 50), followed by processing the measured value in a micro-processor unit (6) on the basis of comparing with a previously determined reference value. BY means of the output signal from the processor (6), the gap of slit (24) between the blades (23a and 23b) is feedback-controlled, so as to control thickness, hence weight per unit area of the pasty mixture uniform.

摘要翻译： 在生产线上运行电极（41）期间，通过用β射线（51）照射带状膏状涂敷的冲压金属电极（41），连续地测量每个面积的糊料（21）的重量，然后 通过电离室（4b，50）捕获透射通过电极（41）的β射线辐射，随后在微处理器单元（6）中基于与先前确定的参考值进行比较来处理测量值 。 通过来自处理器（6）的输出信号，刀片（23a和23b）之间的狭缝（24）的间隙被反馈控制，以便控制厚度，因此糊状混合物的每单位面积的重量是均匀的。

公开(公告)号：US5148034A

公开(公告)日：1992-09-15

申请号：US511236

申请日：1990-04-19

申请人： Yukio Koike

发明人： Yukio Koike

IPC分类号： H01J37/02 ,  H01J37/317 ,  H01L21/265

CPC分类号： H01J37/026 ,  H01J37/3171 ,  H01J2237/0044

摘要： A method of ion implantation of a semiconductor devices to neutralize electrostatic charge stored on a wafer. Neutralizing electrons are supplied to a passage through which a positive ion beam is passed while forming a barrier of negative electrostatic potential between an area in the passage to which the neutralizing electrons are supplied and the wafer. When the positive ion beam is not present in the passage, the potential of the barrier is set lower than the negative potential corresponding to energy held in the neutralizing electrons. When the beam is not passed through the passage, most of the neutralizing electrons cannot cross over the barrier, but when the beam is passed through the passage, most of the electrons can cross over the barrier, following it, to shower over the wafer.

摘要翻译： 一种用于中和存储在晶片上的静电电荷的半导体器件的离子注入的方法。 将中和电子供给到正离子束通过的通道，同时在供给中和电子的通道中的区域与晶片之间形成负静电电势的屏障。 当通道中不存在正离子束时，势垒的电位被设定为低于对应于保持在中和电子中的能量的负电位。 当光束不通过通道时，大多数中和电子不能越过阻挡层，但是当光束通过通道时，大多数电子可以越过阻挡层，从而在晶片上淋浴。

公开(公告)号：US4794374A

公开(公告)日：1988-12-27

申请号：US45996

申请日：1987-05-04

申请人： Yukio Koike

发明人： Yukio Koike

IPC分类号： H03M1/36 ,  H03M1/00

CPC分类号： H03M1/10 ,  H03M1/361

摘要： An A/D converter comprises a resistor ladder connected between first and second reference potentials so that each connection tap provides a different divided reference potential. A plurality of first switches are each connected at their one end to one connection tap of the resistor ladder and at their other end to a corresponding number of common connection nodes. Also, a plurality of second switches are each connected at their one end commonly to an input for an analog voltage signal and at their other end to the corresponding common connection nodes. Each of the nodes is connected through one coupling capacitor to one amplifier having adapted to generate an output signal representative of whether the voltage of the input signal is higher or lower than a voltage appearing at the above mentioned one connection tap of the resistor ladder. Each of the amplifier has a third switch connected between the input and the output of the amplifier, and an encoder is connected to the output of each amplifier so as to generate an digital signal corresponding to the input analog signal. Each of the common connection nodes are connected through an associated fourth switch to a bias voltage source. In a pre-calibration period proceeding to a calibration period, the third and fourth switches are closed so that the respective common connection nodes are forcedly and rapidly charged or discharged through the bias voltage source.

摘要翻译： A / D转换器包括连接在第一和第二参考电位之间的电阻梯，使得每个连接抽头提供不同的分压参考电位。 多个第一开关各自在其一端连接到电阻梯的一个连接抽头，并且在另一端连接到相应数量的公共连接节点。 此外，多个第二开关各自的一端通常连接到模拟电压信号的输入端，而在另一端连接到相应的公共连接节点。 每个节点通过一个耦合电容器连接到一个放大器，该放大器适于产生表示输入信号的电压是高于还是低于电阻梯的上述一个连接抽头出现的电压的输出信号。 每个放大器具有连接在放大器的输入和输出之间的第三开关，并且编码器连接到每个放大器的输出端，以产生对应于输入的模拟信号的数字信号。 每个公共连接节点通过相关联的第四开关连接到偏置电压源。 在进行到校准周期的预校准周期中，关闭第三和第四开关，使得相应的公共连接节点通过偏置电压源强制并快速充电或放电。