Packaging substrate with embedded semiconductor component and method for fabricating the same
    2.
    发明授权
    Packaging substrate with embedded semiconductor component and method for fabricating the same 有权
    具有嵌入式半导体元件的封装基板及其制造方法

    公开(公告)号:US08242383B2

    公开(公告)日:2012-08-14

    申请号:US12551674

    申请日:2009-09-01

    申请人: Zhao Chong Zeng

    发明人: Zhao Chong Zeng

    IPC分类号: H05K1/11

    摘要: A packaging substrate with an embedded semiconductor component and a method of fabricating the same are provided, including: fixing a semiconductor chip with electrode pads to an assisting layer with apertures through an adhesive member, wherein each of the electrode pads has a bump formed thereon, each of the apertures is filled with a filling material, and the bumps correspond to the apertures, respectively; forming a first dielectric layer on the assisting layer to encapsulate the semiconductor chip; removing the bumps and the filling material to form vias; and forming a first wiring layer on the first dielectric layer and forming first conductive vias in the vias to provide electrical connections between the electrode pads and the first wiring layer, wherein the first wiring layer comprises a plurality of conductive lands formed right on the first conductive vias, respectively.

    摘要翻译: 提供了具有嵌入式半导体部件的封装基板及其制造方法,其特征在于,包括:将具有电极焊盘的半导体芯片固定在具有穿过粘合部件的孔的辅助层上,其中每个所述电极焊盘具有形成在其上的凸块, 每个孔都填充有填充材料,并且凸起分别对应于孔; 在所述辅助层上形成第一介质层以封装所述半导体芯片; 去除凸块和填充材料以形成通孔; 以及在所述第一电介质层上形成第一布线层,并且在所述通孔中形成第一导电通路以提供所述电极焊盘和所述第一布线层之间的电连接,其中所述第一布线层包括形成在所述第一导电层上的多个导电焊盘 通孔。

    PACKAGING SUBSTRATE WITH EMBEDDED SEMICONDUCTOR COMPONENT AND METHOD FOR FABRICATING THE SAME
    3.
    发明申请
    PACKAGING SUBSTRATE WITH EMBEDDED SEMICONDUCTOR COMPONENT AND METHOD FOR FABRICATING THE SAME 有权
    具有嵌入式半导体元件的封装基板及其制造方法

    公开(公告)号:US20100053920A1

    公开(公告)日:2010-03-04

    申请号:US12551674

    申请日:2009-09-01

    申请人: Zhao Chong Zeng

    发明人: Zhao Chong Zeng

    IPC分类号: H05K1/18 H01L21/56

    摘要: A packaging substrate with an embedded semiconductor component and a method of fabricating the same are provided, including: fixing a semiconductor chip with electrode pads to an assisting layer with apertures through an adhesive member, wherein each of the electrode pads has a bump formed thereon, each of the apertures is filled with a filling material, and the bumps correspond to the apertures, respectively; forming a first dielectric layer on the assisting layer to encapsulate the semiconductor chip; removing the bumps and the filling material to form vias; and forming a first wiring layer on the first dielectric layer and forming first conductive vias in the vias to provide electrical connections between the electrode pads and the first wiring layer, wherein the first wiring layer comprises a plurality of conductive lands formed right on the first conductive vias, respectively.

    摘要翻译: 提供了具有嵌入式半导体部件的封装基板及其制造方法,其特征在于,包括:将具有电极焊盘的半导体芯片固定在具有穿过粘合部件的孔的辅助层上,其中每个所述电极焊盘具有形成在其上的凸块, 每个孔都填充有填充材料,并且凸起分别对应于孔; 在所述辅助层上形成第一介质层以封装所述半导体芯片; 去除凸块和填充材料以形成通孔; 以及在所述第一电介质层上形成第一布线层,并且在所述通孔中形成第一导电通路以提供所述电极焊盘和所述第一布线层之间的电连接,其中所述第一布线层包括形成在所述第一导电层上的多个导电焊盘 通孔。

    Carrier Board Structure Embedded with Semiconductor Component and Method for Fabricating the Carrier Board Structure
    4.
    发明申请
    Carrier Board Structure Embedded with Semiconductor Component and Method for Fabricating the Carrier Board Structure 审中-公开
    嵌入半导体元件的载体板结构和制造载体板结构的方法

    公开(公告)号:US20080048310A1

    公开(公告)日:2008-02-28

    申请号:US11467286

    申请日:2006-08-25

    申请人: Zhao Chong Zeng

    发明人: Zhao Chong Zeng

    IPC分类号: H01L23/48 H01L23/12

    摘要: A carrier board structure with a semiconductor component embedded therein and a method for fabricating the same are proposed. The method provides at least one semiconductor component and a carrier having a first surface and a second surface opposed to the first surface and at least one through hole. The semiconductor component has an active surface having a plurality of electrode pads and an inactive surface, opposed to the active surface, having a plurality of recesses. An adhesive layer is formed on the second surface of the carrier for sealing an end of through hole of the carrier. Thus, the semiconductor component can be mounted in the through hole of the carrier, and the inactive surface can be mounted on the adhesive layer, as well as the adhesive layer fills in the recess of semiconductor component and the gap between the through hole of carrier board and semiconductor component. Owing to reduce the possibility of separation between the semiconductor component and the adhesive layer, the integral connection between the semiconductor component and carrier are enhanced.

    摘要翻译: 提出了其中嵌有半导体元件的载体板结构及其制造方法。 该方法提供至少一个半导体部件和载体,其具有与第一表面相对的第一表面和第二表面以及至少一个通孔。 半导体部件具有多个电极焊盘的活性表面和与活性表面相对的具有多个凹部的非活性表面。 在载体的第二表面上形成粘合剂层,以密封载体的通孔的端部。 因此,半导体部件可以安装在载体的通孔中,并且非活性表面可以安装在粘合剂层上,并且粘合剂层填充在半导体部件的凹部中,并且载体的通孔之间的间隙 板和半导体组件。 由于减少了半导体部件和粘合剂层之间的分离的可能性,因此增强了半导体部件和载体之间的整体连接。

    METHOD FOR FABRICATING PACKAGING SUBSTRATE WITH EMBEDDED SEMICONDUCTOR COMPONENT
    6.
    发明申请
    METHOD FOR FABRICATING PACKAGING SUBSTRATE WITH EMBEDDED SEMICONDUCTOR COMPONENT 有权
    用嵌入式半导体元件制作包装衬底的方法

    公开(公告)号:US20120302012A1

    公开(公告)日:2012-11-29

    申请号:US13571663

    申请日:2012-08-10

    申请人: Zhao Chong Zeng

    发明人: Zhao Chong Zeng

    IPC分类号: H01L21/768 H01L21/56

    摘要: A packaging substrate with an embedded semiconductor component and a method of fabricating the same are provided, including: fixing a semiconductor chip with electrode pads to an assisting layer with apertures through an adhesive member, wherein each of the electrode pads has a bump formed thereon, each of the apertures is filled with a filling material, and the bumps correspond to the apertures, respectively; forming a first dielectric layer on the assisting layer to encapsulate the semiconductor chip; removing the bumps and the filling material to form vias; and forming a first wiring layer on the first dielectric layer and forming first conductive vias in the vias to provide electrical connections between the electrode pads and the first wiring layer, wherein the first wiring layer comprises a plurality of conductive lands formed right on the first conductive vias, respectively.

    摘要翻译: 提供了具有嵌入式半导体部件的封装基板及其制造方法,其特征在于,包括:将具有电极焊盘的半导体芯片固定在具有穿过粘合部件的孔的辅助层上,其中每个所述电极焊盘具有形成在其上的凸块, 每个孔都填充有填充材料,并且凸起分别对应于孔; 在所述辅助层上形成第一介质层以封装所述半导体芯片; 去除凸块和填充材料以形成通孔; 以及在所述第一电介质层上形成第一布线层,并且在所述通孔中形成第一导电通路以提供所述电极焊盘和所述第一布线层之间的电连接,其中所述第一布线层包括形成在所述第一导电层上的多个导电焊盘 通孔。

    CARRIER BOARD STRUCTURE WITH CHIP EMBEDDED THEREIN AND METHOD FOR FABRICATING THE SAME
    7.
    发明申请
    CARRIER BOARD STRUCTURE WITH CHIP EMBEDDED THEREIN AND METHOD FOR FABRICATING THE SAME 审中-公开
    具有嵌入式芯片的载体板结构及其制造方法

    公开(公告)号:US20070241444A1

    公开(公告)日:2007-10-18

    申请号:US11734768

    申请日:2007-04-12

    IPC分类号: H01L23/52

    摘要: A carrier board structure with a semiconductor chip embedded therein and a method for fabricating the same are proposed. A rectangular cavity is formed at a predetermined position of the carrier board, and at least a breach is formed at a corner of the rectangular cavity, wherein the breach is composed of a plurality of drilling holes. Thus, the breach is capable of providing the rectangular cavity with a larger space for receiving a semiconductor chip in the rectangular cavity, when in the process of disposing the semiconductor chip into the rectangular cavity.

    摘要翻译: 提出了其中嵌有半导体芯片的载体板结构及其制造方法。 在承载板的预定位置处形成矩形空腔,并且在矩形空腔的角部至少形成有破裂,其中,所述突破由多个钻孔构成。 因此,当在将半导体芯片设置到矩形空腔中的过程中,该突破能够为矩形空腔提供更大的空间,用于接收矩形空腔中的半导体芯片。