公开(公告)号：US20070241444A1

公开(公告)日：2007-10-18

申请号：US11734768

申请日：2007-04-12

申请人： Shih-Ping HSU ,  Chung Cheng Lien ,  Zhao Chong Zeng ,  Shang Wei Chen

发明人： Shih-Ping HSU ,  Chung Cheng Lien ,  Zhao Chong Zeng ,  Shang Wei Chen

IPC分类号： H01L23/52

CPC分类号： H01L23/13 ,  H01L2924/0002 ,  H01L2924/15157 ,  H01L2924/00

摘要： A carrier board structure with a semiconductor chip embedded therein and a method for fabricating the same are proposed. A rectangular cavity is formed at a predetermined position of the carrier board, and at least a breach is formed at a corner of the rectangular cavity, wherein the breach is composed of a plurality of drilling holes. Thus, the breach is capable of providing the rectangular cavity with a larger space for receiving a semiconductor chip in the rectangular cavity, when in the process of disposing the semiconductor chip into the rectangular cavity.

摘要翻译： 提出了其中嵌有半导体芯片的载体板结构及其制造方法。 在承载板的预定位置处形成矩形空腔，并且在矩形空腔的角部至少形成有破裂，其中，所述突破由多个钻孔构成。 因此，当在将半导体芯片设置到矩形空腔中的过程中，该突破能够为矩形空腔提供更大的空间，用于接收矩形空腔中的半导体芯片。

公开(公告)号：US20080251915A1

公开(公告)日：2008-10-16

申请号：US12081319

申请日：2008-04-15

申请人： Shih-Ping HSU ,  Shang-Wei Chen ,  Kan-Jung Chia

发明人： Shih-Ping HSU ,  Shang-Wei Chen ,  Kan-Jung Chia

IPC分类号： H01L23/498

CPC分类号： H01L23/5389 ,  H01L23/3171 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/18162

摘要： A semiconductor chip is disclosed, which comprises a chip having an active surface; plural electrode pads disposed on the active surface of the chip; a first passivation layer disposed on the chip, which has openings corresponding to the electrode pads to expose the electrode pads, wherein the first passivation layer is made of a material having high alkali resistance and low coefficient of elasticity; and plural metal bumps disposed in the openings of the first passivation layer. Therefore, as forming the metal bumps by a chemical deposition technique, the damage to the passivation layer can be prevented. Besides, as the semiconductor chip is embedded in a package structure, the problem of delamination occurred due to the mismatch in the coefficients of thermal expansion of the semiconductor chip and the dielectric layers can be avoided. Accordingly, the yield of the package structure having the semiconductor chip embedded therein can be improved.

摘要翻译： 公开了一种半导体芯片，其包括具有活性表面的芯片; 布置在芯片的有源表面上的多个电极焊盘; 设置在芯片上的第一钝化层，其具有对应于电极焊盘的开口以暴露电极焊盘，其中第一钝化层由具有高耐碱性和低弹性系数的材料制成; 以及设置在第一钝化层的开口中的多个金属凸块。 因此，通过化学沉积技术形成金属凸块时，可以防止钝化层的损伤。 此外，由于半导体芯片嵌入封装结构中，可以避免由于半导体芯片和电介质层的热膨胀系数不匹配而发生的分层问题。 因此，可以提高嵌入其中的半导体芯片的封装结构的产量。

公开(公告)号：US20080116565A1

公开(公告)日：2008-05-22

申请号：US11868010

申请日：2007-10-05

申请人： Shih-Ping HSU ,  Shang-Wei Chen

发明人： Shih-Ping HSU ,  Shang-Wei Chen

IPC分类号： H01L23/04 ,  H01L21/02

CPC分类号： H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/18162 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00

摘要： The present invention provides a circuit board structure with an embedded semiconductor chip and a method for fabricating the same. The circuit board structure includes a carrier board having a first surface, a second surface, and a through hole penetrating the carrier board from the first surface to the second surface; a semiconductor chip having an active surface whereon a plurality of electrode pads are formed and a non-active surface, embedded in the through hole; a photosensitive first dielectric layer formed on the first surface of the carrier board and an opening formed thereon to expose the non-active surface of the semiconductor chip; a photosensitive second dielectric layer formed on the second surface of the carrier board and the active surface of the semiconductor chip.

摘要翻译： 本发明提供一种具有嵌入式半导体芯片的电路板结构及其制造方法。 电路板结构包括具有第一表面，第二表面和从第一表面穿过载体板到第二表面的通孔的载体板; 具有形成有多个电极焊盘的活性表面的半导体芯片和埋入通孔中的非活性表面; 形成在所述载体板的第一表面上的光敏第一介电层和形成在其上的开口，以露出所述半导体芯片的非活性表面; 形成在所述载体板的第二表面上的感光性第二介电层和所述半导体芯片的有源表面。

公开(公告)号：US20090071699A1

公开(公告)日：2009-03-19

申请号：US11874667

申请日：2007-10-18

申请人： Shih-Ping HSU

发明人： Shih-Ping HSU

IPC分类号： H05K1/09 ,  H05K3/10

CPC分类号： H01L24/81 ,  H01L23/498 ,  H01L23/49822 ,  H01L24/14 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/11902 ,  H01L2224/1403 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H05K3/062 ,  H05K3/108 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/10674 ,  H05K2203/0361 ,  H05K2203/0369 ,  H05K2203/0574 ,  Y10T29/49165

摘要： The present invention relates to a packaging substrate and a method for manufacturing the same. The packaging substrate comprises: a substrate body, wherein a surface thereof has a circuit layer comprising a plurality of circuits and a plurality of conductive pads, and the conductive pads are higher than the circuits; and an insulating protection layer disposed on the surface of the substrate body, wherein the insulating protection layer has a plurality of openings exposing the conductive pads, and the size of the openings is larger than or equal to that of the conductive pads. Accordingly, the packaging substrate structure of the present invention can be employed in a flip-chip packaging structure of fine-pitch.

摘要翻译： 本发明涉及一种包装基板及其制造方法。 封装基板包括：基板主体，其表面具有包括多个电路和多个导电焊盘的电路层，并且导电焊盘高于电路; 以及设置在所述基板主体的表面上的绝缘保护层，其中所述绝缘保护层具有暴露所述导电焊盘的多个开口，并且所述开口的尺寸大于或等于所述导电焊盘的尺寸。 因此，本发明的封装基板结构体可以用于微细间距的倒装芯片封装结构。

公开(公告)号：US20080092379A1

公开(公告)日：2008-04-24

申请号：US11867660

申请日：2007-10-04

申请人： Shih-Ping HSU

发明人： Shih-Ping HSU

IPC分类号： H05K3/42

CPC分类号： H05K3/427 ,  H05K1/116 ,  H05K3/108 ,  H05K3/426 ,  H05K2201/09545 ,  H05K2201/09563 ,  H05K2203/0353 ,  Y10T29/49123 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49163 ,  Y10T29/49165

摘要： The present invention provides a circuit board structure and a method of fabricating circuit board structure the same, the circuit board structure consisting of a carrier board having a first surface and an opposed second surface, the carrier board being formed with at least one through hole penetrating the first and second surfaces; a conductive pillar formed in the through hole by electroplating; and a first circuit layer and a second circuit layer respectively formed on the first and second surfaces of the carrier board, the first and second circuit layers being electrically connected to the two end portions of the conductive pillar, thereby reducing spacing between adjacent conductive pillars of the carrier board and achieving high density circuit layout.

摘要翻译： 本发明提供一种电路板结构及其制造方法，所述电路板结构由具有第一表面和相对的第二表面的载体板组成，所述载体板形成有至少一个穿透孔 第一和第二表面; 通过电镀形成在通孔中的导电柱; 以及分别形成在所述载板的所述第一和第二表面上的第一电路层和第二电路层，所述第一和第二电路层电连接到所述导电柱的两个端部，由此减小相邻导电柱之间的间隔 承载板实现高密度电路布局。

公开(公告)号：US20080041621A1

公开(公告)日：2008-02-21

申请号：US11673543

申请日：2007-02-09

申请人： Shih-Ping HSU ,  Ya-Lun YEN

发明人： Shih-Ping HSU ,  Ya-Lun YEN

IPC分类号： H05K1/11 ,  H01R12/04

CPC分类号： H05K3/465 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0041 ,  H05K3/045 ,  H05K3/107 ,  H05K3/4602 ,  H05K3/4661 ,  H05K2201/0166

摘要： A circuit board structure and a method for fabricating the same are proposed. A substrate with a first circuit layer formed on at least one surface thereof is provided. A dielectric layer is formed on the surface of the substrate, and a plurality of first and second openings are formed in the dielectric layer, wherein the second openings expose electrical connection pads of the first circuit layer. A metal layer is formed on the surface of the dielectric layer and in the first and second openings. By removing the metal layer on the surface of the dielectric layer, a second circuit layer is formed in the second openings, and a conductive structure is formed in the second openings for electrical connection with the first circuit layer. The present invention improves the bonding strength between the circuit layer and the dielectric layer, and the ability of fabricating fine circuits.

摘要翻译： 提出了一种电路板结构及其制造方法。 提供了在其至少一个表面上形成有第一电路层的基板。 介电层形成在基板的表面上，多个第一和第二开口形成在电介质层中，其中第二开口露出第一电路层的电连接焊盘。 在电介质层的表面和第一和第二开口中形成金属层。 通过去除电介质层表面上的金属层，在第二开口中形成第二电路层，并且在第二开口中形成导电结构以与第一电路层电连接。 本发明提高了电路层和电介质层之间的接合强度，以及制造精细电路的能力。

公开(公告)号：US20080153324A1

公开(公告)日：2008-06-26

申请号：US11867986

申请日：2007-10-05

申请人： Shih-Ping HSU

发明人： Shih-Ping HSU

IPC分类号： H01R12/00

CPC分类号： H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/16227 ,  H01L2224/24227 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K1/185 ,  H05K3/4602 ,  H01L2924/00

摘要： A circuit board structure with an embedded semiconductor element and a fabrication method thereof are disclosed according to the present invention. The circuit board structure comprises: a carrier board having a first surface, a second surface, and at least one through hole penetrating the carrier board from the first surface to the second surface; a first semiconductor element received in the through hole and having an active surface and an inactive surface, the active surface having a plurality of electrode pads; at least one second semiconductor element mounted on the carrier board; a first encapsulation layer formed on the first surface of the carrier board to block one end of the through hole; and a second encapsulation layer formed on the second surface of the carrier board.

摘要翻译： 根据本发明公开了具有嵌入式半导体元件的电路板结构及其制造方法。 所述电路板结构包括：承载板，具有第一表面，第二表面和至少一个贯穿所述承载板的第一表面至所述第二表面的通孔; 所述第一半导体元件被接收在所述通孔中并且具有活性表面和非活性表面，所述活性表面具有多个电极焊盘; 安装在所述载板上的至少一个第二半导体元件; 形成在所述承载板的所述第一表面上以阻挡所述通孔的一端的第一封装层; 以及形成在所述载板的第二表面上的第二封装层。

公开(公告)号：US20090096099A1

公开(公告)日：2009-04-16

申请号：US11874112

申请日：2007-10-17

申请人： Shih-Ping HSU

发明人： Shih-Ping HSU

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L23/49811 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/243 ,  H05K3/244 ,  H05K3/3457 ,  H05K2201/0391 ,  H05K2203/0361 ,  H05K2203/049 ,  H05K2203/054 ,  H05K2203/0574 ,  H01L2924/00

摘要： A package substrate and a method for fabricating the same are provided according to the present invention. The package substrate includes: a substrate body with a die attaching side and a ball implanting side lying opposite each other, having a plurality of wire bonding pads and a plurality of solder ball pads respectively, and having a first insulating passivation layer and a second insulating passivation layer respectively, wherein a plurality of first apertures and a plurality of second apertures are formed in the first insulating passivation layer and the second insulation passivation layer respectively to corresponding expose the wire bonding pads and the solder ball pads; a chemical plating metal layer formed on the wire bonding pads and solder ball pads respectively; and a wire bonding metal layer formed on a surface of the chemical plating metal layer of the wire bonding metal layer.

摘要翻译： 根据本发明提供封装基板及其制造方法。 封装基板包括：分别具有多个引线接合焊盘和多个焊球焊盘的具有管芯附接侧和球注入侧的基板主体，并且具有第一绝缘钝化层和第二绝缘层 钝化层，其中在所述第一绝缘钝化层和所述第二绝缘钝化层中分别形成多个第一孔和多个第二孔，以对应地暴露所述引线接合焊盘和所述焊球垫; 分别形成在引线接合焊盘和焊球垫上的化学镀金属层; 以及形成在引线接合金属层的化学镀金属层的表面上的引线键合金属层。

公开(公告)号：US20080151518A1

公开(公告)日：2008-06-26

申请号：US11925590

申请日：2007-10-26

申请人： Shih-Ping HSU ,  Kan-Jung Chia

发明人： Shih-Ping HSU ,  Kan-Jung Chia

IPC分类号： H05K1/18

CPC分类号： H05K1/185 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24227 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K1/162 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4641 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/10674 ,  H05K2203/0315 ,  H01L2924/00

摘要： A circuit board structure with embedded electronic components includes: a carrier board having an adhesive layer with two surfaces formed with first and second metal oxide layers covered by first and second metal layers and having at least one through hole; at least one semiconductor chip received in the through hole of the carrier board; an adhesive material filling a gap between the through hole and the semiconductor chip so as to secure the semiconductor chip in position to the through hole; a high dielectric material layer formed outwardly on the second metal layer; and at least one electrode board formed outwardly on the high dielectric material layer such that a capacitance component is formed with the second metal layer, high dielectric material layer, and electrode board. Accordingly, the capacitance component is integrated into the circuit board structure.

摘要翻译： 具有嵌入式电子元件的电路板结构包括：具有粘合剂层的载体板，其具有形成有由第一和第二金属层覆盖并且具有至少一个通孔的第一和第二金属氧化物层的两个表面; 至少一个半导体芯片容纳在载板的通孔中; 填充通孔和半导体芯片之间的间隙的粘合材料，以将半导体芯片固定在通孔的适当位置; 在第二金属层上向外形成的高介电材料层; 以及至少一个在高电介质材料层上向外形成的电极板，使得电容元件形成有第二金属层，高介电材料层和电极板。 因此，电容分量被集成到电路板结构中。

公开(公告)号：US20080067666A1

公开(公告)日：2008-03-20

申请号：US11771345

申请日：2007-06-29

申请人： Shih-Ping HSU

发明人： Shih-Ping HSU

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L23/5389 ,  H01L21/6835 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/92144 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/18162 ,  H01L2924/3511 ,  H05K1/185 ,  H05K1/188 ,  H05K3/108 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09563 ,  H05K2201/10674 ,  H05K2203/0353

摘要： A circuit board structure having an embedded semiconductor chip and a method for fabricating the same are disclosed. The circuit board structure includes: a carrier board formed with at least one through hole; a semiconductor chip received in the through hole of the carrier board, the semiconductor chip having an active surface and a non-active surface, wherein the active surface is provided with a plurality of electrode pads; a dielectric layer formed on surfaces of the carrier board and the semiconductor chip and formed with a plurality of openings for exposing the electrode pads of the semiconductor chip; and a composite circuit layer formed on the dielectric layer, including a thinned metal layer, conductive layer, and electroplated metal layer, and electrically connected to the electrode pads by conductive structures formed in the openings of the dielectric layer. Strong bonding provided by the composite circuit layer formed on the dielectric layer thus desirably reduces the warpage problem resulted from thermal effect.

摘要翻译： 公开了一种具有嵌入式半导体芯片的电路板结构及其制造方法。 电路板结构包括：形成有至少一个通孔的承载板; 所述半导体芯片容纳在所述载板的所述通孔中，所述半导体芯片具有活性表面和非活性表面，其中所述活性表面设置有多个电极焊盘; 形成在所述载体板和所述半导体芯片的表面上的电介质层，并形成有用于使所述半导体芯片的电极焊盘露出的多个开口; 以及形成在电介质层上的复合电路层，包括变薄的金属层，导电层和电镀金属层，并且通过形成在电介质层的开口中的导电结构与电极焊盘电连接。 因此，形成在电介质层上的复合电路层提供的强结合能够有效地减少热效应引起的翘曲问题。