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公开(公告)号:US20130148388A1
公开(公告)日:2013-06-13
申请号:US13525288
申请日:2012-06-16
申请人: Zhe YANG , Xianhui DONG , Zhao WANG
发明人: Zhe YANG , Xianhui DONG , Zhao WANG
IPC分类号: H02M3/335
CPC分类号: H02M3/33507
摘要: The prevent invention provides an AC-DC flyback converter and a loop compensation method thereof. The AD-DC flyback converter comprises an isolating transformer, a power switch, and a feed control module. The feed control module includes a compensating circuit, a voltage buffer, and an error amplifier having a first resistor and a second resistor, and a pulse width modulation controller. With the AC-DC flyback converter and the loop compensating method, the system stability can be improved and the loop bandwidth can be reduced.
摘要翻译: 本发明提供一种AC-DC反激式转换器及其环路补偿方法。 AD-DC反激式转换器包括隔离变压器,电源开关和馈电控制模块。 馈送控制模块包括补偿电路,电压缓冲器和具有第一电阻器和第二电阻器的误差放大器以及脉宽调制控制器。 利用AC-DC反激转换器和环路补偿方法,可以提高系统的稳定性,并可以减小环路带宽。
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公开(公告)号:US20100302822A1
公开(公告)日:2010-12-02
申请号:US12788959
申请日:2010-05-27
申请人: Zhao WANG , Xianhui Dong , Zhe Yang , Xiaodong Yang
发明人: Zhao WANG , Xianhui Dong , Zhe Yang , Xiaodong Yang
IPC分类号: H02M7/06
CPC分类号: H02M3/33523
摘要: Designs of flyback power converters are described. According to one aspect of the designs, a power converter includes a primary side including a primary winding of a transformer coupled to an input voltage and a primary switch for switching on or off the primary winding, a secondary side including a secondary winding of the transformer for generating an output voltage, and a loop controller configured to sample a feedback voltage representative of the output voltage, generate a gate signal with a fixed falling edge and an adjustable rising edge to drive the primary switch, and adjust a duty cycle of the gate signal by adjusting the rising edge of the gate signal until the feedback voltage converges to a reference voltage.
摘要翻译: 描述反激式功率转换器的设计。 根据设计的一个方面,功率转换器包括初级侧,其包括耦合到输入电压的变压器的初级绕组和用于接通或断开初级绕组的初级绕组,次级侧包括变压器的次级绕组 用于产生输出电压,以及环路控制器,被配置为对表示输出电压的反馈电压进行采样,产生具有固定下降沿和可调上升沿的栅极信号以驱动初级开关,并调节栅极的占空比 通过调整栅极信号的上升沿直到反馈电压收敛到参考电压为止。
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公开(公告)号:US20110316507A1
公开(公告)日:2011-12-29
申请号:US12825084
申请日:2010-06-28
申请人: Zhao WANG , Xianhui Dong , Dave Xiaodong Yang
发明人: Zhao WANG , Xianhui Dong , Dave Xiaodong Yang
CPC分类号: H03K5/2481 , H03F2200/351 , H03F2200/78 , H03F2203/45374 , H03F2203/45392
摘要: Techniques pertaining to multiple-input comparator and power converter designs are disclosed. According to one aspect, the present invention discloses a multiple-input comparator comprising a pair of differential transistors connected by a resister. The gate terminals of the transistor pair serve as the input terminals of the comparator for receiving external voltage for comparison. The terminal of the resistor serves as the current input terminal and is either connected to a current source or a current sink. A power inverter utilizing the multiple-input comparator is also disclosed. The power inverter comprises a power switch driven by a PMW signal, a voltage sampling circuit, an error amplifier and a multiple-input PWM comparator.
摘要翻译: 公开了涉及多输入比较器和功率转换器设计的技术。 根据一个方面,本发明公开了一种多输入比较器,包括由电阻器连接的一对差分晶体管。 晶体管对的栅极端子用作比较器的输入端子,用于接收外部电压进行比较。 电阻器的端子用作电流输入端子,或者连接到电流源或电流吸收器。 还公开了一种利用多输入比较器的电力逆变器。 电力逆变器包括由PMW信号驱动的电源开关,电压采样电路,误差放大器和多输入PWM比较器。
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公开(公告)号:US20090128107A1
公开(公告)日:2009-05-21
申请号:US12122721
申请日:2008-05-19
申请人: Zhao WANG , Hang YIN , Wenbo TIAN
发明人: Zhao WANG , Hang YIN , Wenbo TIAN
IPC分类号: G05F1/00
CPC分类号: G05F1/575
摘要: Improved designs of an LDO voltage regulator with ultra low quiescent current are disclosed. According to one embodiment, an LDO voltage regulator is designed to completely cancel an intermediate gain stage while decreasing a quiescent current and to stabilize a loop circuit by means of two zeros introduced in a frequency transfer function thereof. Such a LDO voltage regulator does not increase the power consumption and applicable in many circuits used in electronic devices.
摘要翻译: 公开了具有超低静态电流的LDO稳压器的改进设计。 根据一个实施例,LDO电压调节器被设计成在降低静态电流的同时完全消除中间增益级,并且通过在其频率传递函数中引入的两个零点来稳定环路电路。 这样的LDO电压调节器不增加功耗并且适用于电子设备中使用的许多电路。
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公开(公告)号:US20090167197A1
公开(公告)日:2009-07-02
申请号:US12122750
申请日:2008-05-19
申请人: Zhao WANG , Hang Yin , Wenbo Tian
发明人: Zhao WANG , Hang Yin , Wenbo Tian
IPC分类号: H05B37/02
CPC分类号: H05B33/0827 , H05B33/0815 , H05B33/0851 , Y02B20/346
摘要: Techniques pertaining to driving LEDs on multiple branches of a circuit are disclosed. According to one aspect of the present invention, an LED drive circuit includes a boost circuit configured for receiving an input voltage and providing an output voltage according to a control signal, a selector configured for alternatively selecting one of the feedback signals as an output feedback signal and switching on a corresponding branch circuit, and a pulse-width modulation (PWM) controller configured for generating a pulse-width modulation signal as the control signal for the boost circuit according to the output feedback signal of the selector, essentially to match respective currents in the multiple branches.
摘要翻译: 公开了在电路的多个分支上驱动LED的技术。 根据本发明的一个方面,一种LED驱动电路包括:升压电路,被配置为接收输入电压并根据控制信号提供输出电压;选择器,被配置为选择反馈信号之一作为输出反馈信号 并且接通相应的分支电路;以及脉冲宽度调制(PWM)控制器,被配置为根据选择器的输出反馈信号产生脉冲宽度调制信号作为升压电路的控制信号, 在多个分支。
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公开(公告)号:US20080284395A1
公开(公告)日:2008-11-20
申请号:US12043990
申请日:2008-03-07
申请人: Zhao WANG , Hang YIN , WenBo TIAN
发明人: Zhao WANG , Hang YIN , WenBo TIAN
IPC分类号: G05F1/08
CPC分类号: G05F1/56
摘要: Techniques pertaining designs of LDO voltage regulators are described. According to one design, the LDO voltage regulator comprises: a differential amplifier circuit having a pair of input terminals and an output terminal, one of the input terminals coupled to a predetermined reference voltage; an intermediate amplifier circuit having an output terminal and an input terminal coupled to the output terminal of the differential amplifier circuit; and an output pass circuit comprising a pass transistor, an output resistor and an output capacitor, the pass transistor having a control terminal coupled to the output terminal of the intermediate amplifier circuit, an input terminal coupled to a power supply and an output terminal coupled to one terminal of the output resistor, the other terminal of the output resistor taken as a voltage output node, the output capacitor coupled between the voltage output node and a ground reference; a feedback circuit including a pair of ladder resistors coupled in series between the voltage output node and the ground reference, a node between the ladder resistors coupled to the other one of the input terminals of the differential amplifier circuit; and a voltage controlled current source circuit having an input terminal coupled to a node between the pass transistor and the output resistor of the output pass circuit and an output terminal coupled to the node between the ladder resistors.
摘要翻译: 描述了关于LDO稳压器设计的技术。 根据一种设计,LDO电压调节器包括:差分放大器电路,具有一对输入端子和输出端子,其中一个输入端子耦合到预定参考电压; 中间放大器电路,其具有耦合到差分放大器电路的输出端的输出端和输入端; 以及包括传输晶体管,输出电阻器和输出电容器的输出通过电路,所述通过晶体管具有耦合到所述中间放大器电路的输出端子的控制端子,耦合到电源的输入端子和耦合到 输出电阻的一个端子,输出电阻的另一个端子作为电压输出节点,输出电容耦合在电压输出节点和接地参考之间; 反馈电路,包括串联耦合在电压输出节点和接地基准之间的一对梯形电阻器,梯形电阻器之间的节点耦合到差分放大器电路的另一个输入端子; 以及电压控制电流源电路,其具有耦合到所述输出通过电路的所述通过晶体管和所述输出电阻器之间的节点的输入端子以及耦合到所述梯形电阻器之间的所述节点的输出端子。
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公开(公告)号:US20140049535A1
公开(公告)日:2014-02-20
申请号:US13585807
申请日:2012-08-14
CPC分类号: G01B11/2509
摘要: The present invention discloses a non-contact measurement system for measuring the three-dimensional (3D) shape of an object rapidly by using a unique light pattern and the implementation method thereof. The system comprises a pattern generation unit, a projection unit, a sensing unit and a processing unit. The pattern generation unit generates an enhanced color sequence according to predetermined rules. The sensing unit of the system comprises a hybrid sensor which can be operated in fast mode or precise mode. A dedicated decoding method for the present invention is also disclosed.
摘要翻译: 本发明公开了一种通过使用独特的光图案快速测量物体的三维(3D)形状的非接触测量系统及其实现方法。 该系统包括图案生成单元,投影单元,感测单元和处理单元。 图案生成单元根据预定的规则生成增强的颜色序列。 该系统的感测单元包括可以在快速模式或精确模式下操作的混合传感器。 还公开了本发明的专用解码方法。
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公开(公告)号:US20120089262A1
公开(公告)日:2012-04-12
申请号:US13272902
申请日:2011-10-13
申请人: Zhao WANG , Bernhard Deck , Jianping Wang
发明人: Zhao WANG , Bernhard Deck , Jianping Wang
IPC分类号: G06F1/26
CPC分类号: H02J13/0062 , H02H7/261 , Y02E60/723 , Y02E60/724 , Y02E60/725 , Y02E60/74 , Y02E60/7838 , Y04S10/16 , Y04S10/18 , Y04S10/20 , Y04S10/30 , Y04S40/124
摘要: This specification discloses an intelligent and digitalized process level interface which is referred to herein as an Intelligent Process Interface (IPI). The input of the IPI includes both analog and digital channels and therefore the IPI can be used for substations in transition or retrofit stages with both conventional and non-conventional primary devices. The IPI acts not only as a digitalized interface, but also as an intelligent supervisory and control unit for switching functions. The architecture of the IPI is flexible and allows for the functionality to be distributed to several devices.
摘要翻译: 本说明书公开了一种智能和数字化的处理级接口,在这里被称为智能过程接口(IPI)。 IPI的输入包括模拟和数字通道,因此IPI可以用于传统和非常规主设备的转换或改造阶段的变电站。 IPI不仅作为数字化接口,而且还作为用于切换功能的智能监控单元。 IPI的架构是灵活的,并且允许将功能分发到多个设备。
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