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公开(公告)号：US20190341846A1
公开(公告)日：2019-11-07
申请号：US16478758
申请日：2018-01-26
Applicant: ams AG
Inventor： Herbert Lenhard , Manfred Lueger
IPC: H02M3/07
Abstract: A voltage converter comprises a first to a third capacitor (11-13), a supply terminal (16), a first and a second clock terminal (21, 22) and a transfer arrangement (15). A first electrode of the first capacitor (11) is connected to the first clock terminal (21) and a second electrode of the first capacitor (11) is connected to a first node (23) of the transfer arrangement (15). A first electrode of the second capacitor (12) is connected to the second clock terminal (22) and a second electrode of the second capacitor (12) is connected to a second node (24) of the transfer arrangement (15). A first electrode of the third capacitor (13) is permanently and directly connected to the second electrode of the first capacitor (11) and a second electrode of the third capacitor (13) is connected to a third node (25) of the transfer arrangement (15).
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公开(公告)号：US09608132B2
公开(公告)日：2017-03-28
申请号：US14850908
申请日：2015-09-10
Applicant: ams AG
Inventor： Josef Kriebernegg , Christian Mautner , Herbert Lenhard , Manfred Lueger
CPC classification number: H01L31/02016 , G01S7/487 , G01S17/026 , G01S17/10 , G01V8/10 , H01L31/02002 , H03M1/129
Abstract: An optical sensor arrangement (10) comprises a light sensor (11) that is connected to a summation node (13) and is designed for generating a sensor current (S2), a current source (S2) connected to the summation node (13) and designed to provide a source current (S3), and an integrator (21) that is coupled to the summation node (13) and is designed for generating a first value (VP1) of an integrator signal (S6) by integrating during a first phase (P1) and for generating a second value (VP2) of the integrator signal (S6) by integrating during a second phase (P2). The optical sensor arrangement (10) comprises a sum and hold circuit (31) that is coupled to the integrator (21) and is designed to generate an analog output signal (S7) as a function of a difference of the first value (VP1) and the second value (VP2) of the integrator signal (S6).
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公开(公告)号：US11258455B2
公开(公告)日：2022-02-22
申请号：US17052461
申请日：2019-04-29
Applicant: ams AG
Inventor： Helmut Theiler , Herbert Lenhard
IPC: H03M3/00
Abstract: An analog-to-digital converter (ADC) is based on single-bit delta-sigma quantization. The ADC includes an integrator, a threshold detector, a feedback block, a range control circuit and an output processing block. The ADC is configured to, based on its own generated digital bitstream, adjust the magnitude of a subtrahend signal in order to achieve autonomous auto-ranging of the ADC during the integration time of a measurement. In particular, the auto-ranging allows for the efficient conversion of an analog input signal with high dynamic range, for example ambient light, to a digital output signal.
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公开(公告)号：US20200209055A1
公开(公告)日：2020-07-02
申请号：US16612565
申请日：2018-05-08
Applicant: ams AG
Inventor： Bernhard Greimel-Längauer , Franz Lechner , Josef Kriebernegg , Herbert Lenhard , Manuel Hoerbinger , Dan Jacobs
Abstract: The proposed concept relates to an optical sensor arrangement comprising an optical sensor with an integrated circuit arranged in or on a substrate. The substrate comprises at least a first surface area and a second surface area. At least one optically active sensor component is arranged on or in the substrate of the first surface area. The optically active sensor component is arranged for emitting and/or detecting light of a desired wavelength range. Optically inactive sensor circuitry is arranged on or in the substrate of the second surface area. A display panel comprises an active display area and a non-active display area, wherein the non-active display area comprises a material which is optically transparent in the desired wavelength range and wherein the non-active display area at least partly frames the active display layer. The optical sensor and the display panel are stacked such that, with respect to a main direction of display emission, the first surface area is arranged below the non-active display area and the second surface area is arranged below the active display area.
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公开(公告)号：US20190392772A1
公开(公告)日：2019-12-26
申请号：US16489947
申请日：2018-02-07
Applicant: ams AG
Inventor： Josef Kriebernegg , Bernhard Greimel-Rechling , Herbert Lenhard , Peter Bliem , Joachim Lechner , Christian Halper , Manuel Hoerbinger
Abstract: A method is suggested for sensing light being incident on an electronic device. The electronic device comprises a display and a light sensor arrangement mounted behind the display such as to receive incident light through the display. The method comprises periodically switching the display on and off depending on a control signal, wherein a period is defined by a succession of an on-state and an off-state of the display. A sensor signal is generated by integrating the incident light by means of the light sensor arrangement for a total integration time comprising a number of periods. A first signal count is determined from the sensor signal being indicative of an amount of integrated incident light during an on-state. A second signal count is determined from the sensor signal being indicative of an amount of integrated incident light during an off-state. A third signal count is determined from the sensor signal being indicative of an amount of integrated incident light during the total integration time. Finally, an ambient light level is determined depending on the first, second and third signal counts.
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Patent Agency Ranking
公开(公告)号：US10972004B2
公开(公告)日：2021-04-06
申请号：US16478758
申请日：2018-01-26
Applicant: ams AG
Inventor： Herbert Lenhard , Manfred Lueger
IPC: H02M3/07
Abstract: A voltage converter includes a first to a third capacitor, a supply terminal, a first and a second clock terminal and a transfer arrangement, wherein a first electrode of the first capacitor is connected to the first clock terminal and a second electrode of the first capacitor is connected to a first node of the transfer arrangement, wherein a first electrode of the second capacitor is connected to the second clock terminal and a second electrode of the second capacitor is connected to a second node of the transfer arrangement, and wherein a first electrode of the third capacitor is permanently and directly connected to the second electrode of the first capacitor and a second electrode of the third capacitor is connected to a third node of the transfer arrangement.
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公开(公告)号：US12136935B2
公开(公告)日：2024-11-05
申请号：US17788167
申请日：2020-12-16
Applicant: ams AG
Inventor： Bernhard Greimel-Rechling , Joachim Lechner , Herbert Lenhard , Philipp Dunst
Abstract: We disclose herein a method of compressing data for data transfer within an electronic device. The method comprises: receiving, at a first processing member of the electronic device, a plurality of data samples produced by a member of the electronic device, wherein the data samples comprise numerical bits; restructuring, by the first processing member, the plurality of data samples into a plurality of data packets; labelling each data packet with a sample indicator bit to indicate a plurality of groups across the plurality of data packets; transferring a bit stream comprising at least some of the plurality of data packets across an interface of the electronic device to a receiving member of the electronic device; and decoding the bit stream, by a second processing member of the electronic device, to obtain at least some of the plurality of the data samples, the decoding being based at least in part on the sample indicator bits.
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公开(公告)号：US10950187B2
公开(公告)日：2021-03-16
申请号：US16489947
申请日：2018-02-07
Applicant: ams AG
Inventor： Josef Kriebernegg , Bernhard Greimel-Rechling , Herbert Lenhard , Peter Bliem , Joachim Lechner , Christian Halper , Manuel Hoerbinger
Abstract: A method is suggested for sensing light being incident on an electronic device. The electronic device comprises a display and a light sensor arrangement mounted behind the display such as to receive incident light through the display. The method comprises periodically switching the display on and off depending on a control signal, wherein a period is defined by a succession of an on-state and an off-state of the display. A sensor signal is generated by integrating the incident light by means of the light sensor arrangement for a total integration time comprising a number of periods. A first signal count is determined from the sensor signal being indicative of an amount of integrated incident light during an on-state. A second signal count is determined from the sensor signal being indicative of an amount of integrated incident light during an off-state. A third signal count is determined from the sensor signal being indicative of an amount of integrated incident light during the total integration time. Finally, an ambient light level is determined depending on the first, second and third signal counts.
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公开(公告)号：US11344234B2
公开(公告)日：2022-05-31
申请号：US16614457
申请日：2018-05-15
Applicant: ams AG
Inventor： Peter Trattler , Karl Georg Waser , Herbert Lenhard
IPC: A61B5/1455 , A61B5/00 , G01J1/44 , G01J1/42
Abstract: A circuit arrangement for an optical monitoring system comprises a driver circuit which is configured to generate at least one driving signal for driving the light source. A detector terminal is arranged for receiving a detector current from an optical detector. A gain stage is connected at its input side to the driver circuit for receiving the driving signal and generates a noise signal depending on the driving signal. A processing unit is configured to generate an output signal depending on the detector current and the noise signal.
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公开(公告)号：US11128826B2
公开(公告)日：2021-09-21
申请号：US16761875
申请日：2018-11-13
Applicant: ams AG
Inventor： Herbert Lenhard
IPC: H03K17/16 , H04N5/369 , H02M1/08 , H03K17/693
Abstract: A sensor arrangement to sense an external signal comprises a sensor (100) and a charge generator (200) to generate a compensation current (Ic) to compensate the sensor current. A charge generator (200) comprises a first transistor (210) having a parasitic capacitor (212) and a first conductive path. The charge generator (200) comprises a second transistor (220) having a second conductive path being coupled in series to the first transistor (210) and coupled to the output node (O200) of the charge generator (200). The control circuit (600) is configured to control the conductivity of the respective first and second conductive path of the first and the second transistor (210, 220) of the charge generator (200) so that the sensor current is compensated by the compensation current (Ic).
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