Low-noise high efficiency bias generation circuits and method

    公开(公告)号:US11662755B2

    公开(公告)日:2023-05-30

    申请号:US17530290

    申请日:2021-11-18

    申请人: pSemi Corporation

    IPC分类号: G05F1/56 H03F1/30 G05F1/46

    CPC分类号: G05F1/56 G05F1/468 H03F1/303

    摘要: An apparatus for generating a steady state positive voltage (PVS) signal and a steady state negative voltage (NVS) signal is presented. The apparatus includes a bias signal generation module for generating a steady state reference voltage signal (RVS) based on a varying supply voltage signal (VDD), the RVS having a voltage level less than the PVS. The apparatus further includes a positive signal generation module (PSGM) generating the PVS, the PSGM including a first capacitor, the PSGM employing the first capacitor to generate a portion of the PVS based on the RVS. The apparatus further includes a negative signal generation module (NSGM) generating the NVS, the NSGM including a second capacitor, the NSGM employing the second capacitor to generate a portion of the NVS based on the RVS.

    Circuit and method for controlling charge injection in radio frequency switches

    公开(公告)号:US11196414B2

    公开(公告)日:2021-12-07

    申请号:US16921790

    申请日:2020-07-06

    申请人: pSemi Corporation

    摘要: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

    Circuit and method for controlling charge injection in radio frequency switches

    公开(公告)号:US10804892B2

    公开(公告)日:2020-10-13

    申请号:US15826453

    申请日:2017-11-29

    申请人: pSemi Corporation

    摘要: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

    Method and apparatus improving gate oxide reliability by controlling accumulated charge

    公开(公告)号:USRE48965E1

    公开(公告)日:2022-03-08

    申请号:US16710998

    申请日:2019-12-11

    申请人: pSemi Corporation

    摘要: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

    Method and apparatus improving gate oxide reliability by controlling accumulated charge

    公开(公告)号:US10818796B2

    公开(公告)日:2020-10-27

    申请号:US15419898

    申请日:2017-01-30

    申请人: pSemi Corporation

    摘要: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

    Low-Noise High Efficiency Bias Generation Circuits and Method

    公开(公告)号:US20200225688A1

    公开(公告)日:2020-07-16

    申请号:US16744027

    申请日:2020-01-15

    申请人: pSemi Corporation

    IPC分类号: G05F1/56 H03F1/30 G05F1/46

    摘要: An apparatus for generating a steady state positive voltage (PVS) signal and a steady state negative voltage (NVS) signal is presented. The apparatus includes a bias signal generation module for generating a steady state reference voltage signal (RVS) based on a varying supply voltage signal (VDD), the RVS having a voltage level less than the PVS. The apparatus further includes a positive signal generation module (PSGM) generating the PVS, the PSGM including a first capacitor, the PSGM employing the first capacitor to generate a portion of the PVS based on the RVS. The apparatus further includes a negative signal generation module (NSGM) generating the NVS, the NSGM including a second capacitor, the NSGM employing the second capacitor to generate a portion of the NVS based on the RVS.

    Circuit and Method for Controlling Charge Injection in Radio Frequency Switches

    公开(公告)号:US20240007098A1

    公开(公告)日:2024-01-04

    申请号:US18344631

    申请日:2023-06-29

    申请人: pSemi Corporation

    摘要: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch includes switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. The charge injection control elements include resistors or transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

    Low-Noise High Efficiency Bias Generation Circuits and Method

    公开(公告)号:US20230384811A1

    公开(公告)日:2023-11-30

    申请号:US18322181

    申请日:2023-05-23

    申请人: pSemi Corporation

    IPC分类号: G05F1/56 H03F1/30 G05F1/46

    CPC分类号: G05F1/56 H03F1/303 G05F1/468

    摘要: An apparatus for generating a steady state positive voltage (PVS) signal and a steady state negative voltage (NVS) signal is presented. The apparatus includes a bias signal generation module for generating a steady state reference voltage signal (RVS) based on a varying supply voltage signal (VDD), the RVS having a voltage level less than the PVS. The apparatus further includes a positive signal generation module (PSGM) generating the PVS, the PSGM including a first capacitor, the PSGM employing the first capacitor to generate a portion of the PVS based on the RVS. The apparatus further includes a negative signal generation module (NSGM) generating the NVS, the NSGM including a second capacitor, the NSGM employing the second capacitor to generate a portion of the NVS based on the RVS.