Digitally controlled tuner circuit
    1.
    发明授权
    Digitally controlled tuner circuit 失效
    数字控制调谐电路

    公开(公告)号:US6069505A

    公开(公告)日:2000-05-30

    申请号:US44632

    申请日:1998-03-19

    摘要: A digitally controlled tuner circuit for continuous-time filters. Active RC integrators include digitally programmable feedback capacitors to allow for digital fine tuning of their time constant. The PLL-based tuner circuit includes a sine-wave oscillator made up of the digitally-controlled active RC integrators.

    摘要翻译: 用于连续时间滤波器的数字控制调谐器电路。 有源RC积分器包括数字可编程反馈电容器,可以对其时间常数进行数字微调。 基于PLL的调谐器电路包括由数字控制的有源RC积分器组成的正弦波振荡器。

    PLL-based differential tuner circuit
    2.
    发明授权
    PLL-based differential tuner circuit 失效
    基于PLL的差分调谐电路

    公开(公告)号:US5936445A

    公开(公告)日:1999-08-10

    申请号:US822990

    申请日:1997-03-21

    摘要: Various circuit techniques to implement continuous-time filters with improved performance are disclosed. The present invention uses RMC type integrators that exhibit lower harmonic distortion. In one embodiment, a novel high-gain two-pole operational amplifier is used along with RMC architecture to achieve lower harmonic distortion. In another embodiment, the present invention uses dummy polysilicon resistors to accurately compensate for the distributed parasitics of the polysilicon resistors used in RMC integrator. In yet another embodiment, the present invention provides an on-chip tuner with a differential architecture for better noise immunity.

    摘要翻译: 公开了实现具有改进性能的连续时间滤波器的各种电路技术。 本发明使用表现出较低谐波失真的RMC型积分器。 在一个实施例中,新型高增益双极运算放大器与RMC架构一起使用以实现较低谐波失真。 在另一个实施例中,本发明使用虚拟多晶硅电阻器来精确地补偿RMC积分器中使用的多晶硅电阻的分布寄生效应。 在另一个实施例中,本发明提供具有差分架构的片上调谐器,以提供更好的抗噪声能力。

    Compensation technique for parasitic capacitance
    3.
    发明授权
    Compensation technique for parasitic capacitance 失效
    寄生电容补偿技术

    公开(公告)号:US5744385A

    公开(公告)日:1998-04-28

    申请号:US822989

    申请日:1997-03-21

    申请人: Pirooz Hojabri

    发明人: Pirooz Hojabri

    IPC分类号: H01L27/08 H01L27/02

    CPC分类号: H01L27/0802

    摘要: Various circuit techniques to implement continuous-time filters with improved performance are disclosed. The present invention uses RMC type integrators that exhibit lower harmonic distortion. In one embodiment, a novel high-gain two-pole operational amplifier is used along with RMC architecture to achieve lower harmonic distortion. In another embodiment, the present invention uses dummy polysilicon resistors to accurately compensate for the distributed parasitics of the polysilicon resistors used in RMC integrator. In yet another embodiment, the present invention provides an on-chip tuner with a differential architecture for better noise immunity.

    摘要翻译: 公开了实现具有改进性能的连续时间滤波器的各种电路技术。 本发明使用表现出较低谐波失真的RMC型积分器。 在一个实施例中,新型高增益双极运算放大器与RMC架构一起使用以实现较低谐波失真。 在另一个实施例中,本发明使用虚拟多晶硅电阻器来精确地补偿RMC积分器中使用的多晶硅电阻的分布寄生效应。 在另一个实施例中,本发明提供具有差分架构的片上调谐器,以提供更好的抗噪声能力。

    Low voltage transmission line driver
    4.
    发明授权
    Low voltage transmission line driver 失效
    低压输电线路驱动器

    公开(公告)号:US06028479A

    公开(公告)日:2000-02-22

    申请号:US4628

    申请日:1998-01-07

    IPC分类号: H03F3/30 H03F3/45

    摘要: A high-speed low-voltage line-driver circuit implemented using various embodiments of high speed current-feedback opamps is disclosed. The line driver of the present invention uses a fully differential architecture whereby common-mode disturbances, such as noise due to substrate or power supply, are cancelled. The driver also uses a current-feedback approach to achieve larger bandwidth. In a specific embodiment, the current-feedback opamp used in the line driver of the present invention uses class A/B structure for both input and output stages.

    摘要翻译: 公开了使用高速电流反馈运算放大器的各种实施例实现的高速低压线路驱动电路。 本发明的线路驱动器使用完全差分架构,由此消除由于基板或电源引起的噪声等共模干扰。 驱动程序还使用电流反馈方法来实现更大的带宽。 在具体实施例中,在本发明的线路驱动器中使用的电流反馈运算放大器在输入和输出级都使用A / B类结构。

    Wide band-width operational amplifier
    5.
    发明授权
    Wide band-width operational amplifier 失效
    宽带宽运算放大器

    公开(公告)号:US5880634A

    公开(公告)日:1999-03-09

    申请号:US822988

    申请日:1997-03-21

    摘要: Various circuit techniques to implement continuous-time filters with improved performance are disclosed. The present invention uses RMC type integrators that exhibit lower harmonic distortion. In one embodiment, a novel high-gain two-pole operational amplifier is used along with RMC architecture to achieve lower harmonic distortion. In another embodiment, the present invention uses dummy polysilicon resistors to accurately compensate for the distributed parasitics of the polysilicon resistors used in RMC integrator. In yet another embodiment, the present invention provides an on-chip tuner with a differential architecture for better noise immunity.

    摘要翻译: 公开了实现具有改进性能的连续时间滤波器的各种电路技术。 本发明使用表现出较低谐波失真的RMC型积分器。 在一个实施例中,新型高增益双极运算放大器与RMC架构一起使用以实现较低谐波失真。 在另一个实施例中,本发明使用虚拟多晶硅电阻器来精确地补偿RMC积分器中使用的多晶硅电阻的分布寄生效应。 在另一个实施例中,本发明提供具有差分架构的片上调谐器,以提供更好的抗噪声能力。