USB integrated circuit, testing platform and operating method for USB integrated circuit

    公开(公告)号:US11914491B2

    公开(公告)日:2024-02-27

    申请号:US17985920

    申请日:2022-11-14

    申请人: VIA LABS, INC.

    发明人: Hao-Hsuan Chiu

    IPC分类号: G06F11/22 G01R1/04 G06F11/273

    摘要: A USB integrated circuit (IC), a testing platform and an operating method for USB integrated circuit are provided. The USB integrated circuit includes a USB port physical layer (PHY) circuit, a first lane adapter, a second lane adapter, a routing circuit, and a USB transport layer circuit. The USB PHY circuit is configured to transmit a differential signal between the USB integrated circuit and an outside device. When the USB integrated circuit operates in a testing mode, the routing circuit electrically connects the first lane adapter to the USB PHY circuit. When the USB integrated circuit operates in a working mode, the routing circuit electrically connects the second lane adapter to the USB PHY circuit. The USB transport layer circuit is coupled to the first lane adapter and the second lane adapter.

    Integrated circuit chip, package substrate and electronic assembly

    公开(公告)号:US11735502B2

    公开(公告)日:2023-08-22

    申请号:US16858709

    申请日:2020-04-27

    申请人: VIA LABS, INC.

    发明人: Sheng-Yuan Lee

    摘要: An integrated circuit chip has an active surface and a chip pad arrangement on the active surface. The chip pad arrangement includes four pairs of chip pads arranged in two rows along a side edge of the active surface. Two pairs of chip pads are a first transmission differential pair chip pad and a first reception differential pair chip pad respectively. Positions of the two pairs of chip pads are not adjacent to each other and are in different rows. The other two pairs of chip pads are a second transmission differential chip pad and a second reception differential chip pad respectively. Positions of the other two pairs of chip pads are not adjacent to each other and are in different rows. In addition, a package substrate corresponding to the integrated circuit chip and an electronic assembly including the package substrate and the integrated circuit chip are also provided.

    MULTILAYER-TYPE ON-CHIP INDUCTOR STRUCTURE
    3.
    发明公开

    公开(公告)号:US20230187347A1

    公开(公告)日:2023-06-15

    申请号:US18165498

    申请日:2023-02-07

    申请人: VIA LABS, INC.

    发明人: Sheng-Yuan LEE

    IPC分类号: H01L23/522 H01F27/28

    摘要: A multilayer-type on-chip inductor with a conductive structure includes an insulating redistribution layer disposed on an inter-metal dielectric layer, a first spiral trace layer disposed in the insulating redistribution layer, and a second spiral trace layer disposed in the inter-metal dielectric layer correspondingly formed below the first spiral trace layer, wherein the inter-metal dielectric layer has a separating region to divide the second spiral trace layer into a plurality of line segments, and wherein each of a plurality of first slit openings and each of a plurality of second slit openings pass through a corresponding line segment, and extend in an extending direction of a length of the corresponding line segment.

    Voltage comparator and operation method thereof

    公开(公告)号:US11493543B1

    公开(公告)日:2022-11-08

    申请号:US17535579

    申请日:2021-11-25

    申请人: VIA LABS, INC.

    IPC分类号: G01R19/165 G01R19/00 H03K5/22

    摘要: A voltage comparator and an operation method thereof are provided. The voltage comparator includes an amplifying circuit, a reference current source, and a transient current source. A first input terminal and a second input terminal of the amplifying circuit respectively receive a first corresponding voltage corresponding to a target voltage and a reference voltage. The reference current source is coupled to the amplifying circuit to provide a reference current. The transient current source is coupled to the amplifying circuit to selectively provide a transient current. The transient current source detects a transition of a second corresponding voltage corresponding to the target voltage to dynamically adjust the transient current. Therefore, when a rapidly increasing voltage occurs in the target voltage, the transient current source may temporarily increase the current of the amplifying circuit, thereby accelerating the response speed of the amplifying circuit.

    ELECTRONIC APPARATUS AND SECURE FIRMWARE UPDATE METHOD THEREOF

    公开(公告)号:US20220350890A1

    公开(公告)日:2022-11-03

    申请号:US17466220

    申请日:2021-09-03

    申请人: VIA LABS, INC.

    摘要: An electronic apparatus and a secure firmware update method thereof are provided. The electronic apparatus includes a first integrated circuit chip, a first non-volatile memory chip, a second integrated circuit chip and a second non-volatile memory chip. The first integrated circuit chip includes a secure firmware update console, and the first non-volatile memory chip includes a spare data storage space. The first non-volatile memory chip and the second non-volatile memory chip store a first firmware code of the first integrated circuit chip and a second firmware code of the second integrated circuit chip, respectively. Firmware code update data are transferred to and stored in the spare data storage space. The secure firmware update console performs a firmware update procedure by writing the firmware code update data into the second non-volatile memory chip to overwrite the second firmware code after passing a verification procedure on the firmware code update data.

    MULTI-PORT POWER SUPPLY DEVICE AND OPERATION METHOD THEREOF

    公开(公告)号:US20220137690A1

    公开(公告)日:2022-05-05

    申请号:US17488330

    申请日:2021-09-29

    申请人: VIA LABS, INC.

    IPC分类号: G06F1/26 G06F13/42 H02J1/10

    摘要: A multi-port power supply device and an operation method thereof are provided. The multi-port power supply device includes a power converter, a power switch, a current detection circuit, a voltage detection circuit, a control circuit, and multiple USB ports. The power converter supplies power to a USB port via a current path. The control circuit determines whether the USB port is connected to a USB device according to an actual voltage of the current path. When the USB port is not connected to the USB device, the control circuit turns off the current path. When the USB port is connected to the USB device, after a part of a power of other USB ports is dynamically transferred to the USB port, the control circuit determines whether to turn on the current path according to an actual current of the current path.

    MULTI-PORT POWER SUPPLY DEVICE AND OPERATION METHOD THEREOF

    公开(公告)号:US20220137688A1

    公开(公告)日:2022-05-05

    申请号:US17488326

    申请日:2021-09-29

    申请人: VIA LABS, INC.

    IPC分类号: G06F1/26 G06F13/42

    摘要: A multi-port power supply device and an operation method thereof are provided. The multi-port power supply device includes multiple USB ports, multiple power converters, and a common control circuit. When an adjustment trend of an agreement power of a first USB port will make the agreement power greater than a rated minimum charging power of a USB device connected to the first USB port, the common control circuit dynamically changes the agreement power according to an actual output power of the first USB port. When the adjustment trend of the agreement power will make the agreement power less than the rated minimum charging power, the common control circuit does not change the agreement power, and the common control circuit dynamically transfers a power difference between the agreement power and the actual output power to other USB ports.

    HARDWARE TROJAN IMMUNITY DEVICE AND OPERATION METHOD THEREOF

    公开(公告)号:US20210271754A1

    公开(公告)日:2021-09-02

    申请号:US16892304

    申请日:2020-06-04

    申请人: VIA LABS, INC.

    IPC分类号: G06F21/55

    摘要: A hardware Trojan immunity device and an operation method thereof are provided. The hardware Trojan immunity device is disposed in a data transmission path between an output terminal of a first circuit and an input terminal of a second circuit. The hardware Trojan immunity device includes a multiplexer, an arbitrary pattern generator (APG) and a monitoring circuit. A first input terminal of the multiplexer is coupled to the output terminal of the first circuit. An output terminal of the multiplexer is coupled to the input terminal of the second circuit. The APG is coupled to a second input terminal of the multiplexer to provide pseudo-random data. The monitoring circuit is coupled to a control terminal of the multiplexer. The monitoring circuit is configured to monitor a data activity of the data transmission path and to control a routing of the multiplexer according to the data activity.

    Universal serial bus device and method for dynamically defining a power source or sink status for downstream facing ports

    公开(公告)号:US10955888B2

    公开(公告)日:2021-03-23

    申请号:US16103941

    申请日:2018-08-15

    申请人: VIA LABS, INC.

    摘要: The present invention provides a universal serial bus (USB) device and an operating method thereof. The USB device includes a plurality of Downstream Facing Ports (DFPs) and a control circuit. When a first external device is connected to the first DFP and the second DFP is not connected to any external device, the control circuit maintains the first DFP as one of a power source port and a power sink port according to the first external device, and maintains the second DFP as other one of the power source port and the power sink port regardless of whether the second DFP is connected to a second external device later until the first external device is removed from the first DFP.

    USB INTEGRATED CIRCUIT
    10.
    发明申请

    公开(公告)号:US20210064558A1

    公开(公告)日:2021-03-04

    申请号:US16662040

    申请日:2019-10-24

    申请人: VIA LABS, INC.

    IPC分类号: G06F13/40 G06F13/42

    摘要: A USB integrated circuit includes three TX connecting component pairs and three RX connecting component pairs. The first TX connecting component pair and the first RX connecting component pair are respectively coupled to the first TX pin pair and the first RX pin pair of the first USB connector. The second TX connecting component pair and the second RX connecting component pair are respectively coupled to the first TX pin pair and the first RX pin pair of a second USB connector. The third TX connecting component pair is coupled to the second TX pin pair of the first USB connector or to the second TX pin pair of the second USB connector. The third RX connecting component pair is coupled to the second RX pin pair of the first USB connector or to the second RX pin pair of the second USB connector.