PARALLELIZATION COMPILING METHOD, PARALLELIZATION COMPILER, AND VEHICULAR DEVICE
    1.
    发明申请
    PARALLELIZATION COMPILING METHOD, PARALLELIZATION COMPILER, AND VEHICULAR DEVICE 审中-公开
    并行编译方法,并行编译器和车辆装置

    公开(公告)号:US20160291950A1

    公开(公告)日:2016-10-06

    申请号:US15083502

    申请日:2016-03-29

    IPC分类号: G06F9/45 G06F9/52

    摘要: A parallelization compiling method for generating a segmented program from a sequential program, in which multiple macro tasks are included and at least two of the macro tasks have a data dependency relationship with one another, includes determining an existence of invalidation information for invalidating at least a part of the data dependency relationship between the at least two of the plurality of macro tasks before compiling the sequential program into the segmented program, and generating the segmented program by compiling the sequential program into the segmented program with reference to a determination result of the existence of the invalidation information. When the invalidation information is determined to exist, the at least a part of the data dependency relationship is invalidated before the compiling of the sequential program into the segmented program.

    摘要翻译: 一种用于从顺序程序生成分段程序的并行化编译方法,其中包括多个宏任务,并且所述宏任务中的至少两个具有彼此之间的数据依赖关系,包括确定无效信息的存在以使至少一个 参考所述存在的确定结果,将所述多个宏任务中的至少两个之间的数据依赖关系的一部分编译为所述分段程序,并且通过将所述顺序程序编译为所述分段程序来生成所述分段程序 的无效信息。 当确定存在无效信息时,在将顺序程序编译到分段程序之前,数据依赖关系的至少一部分被无效。

    Compiler directed cache coherence for many caches generated from high-level language source code
    2.
    发明授权
    Compiler directed cache coherence for many caches generated from high-level language source code 有权
    针对高级语言源代码生成的许多缓存的编译器定向缓存一致性

    公开(公告)号:US09378003B1

    公开(公告)日:2016-06-28

    申请号:US12508437

    申请日:2009-07-23

    IPC分类号: G06F9/45

    摘要: Approaches for generating and operating an electronic system. High-level language (HLL) source code is compiled into equivalent intermediate language program code. The compilation determines a plurality of caches for storing data referenced by the HLL source. Flush instructions are inserted in the intermediate language program. Each flush instruction references one of caches and is inserted in the intermediate language program immediately following an instruction that is last to write to that cache. The intermediate language program is translated into a hardware description that specifies the plurality of caches, circuits for processing data in the caches, and for each of the caches a flush interface that initiates writing data from the cache to a main memory in response to a flush signal. The timing of the respective flush signal is determined based on placement of one of the one or more flush instructions in the intermediate language program.

    摘要翻译: 生成和操作电子系统的方法。 高级语言(HLL)源代码被编译成等效的中间语言程序代码。 编译确定用于存储由HLL源引用的数据的多个高速缓存。 刷新指令插入中间语言程序。 每个刷新指令引用一个缓存,并且在紧跟在最后写入该缓存的指令之后插入到中间语言程序中。 中间语言程序被转换为指定多个高速缓存的硬件描述,用于处理高速缓存中的数据的电路,以及用于每个高速缓存的闪存接口,其响应于刷新而启动从高速缓存向主存储器写入数据 信号。 基于中间语言程序中的一个或多个刷新指令中的一个的布置来确定各个刷新信号的定时。

    Native compilation and safe deployment of virtual machine code
    3.
    发明授权
    Native compilation and safe deployment of virtual machine code 有权
    虚拟机代码的本地编译和安全部署

    公开(公告)号:US07032216B1

    公开(公告)日:2006-04-18

    申请号:US09792070

    申请日:2001-02-26

    IPC分类号: G06F9/45

    CPC分类号: G06F8/454

    摘要: Fragile native compilation of virtual machine code is described, in which a native code optimizer inspects external code entities such as Java base classes and emits target code based on an inter-procedural analysis of the code and data structure invariants and other properties of the external code entity. The fragile compiler also records which properties of the external code entities were used to produce the optimized code in a “fragile set”, so that the virtual machine at which the compiled code is deployed and executed can detect if the recorded properties of the external code entities are compatible with the properties of the corresponding entities on the deployment virtual machine. If the code entities are incompatible, the compiled native code is rejected and the virtual machine reverts to interpreting the virtual machine code.

    摘要翻译: 描述了虚拟机器代码的脆弱的本地编译,其中本地代码优化器基于对代码和数据结构不变量以及外部代码的其他属性的程序间分析来检查外部代码实体(例如Java基类)并发出目标代码 实体。 脆弱的编译器还记录了外部代码实体的哪些属性用于在“脆弱集合”中生成优化的代码,从而部署和执行编译代码的虚拟机可以检测外部代码的记录属性 实体与部署虚拟机上相应实体的属性兼容。 如果代码实体不兼容,则编译的本机代码被拒绝,并且虚拟机将还原以解释虚拟机代码。

    IMPROVING APPLICATION CODE EXECUTION PERFORMANCE BY CONSOLIDATING ACCESSES TO SHARED RESOURCES

    公开(公告)号:US20170161034A1

    公开(公告)日:2017-06-08

    申请号:US14957632

    申请日:2015-12-03

    IPC分类号: G06F9/45 G06F9/455

    摘要: A computer implemented method of refactoring software code to optimize execution performance by consolidating shared resources accesses, comprising: 1) Receiving target code containing code entries accessing shared resource(s). 2) Automatically creating a dependency record for each shared resource. The dependency record describes dependencies among the code entries accessing shared data items in the shared resource(s). 3) Identifying, based on the dependency record, a resource access point for each shared resource(s). The resource access point is located in an execution path of the target code to precede code entries which use the shared data item(s) and follows code entries which define the shared data item(s). 4) Automatically refactoring the target code to group together code entries which use the shared data item(s). The group is placed following the resource access point to consolidate shared resource accesses of the code entries to the shared resource(s). 5) Outputting the refactored target code.

    MULTI-TIERED FLEET MANAGEMENT CACHE
    7.
    发明申请
    MULTI-TIERED FLEET MANAGEMENT CACHE 有权
    多层FLEET管理缓存

    公开(公告)号:US20080228533A1

    公开(公告)日:2008-09-18

    申请号:US12028477

    申请日:2008-02-08

    IPC分类号: G06Q10/00 G06F17/30

    摘要: A method of providing reservation status relating to a group of objects includes providing a database for containing (i) availability data describing availability of at least one of the group of objects, and (ii) reservation data describing allocation of at least one of the group of objects. The availability data and the reservation data are stored in sparse form. The method further includes extracting, from the database, availability data and reservation data corresponding to a predetermined period of time, and combining the extracted availability data and reservation data to form windowed data in a dense format. The method also includes receiving the windowed data and providing the windowed data in a bit-vector view, and sampling the windowed data in the bit-vector view to produce sampled data. The sampled data provides the reservation status as a static view of the windowed data in the bit-vector view.

    摘要翻译: 提供与一组对象相关的预约状态的方法包括:提供数据库,用于包含(i)描述所述对象组中的至少一个的可用性的可用性数据;以及(ii)描述所述组中至少一个组的分配的预约数据 的对象。 可用性数据和预留数据以稀疏形式存储。 该方法还包括从数据库提取对应于预定时间段的可用性数据和预留数据,并且将提取的可用性数据和预留数据组合以形成密集格式的窗口数据。 该方法还包括接收窗口数据并以比特向量视图提供加窗数据,并对位向量视图中的窗口化数据进行采样以产生采样数据。 采样数据作为位向量视图中窗口数据的静态视图提供预留状态。

    Improving application code execution performance by consolidating accesses to shared resources

    公开(公告)号:US09851957B2

    公开(公告)日:2017-12-26

    申请号:US14957632

    申请日:2015-12-03

    IPC分类号: G06F9/45 G06F9/455

    摘要: A computer implemented method of refactoring software code to optimize execution performance by consolidating shared resources accesses, comprising: receiving target code containing code entries accessing shared resource(s); automatically creating a dependency record for each shared resource. The dependency record describes dependencies among the code entries accessing shared data items in the shared resource(s); identifying, based on the dependency record, a resource access point for each shared resource(s), wherein the resource access point is located in an execution path of the target code to precede code entries which use the shared data item(s) and follows code entries which define the shared data item(s); automatically refactoring the target code to group together code entries which use the shared data item(s), wherein the group is placed following the resource access point to consolidate shared resource accesses of the code entries to the shared resource(s); and outputting the refactored target code.

    FINGERPRINTING OF REDUNDANT THREADS USING COMPILER-INSERTED TRANSFORMATION CODE

    公开(公告)号:US20170364332A1

    公开(公告)日:2017-12-21

    申请号:US15188304

    申请日:2016-06-21

    发明人: Daniel I. Lowell

    IPC分类号: G06F9/44 G06F9/45 G06F11/16

    摘要: A first processing element is configured to execute a first thread and one or more second processing elements are configured to execute one or more second threads that are redundant to the first thread. The first thread and the one or more second threads are to selectively bypass one or more comparisons of results of operations performed by the first thread and the one or more second threads depending on whether an event trigger for the comparison has occurred a configurable number of times since a previous comparison of previously encoded values of the results. In some cases the comparison can be performed based on hashed (or encoded) values of the results of a current operation and one or more previous operations.

    DATA PROCESSING SYSTEMS
    10.
    发明申请

    公开(公告)号:US20170206698A1

    公开(公告)日:2017-07-20

    申请号:US15401639

    申请日:2017-01-09

    申请人: ARM Limited

    IPC分类号: G06T15/00 G06T15/80

    摘要: A graphics processing unit comprises a programmable execution unit executing graphics processing programs for execution threads to perform graphics processing operations, a local register memory comprising one or more registers, where registers of the register memory are assignable to store data associated with an individual execution thread that is being executed by the execution unit, and where the register(s) assigned to an individual execution thread are accessible only to that associated individual execution thread, and a further local memory that is operable to store data for use in common by plural execution threads, where the data stored in the further local memory is accessible to plural execution threads as they execute. The programmable execution unit is operable to selectively store output data for an execution thread in a register(s) of the local register memory assigned to the execution thread, and the further local memory.