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公开(公告)号:US20230317657A1
公开(公告)日:2023-10-05
申请号:US17970111
申请日:2022-10-20
发明人: Wonil SEO
IPC分类号: H01L23/00 , H01L25/065
CPC分类号: H01L24/09 , H01L24/32 , H01L24/48 , H01L24/08 , H01L24/73 , H01L25/0657 , H01L24/85 , H01L2924/1011 , H01L2924/10156 , H01L2924/1436 , H01L2225/0651 , H01L2225/06524 , H01L2225/06527 , H01L2225/06562 , H01L2225/06565 , H01L2224/73265 , H01L2224/48091 , H01L2224/48229 , H01L2224/32145 , H01L2224/0801 , H01L2224/08054 , H01L2224/08055 , H01L2224/0903 , H01L2224/09051 , H01L2224/0951 , H01L2224/09153 , H01L2224/09152 , H01L2224/09179 , H01L2224/85091
摘要: Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises semiconductor chips stacked on a substrate and including first and second pads on top surfaces thereof, and bonding wires connecting the first and second pads to the substrate. The semiconductor chips alternately protrude in a first direction and its opposite direction. The semiconductor chip has a first lateral surface spaced apart from another semiconductor chip. The top surface of the semiconductor chip is provided thereon with a first arrangement line extending along the first lateral surface and with second arrangement lines extending from opposite ends of the first arrangement line. Wherein as a distance between the first and second arrangement lines increases, a distance between the second arrangement lines and the first lateral surface increases. The first pads are arranged along the first arrangement line. The second pads are arranged along the second arrangement lines.
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公开(公告)号:US20240222331A1
公开(公告)日:2024-07-04
申请号:US18473126
申请日:2023-09-22
发明人: JIN-WOO PARK , UN-BYOUNG KANG , CHUNGSUN LEE
IPC分类号: H01L25/065 , H01L23/00
CPC分类号: H01L25/0657 , H01L24/03 , H01L24/05 , H01L24/09 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L2224/03462 , H01L2224/03464 , H01L2224/05573 , H01L2224/05644 , H01L2224/05687 , H01L2224/0569 , H01L2224/0903 , H01L2224/09152 , H01L2224/16014 , H01L2224/16148 , H01L2224/32145 , H01L2224/73204 , H01L2224/81203 , H01L2225/06513 , H01L2225/06541 , H01L2924/1431 , H01L2924/3511
摘要: A semiconductor package includes a buffer chip configured to include a first dummy region and a second dummy region and to include first pads on rear surfaces of substrates of the first and second dummy regions; and a first core chip stacked at an upper portion of the buffer to include a bump 116 coupled to the first pad and positioned on an entire surface of the substrate, wherein the first pad is positioned in a line shape having a length including at least two bumps.
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