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公开(公告)号：US08753983B2
公开(公告)日：2014-06-17
申请号：US12683961
申请日：2010-01-07
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L23/373 , H01L23/057 , H01L23/3731 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/83 , H01L2224/29144 , H01L2224/2919 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/838 , H01L2224/83805 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/0489 , H01L2924/0665 , H01L2924/10253 , H01L2924/00 , H01L2924/01014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method includes providing a silicon-containing die and providing a heat sink having a palladium layer over a first surface of the heat sink. A first gold layer is located over one of a first surface of the die or the palladium layer. The silicon-containing die is bonded to the heat sink, where bonding includes joining the silicon-containing die and the heat sink such that the first gold layer and the palladium layer are between the first surface of the silicon-containing die and the first surface of the heat sink, and heating the first gold layer and the palladium layer to form a die attach layer between the first surface of the silicon-containing die and the first surface of the heat sink, the die attach layer comprising a gold interface layer having a plurality of intermetallic precipitates, each of the plurality of intermetallic precipitates comprising palladium, gold, and silicon.
摘要翻译： 一种方法包括提供含硅模头并且在散热器的第一表面上提供具有钯层的散热器。 第一金层位于管芯的第一表面或钯层之一上。 所述含硅芯片与所述散热器接合，其中，所述接合包括将所述含硅芯片与所述散热器接合，使得所述第一金层和所述钯层位于所述含硅模具的所述第一表面和所述第一表面之间 并且加热所述第一金层和所述钯层以在所述含硅芯片的所述第一表面和所述散热器的所述第一表面之间形成管芯附着层，所述管芯附着层包括金界面层，所述金界面层具有 多个金属间化合物沉淀物，多个金属间析出物中的每一个包括钯，金和硅。
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2.发明授权Semiconductor devices that include a die bonded to a substrate with a gold interface layer 有权半导体器件包括具有金界面层的与基板结合的管芯公开(公告)号：US09105599B2
公开(公告)日：2015-08-11
申请号：US14287141
申请日：2014-05-26
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L23/373 , H01L23/057 , H01L23/00
CPC分类号： H01L23/373 , H01L23/057 , H01L23/3731 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/83 , H01L2224/29144 , H01L2224/2919 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/838 , H01L2224/83805 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/0489 , H01L2924/0665 , H01L2924/10253 , H01L2924/00 , H01L2924/01014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Embodiments of a semiconductor device include a primary portion of a substrate, a die, and a die attach layer between the die and the primary portion of the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
摘要翻译： 半导体器件的实施例包括基板的主要部分，管芯和管芯与基板的主要部分之间的管芯附着层。 管芯附着层包括金界面层，其包含金和金中的多个第一沉淀物。 每个第一沉淀物包括镍，钴，钯，金和硅的组合。
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公开(公告)号：US20150171047A1
公开(公告)日：2015-06-18
申请号：US14132812
申请日：2013-12-18
申请人： Intel Corporation
CPC分类号： H01L24/75 , B29L2031/34 , B29L2031/3425 , H01L2021/603 , H01L2224/75102 , H01L2224/75252 , H01L2224/75266 , H01L2224/75301 , H01L2224/75501 , H01L2224/75502 , H01L2224/81203 , H01L2224/81801 , H01L2924/01008 , H01L2924/01014 , H01L2924/01022 , H01L2924/0104 , H01L2924/01074 , H01L2924/0474 , H01L2924/0489 , H01L2924/04894 , H01L2924/05032 , H01L2924/0549 , Y10T29/49826
摘要： Embodiments of a thermal compression bonding process bond head and a method for producing a thermal compression bonding process bond head are disclosed. In some embodiments, the bond head includes a thermal compression bonding process heater and a cooling block coupled to the heater through an annular structure. The annular structure surrounds a lower portion of the cooling block and couples the cooling block to the heater such that there is no direct mechanical contact between the cooling block and the heater.
摘要翻译： 公开了热压接工艺粘结头的实施例和用于制造热压接工艺粘合头的方法。 在一些实施例中，接合头包括热压接工艺加热器和通过环形结构联接到加热器的冷却块。 环形结构围绕冷却块的下部并且将冷却块连接到加热器，使得冷却块和加热器之间不存在直接的机械接触。
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公开(公告)号：US09548284B2
公开(公告)日：2017-01-17
申请号：US14132812
申请日：2013-12-18
申请人： Intel Corporation
IPC分类号： H01L23/00 , H01L21/603 , B29L31/34
CPC分类号： H01L24/75 , B29L2031/34 , B29L2031/3425 , H01L2021/603 , H01L2224/75102 , H01L2224/75252 , H01L2224/75266 , H01L2224/75301 , H01L2224/75501 , H01L2224/75502 , H01L2224/81203 , H01L2224/81801 , H01L2924/01008 , H01L2924/01014 , H01L2924/01022 , H01L2924/0104 , H01L2924/01074 , H01L2924/0474 , H01L2924/0489 , H01L2924/04894 , H01L2924/05032 , H01L2924/0549 , Y10T29/49826
摘要： Embodiments of a thermal compression bonding process bond head and a method for producing a thermal compression bonding process bond head are disclosed. In some embodiments, the bond head includes a thermal compression bonding process heater and a cooling block coupled to the heater through an annular structure. The annular structure surrounds a lower portion of the cooling block and couples the cooling block to the heater such that there is no direct mechanical contact between the cooling block and the heater.
摘要翻译： 公开了热压接工艺粘结头的实施例和用于制造热压接工艺粘合头的方法。 在一些实施例中，接合头包括热压接工艺加热器和通过环形结构联接到加热器的冷却块。 环形结构围绕冷却块的下部并且将冷却块连接到加热器，使得冷却块和加热器之间不存在直接的机械接触。
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公开(公告)号：US20140256091A1
公开(公告)日：2014-09-11
申请号：US14287142
申请日：2014-05-26
IPC分类号： H01L23/00
CPC分类号： H01L23/373 , H01L23/057 , H01L23/3731 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/83 , H01L2224/29144 , H01L2224/2919 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/838 , H01L2224/83805 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/0489 , H01L2924/0665 , H01L2924/10253 , H01L2924/00 , H01L2924/01014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Embodiments of methods for forming a semiconductor device that includes a die and a substrate include pressing together the die and the substrate such that a first gold layer and one or more additional material layers are between the die and the substrate, and performing a bonding operation to form a die attach layer between the die and the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
摘要翻译： 用于形成包括管芯和衬底的半导体器件的方法的实施例包括将管芯和衬底压在一起，使得第一金层和一个或多个另外的材料层位于管芯和衬底之间，并且执行接合操作 在管芯和衬底之间形成管芯附着层。 管芯附着层包括金界面层，其包含金和金中的多个第一沉淀物。 每个第一沉淀物包括镍，钴，钯，金和硅的组合。
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公开(公告)号：US09111901B2
公开(公告)日：2015-08-18
申请号：US14287142
申请日：2014-05-26
IPC分类号： H01L21/302 , H01L21/461 , H01L23/373 , H01L23/057 , H01L23/00
CPC分类号： H01L23/373 , H01L23/057 , H01L23/3731 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/83 , H01L2224/29144 , H01L2224/2919 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/838 , H01L2224/83805 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/0489 , H01L2924/0665 , H01L2924/10253 , H01L2924/00 , H01L2924/01014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Embodiments of methods for forming a semiconductor device that includes a die and a substrate include pressing together the die and the substrate such that a first gold layer and one or more additional material layers are between the die and the substrate, and performing a bonding operation to form a die attach layer between the die and the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
摘要翻译： 用于形成包括管芯和衬底的半导体器件的方法的实施例包括将管芯和衬底压在一起，使得第一金层和一个或多个另外的材料层位于管芯和衬底之间，并且执行接合操作 在管芯和衬底之间形成管芯附着层。 管芯附着层包括金界面层，其包含金和金中的多个第一沉淀物。 每个第一沉淀物包括镍，钴，钯，金和硅的组合。
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7.发明申请SEMICONDUCTOR DEVICES THAT INCLUDE A DIE BONDED TO A SUBSTRATE WITH A GOLD INTERFACE LAYER 有权包含与金界面层的基板连接的芯片的半导体器件公开(公告)号：US20140252586A1
公开(公告)日：2014-09-11
申请号：US14287141
申请日：2014-05-26
IPC分类号： H01L23/373 , H01L23/00
CPC分类号： H01L23/373 , H01L23/057 , H01L23/3731 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/83 , H01L2224/29144 , H01L2224/2919 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/838 , H01L2224/83805 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/0489 , H01L2924/0665 , H01L2924/10253 , H01L2924/00 , H01L2924/01014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Embodiments of a semiconductor device include a primary portion of a substrate, a die, and a die attach layer between the die and the primary portion of the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
摘要翻译： 半导体器件的实施例包括基板的主要部分，管芯和管芯与基板的主要部分之间的管芯附着层。 管芯附着层包括金界面层，其包含金和金中的多个第一沉淀物。 每个第一沉淀物包括镍，钴，钯，金和硅的组合。
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公开(公告)号：US20110163439A1
公开(公告)日：2011-07-07
申请号：US12683961
申请日：2010-01-07
CPC分类号： H01L23/373 , H01L23/057 , H01L23/3731 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/83 , H01L2224/29144 , H01L2224/2919 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/838 , H01L2224/83805 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/0489 , H01L2924/0665 , H01L2924/10253 , H01L2924/00 , H01L2924/01014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method includes providing a silicon-containing die and providing a heat sink having a palladium layer over a first surface of the heat sink. A first gold layer is located over one of a first surface of the die or the palladium layer. The silicon-containing die is bonded to the heat sink, where bonding includes joining the silicon-containing die and the heat sink such that the first gold layer and the palladium layer are between the first surface of the silicon-containing die and the first surface of the heat sink, and heating the first gold layer and the palladium layer to form a die attach layer between the first surface of the silicon-containing die and the first surface of the heat sink, the die attach layer comprising a gold interface layer having a plurality of intermetallic precipitates, each of the plurality of intermetallic precipitates comprising palladium, gold, and silicon.
摘要翻译： 一种方法包括提供含硅模头并且在散热器的第一表面上提供具有钯层的散热器。 第一金层位于管芯的第一表面或钯层之一上。 所述含硅芯片与所述散热器接合，其中，所述接合包括将所述含硅芯片与所述散热器接合，使得所述第一金层和所述钯层位于所述含硅模具的所述第一表面和所述第一表面之间 并且加热所述第一金层和所述钯层以在所述含硅芯片的所述第一表面和所述散热器的所述第一表面之间形成管芯附着层，所述管芯附着层包括金界面层，所述金界面层具有 多个金属间化合物沉淀物，多个金属间析出物中的每一个包括钯，金和硅。
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