公开(公告)号：US07209725B1

公开(公告)日：2007-04-24

申请号：US09476092

申请日：2000-01-03

Applicant: David F. Sorrells ,  Michael J. Bultman ,  Charles D. Clements ,  Robert W. Cook ,  Joseph M. Hamilla ,  Richard C. Looke ,  Charley D. Moses, Jr. ,  Gregory S. Silver

Inventor： David F. Sorrells ,  Michael J. Bultman ,  Charles D. Clements ,  Robert W. Cook ,  Joseph M. Hamilla ,  Richard C. Looke ,  Charley D. Moses, Jr. ,  Gregory S. Silver

IPC: H04B1/28 ,  H04L12/56 ,  H03K9/00

CPC classification number: H04B1/16 ,  H03D3/001 ,  H03D7/125 ,  H04B1/26 ,  H04L27/14

Abstract: A method and system for directly down-converting FM signals to demodulated baseband information signals that can be used to directly down-convert analog FM signals and digital FM signals to demodulated baseband information signals. In an embodiment, the method includes aliasing an FM signal at an aliasing rate substantially equal to the frequency of the FM signal or substantially equal to a sub-harmonic thereof; adjusting the aliasing rate in accordance with frequency changes on the FM signal to maintain the aliasing rate substantially equal to the frequency of the FM signal, and outputting a demodulated baseband information signal. The method optionally includes compensating for phase delays and/or other characteristics of the loop in order to maintain bandwidth and stability for the loop.

Abstract translation: 一种用于将FM信号直接降频转换为可用于将模拟FM信号和数字FM信号直接降频到解调的基带信息信号的解调基带信息信号的方法和系统。 在一个实施例中，该方法包括以基本上等于FM信号的频率或基本上等于其次谐波的混叠速率对FM信号进行混叠; 根据FM信号的频率变化调整混叠速率，以使混叠速率维持在与FM信号频率基本相等的程度，并输出解调的基带信息信号。 该方法可选地包括补偿环路的相位延迟和/或其他特性，以便保持环路的带宽和稳定性。

公开(公告)号：US5302910A

公开(公告)日：1994-04-12

申请号：US995035

申请日：1992-12-22

Applicant: Hiroshi Kondo ,  Isao Fukai

Inventor： Hiroshi Kondo ,  Isao Fukai

IPC: H03D3/06 ,  H03D3/00 ,  H03D3/14 ,  H03D3/22

CPC classification number: H03D3/22 ,  H03D2200/0049 ,  H03D2200/0082 ,  H03D3/001 ,  H03D3/14

Abstract: In an FM detector circuit, a phase-shifting circuit is constituted by integrating circuits each consisting of a transconductance amplifier and capacitor. The phase-shifting circuit being arranged to cause limiter signal to be phase-shifted by 90 degrees at center frequency. A multiplying circuit is provided which is arranged to be provided with said limiter signal and output of said phase-shifting circuit, thereby effecting phase-detection of said limiter signal. Further, an error amplifier is provided which is supplied with a smoothed version of detection output derived from said multiplying circuit. The arrangement is made such that output of the error amplifier is applied to the transconductance amplifiers constituting said phase-shifting circuit.

Abstract translation: 在FM检波电路中，由跨导放大器和电容器组成的积分电路构成移相电路。 所述移相电路被布置成使得限幅信号在中心频率相移90度。 提供一个乘法电路，其布置成具有所述限幅器信号和所述移相电路的输出，从而进行所述限幅器信号的相位检测。 此外，提供了一个误差放大器，其被提供有从所述乘法电路得到的检测输出的平滑版本。 使得误差放大器的输出被施加到构成所述移相电路的跨导放大器的布置。

公开(公告)号：US4642490A

公开(公告)日：1987-02-10

申请号：US679873

申请日：1984-12-10

Applicant: Rodney J. Lawton

Inventor： Rodney J. Lawton

IPC: H03C3/04 ,  H03D3/00 ,  H03K5/08 ,  G06G7/16

CPC classification number: H03D3/00 ,  H03D3/001

Abstract: An arrangement for suppressing amplitude variation in FM signals comprises a frequency divider which frequency divides an incoming FM signal to provide frequency divided signals having two discrete levels dependent upon the amplitude of the incoming FM signal in relation to a threshold value, and a frequency multiplier which combines the frequency divided signal to provide an output signal of substantially constant amplitude and having a frequency equal to that of the incoming signal.

Abstract translation: 用于抑制FM信号中的振幅变化的装置包括一个分频器，该频分频器对输入的FM信号进行分频，以提供取决于输入的FM信号相对于阈值的振幅的具有两个离散电平的分频信号;以及频率乘法器 组合分频信号以提供基本恒定幅度的输出信号，其频率等于输入信号的频率。

公开(公告)号：US3509457A

公开(公告)日：1970-04-28

申请号：US3509457D

申请日：1962-12-20

Applicant: ROBERT W LANDEE

Inventor： LANDEE ROBERT W

IPC: H03D3/00 ,  G01R23/12

CPC classification number: H03D3/001

公开(公告)号：US09143087B2

公开(公告)日：2015-09-22

申请号：US14083900

申请日：2013-11-19

Applicant: QUALCOMM Incorporated

Inventor： Eunmo Kang ,  Le Nguyen Luong ,  Yossef Tsfaty

IPC: H03D3/00 ,  H04L27/14 ,  H04L27/148 ,  H04L27/152 ,  H04B1/16

CPC classification number: H03D3/006 ,  H03D3/00 ,  H03D3/001 ,  H03D2200/0045 ,  H03D2200/0054 ,  H04B1/1646 ,  H04L27/14 ,  H04L27/148 ,  H04L27/152

Abstract: Methods, systems, and devices are described for an adaptive demodulator that supports multiple modes. An FM signal may be received at a demodulator and parameters corresponding to the FM signal may be identified. Connections between multiple modules within the demodulator may be configured, based at least in part on the parameters, to select one of multiple demodulation modes supported by the demodulator to demodulate the FM signal. The modes may include a phase differencing mode, a phase-locked loop (PLL) mode, a frequency-compressive feedback (FCF) mode, and/or a quadrature detector mode. The parameters may include one or both of a signal strength of the FM signal and a maximum frequency deviation of the FM signal. Based on the parameters, one or more signals may be generated to configure the connections within the demodulator. A switch from one mode to another may occur when one of the parameters breaches a threshold value.

Abstract translation: 为支持多种模式的自适应解调器描述了方法，系统和设备。 可以在解调器处接收FM信号，并且可以识别与FM信号对应的参数。 至少部分地基于参数，解调器内的多个模块之间的连接可以被配置为选择由解调器支持的多个解调模式之一以解调FM信号。 这些模式可以包括相位差分模式，锁相环（PLL）模式，频率 - 压缩反馈（FCF）模式和/或正交检测器模式。 参数可以包括FM信号的信号强度和FM信号的最大频率偏差中的一个或两个。 基于这些参数，可以生成一个或多个信号来配置解调器内的连接。 当其中一个参数违反阈值时，可能会发生从一种模式切换到另一种模式的切换。

公开(公告)号：US07035349B2

公开(公告)日：2006-04-25

申请号：US10061302

申请日：2002-02-04

Applicant: Akira Yoshida ,  Akira Horikawa ,  Shuichi Matsumoto

Inventor： Akira Yoshida ,  Akira Horikawa ,  Shuichi Matsumoto

IPC: H03K3/00 ,  H03K5/13

CPC classification number: H03D3/001 ,  H03F3/45973

Abstract: A signal compensation circuit compensates for direct-current offset of an input signal by amplifying the input signal with an amplifier having a variable direct-current offset. A low-speed negative feedback loop charges and discharges a capacitor in an integrating circuit according to the direct-current component of the amplified signal. A high-speed negative feedback loop charges and discharges the same capacitor at a faster rate when the amplified signal goes outside an allowable amplitude range. The capacitor potential is used to control the direct-current offset of the amplifier. The allowable amplitude range is adjusted according to the amplitude of the amplified signal. High-speed compensation can thus be combined with a tolerance for runs of identical code levels in the input signal.

公开(公告)号：US06977545B2

公开(公告)日：2005-12-20

申请号：US10808472

申请日：2004-03-25

Applicant: Shinji Amano ,  Yusuke Kishino

Inventor： Shinji Amano ,  Yusuke Kishino

IPC: H03D3/00 ,  H04B1/16 ,  H04B1/38 ,  H04L27/14 ,  H03K9/06

CPC classification number: H04W88/02 ,  H03D3/001 ,  H04B1/3805 ,  H04L27/14 ,  H04W84/18

Abstract: An FM signal receiver for use in receiving a burst signals as in a Bluetooth system includes a BPF and a frequency-demodulation circuit, each having, for example, a phase shifter, which is constructed from similar or related circuitry so as to enable adjustment of the frequency characteristics of the BPF and frequency-demodulation circuit through an identical control signal. A short-circuit switch is disposed linking the input and output terminals of an amplifier. A control circuit opens the switch in a receiving operation and closes the switch in an adjusting operation. Thus, adjustment is carried out without using the amplifier. Therefore, an amplifier offset does not affect the frequency-to-voltage conversion by the frequency-demodulation circuit in the adjusting of the frequency-demodulation circuit and similar adjusting of the BPF. Thus, the BPF is prevented from being incorrectly adjusted due to the offset. The BPF characteristics are suitably adjusted.

Abstract translation: 用于接收蓝牙系统中的突发信号的FM信号接收机包括一个BPF和一个频率解调电路，每个具有例如相移或相关电路构成的移相器，以便能够调整 BPF和频率解调电路的频率特性通过相同的控制信号。 布置了将放大器的输入和输出端连接起来的短路开关。 控制电路在接收操作中打开开关，并在调整操作中关闭开关。 因此，不使用放大器进行调整。 因此，在频率解调电路的调整和BPF的类似调整中，放大器偏置不会影响频率解调电路的频率 - 电压转换。 因此，防止BPF由于偏移而被错误地调整。 适当调整BPF特性。

公开(公告)号：US20020130698A1

公开(公告)日：2002-09-19

申请号：US10061302

申请日：2002-02-04

Inventor： Akira Yoshida ,  Akira Horikawa ,  Shuichi Matsumoto

IPC: G06G007/12

CPC classification number: H03D3/001 ,  H03F3/45973

Abstract: A signal compensation circuit compensates for direct-current offset of an input signal by amplifying the input signal with an amplifier having a variable direct-current offset. A low-speed negative feedback loop charges and discharges a capacitor in an integrating circuit according to the direct-current component of the amplified signal. A high-speed negative feedback loop charges and discharges the same capacitor at a faster rate when the amplified signal goes outside an allowable amplitude range. The capacitor potential is used to control the direct-current offset of the amplifier. The allowable amplitude range is adjusted according to the amplitude of the amplified signal. High-speed compensation can thus be combined with a tolerance for runs of identical code levels in the input signal.

Abstract translation: 信号补偿电路通过用具有可变直流偏移的放大器放大输入信号来补偿输入信号的直流偏移。 低速负反馈环路根据放大信号的直流分量对积分电路中的电容器进行充放电。 当放大的信号超出允许的幅度范围时，高速负反馈环路以更快的速率对相同的电容器进行充电和放电。 电容器电位用于控制放大器的直流偏移。 允许的幅度范围根据放大信号的幅度进行调整。 因此，高速补偿可以与输入信号中相同代码电平运行的公差相结合。

公开(公告)号：US3979679A

公开(公告)日：1976-09-07

申请号：US591533

申请日：1975-06-30

Applicant: John A. Bush ,  Drew R. Lance ,  John E. Altstatt

Inventor： John A. Bush ,  Drew R. Lance ,  John E. Altstatt

IPC: H03D3/00 ,  H03G3/34 ,  H04B1/10

CPC classification number: H03G3/344 ,  H03D3/001 ,  H04B1/10

Abstract: An improved squelch circuit for FM demodulators including a low pass filter for filtering out-of-band noise from the demodulator output signals, a delay line for time delaying the filtered signals, a gate for selectively passing the filtered demodulated output signals to an output terminal, and a control circuit for controlling the gate. The control circuit includes a high pass filter for passing the out-of-band noise in the demodulated signals, a detector for detecting the noise level of the noise passed by the high pass filter, and a comparator for comparing the detected out-of-band noise level to a reference to develop a gate control signal which causes the gate to be opened when the out-of-band noise level is relatively low and to be closed when the out-of-band noise level is relatively high.

Abstract translation: 一种用于FM解调器的改进的静噪电路，包括用于从解调器输出信号滤除带外噪声的低通滤波器，用于时间延迟滤波后的信号的延迟线，用于选择性地将滤波后的解调输出信号传送到输出端 ，以及用于控制栅极的控制电路。 控制电路包括用于在解调信号中传递带外噪声的高通滤波器，用于检测由高通滤波器通过的噪声的噪声电平的检测器，以及比较器， 带噪声电平作为参考，以产生门控制信号，当门带噪声电平相对较低时导致门断开，并且当带外噪声电平相对较高时闭合。

公开(公告)号：US3832638A

公开(公告)日：1974-08-27

申请号：US30668272

申请日：1972-11-15

Applicant: HITACHI LTD

Inventor： OHASHI S ,  FUKUSHIMA I

IPC: H04B1/16 ,  H03D3/00 ,  H03D3/10 ,  H03G11/04 ,  H03G11/06 ,  H03J3/14 ,  H03J7/04

CPC classification number: H03J7/045 ,  H03D3/001 ,  H03G11/06

Abstract: An output control device for use in FM receivers comprises a low-pass filter for deriving only the d-c component from the output of a frequency discriminator, and a rectifier circuit for full-wave rectifying the output of the low-pass filter. The output of the rectifier circuit is applied to the amplitude limiter which is connected to the input circuit of the frequency discriminator, to cause the amplitude limiting level of the amplitude limiter to be changed, thereby minimizing the nonlinear distortion developed in the frequency discriminator due to the deviation in the tuning of the FM receiver.

Abstract translation: 用于FM接收机的输出控制装置包括用于仅从鉴频器的输出中导出d-c分量的低通滤波器和用于全波整流低通滤波器的输出的整流电路。 整流电路的输出被施加到与频率鉴别器的输入电路连接的幅度限制器，以使幅度限制器的幅度限制电平发生变化，从而最小化频率鉴别器中产生的非线性失真 由于FM接收机的调谐偏差。