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公开(公告)号:US20170230019A1
公开(公告)日:2017-08-10
申请号:US15515562
申请日:2015-09-30
CPC分类号: H03F3/45475 , A61B5/04004 , A61B5/7203 , A61B5/7207 , A61B5/7225 , A61B5/725 , H03F3/387 , H03F3/45744 , H03F2200/168 , H03F2200/261 , H03F2200/459 , H03F2203/45 , H03F2203/45514 , H03M1/48
摘要: A high dynamic range sensing front-end for bio-signal recording systems in accordance with embodiments of the invention are disclosed. In one embodiment, a bio-signal amplifier includes an input signal, where the input signal is modulated to a predetermined chopping frequency, a first amplifier stage, a parallel-RC circuit connected to the first amplifier stage and configured to generate a parallel-RC circuit output by selectively blocking an offset current, a second amplifier stage connected to the parallel-RC circuit that includes a second input configured to receive the parallel-RC circuit output and generate a second output that is an amplified version of the input signal with ripple-rejection. Further, the bio-signal amplifier can also include an auxiliary path configured for boosting input impedance by pre-charging at least one input capacitor. In addition, the bio-signal amplifier can also include a DC-servo feedback loop that includes an integrator that utilizes a duty-cycled resistor.
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公开(公告)号:US20190068148A1
公开(公告)日:2019-02-28
申请号:US16100271
申请日:2018-08-10
申请人: FUJITSU LIMITED
发明人: Kazuaki Oishi
CPC分类号: H03G1/0029 , H03F1/3211 , H03F3/45179 , H03F3/45192 , H03F3/45197 , H03F3/45273 , H03F3/45475 , H03F3/45659 , H03F2200/171 , H03F2203/45 , H03F2203/45138 , H03F2203/45512 , H03F2203/45521
摘要: An OTA circuit includes a first input stage that includes a first pair of transistors having sources coupled to a reference potential and converts a differential input voltage input to gates of the first pair of transistors into a first control current, a second input stage that includes a second pair of transistors having sources coupled to the reference potential and converts the differential input voltage input to gates of the second pair of transistors into a second control current, a first output circuit that generates one output current out of the differential output currents in accordance with the first control current, and a second output circuit that generates the other output current out of the differential output currents in accordance with the second control current.
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公开(公告)号:US20180173261A1
公开(公告)日:2018-06-21
申请号:US15736765
申请日:2016-06-16
发明人: Hans Ola DAHL
CPC分类号: G05F1/575 , G05F1/468 , G05F1/565 , G05F3/262 , H03F3/345 , H03F3/45179 , H03F2203/45
摘要: A low-dropout voltage regulator (2) comprises: a differential amplifier portion (4) including a first amplifier input connected to a reference voltage (16), a second amplifier input, and a differential output which is determined by a difference between the reference voltage and a voltage on the second amplifier input; an output portion (10) arranged to provide a regulator output voltage (62) which is controlled by the differential output of the amplifier portion, the second amplifier input being connected to or derived from (70) the regulator output voltage; and a biasing portion (8) arranged to measure an external load current and to provide a biasing current to the differential amplifier portion which depends on the load current.
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公开(公告)号:US20230402980A1
公开(公告)日:2023-12-14
申请号:US17827293
申请日:2022-05-27
发明人: Gaetano Cosentino
CPC分类号: H03F3/45179 , H04B1/16 , H03F2200/69 , H03F3/72 , H03F2203/45 , H03F3/4508
摘要: In an embodiment, a differential buffer includes: first and second input terminals configured to receive a differential input voltage; first and second output terminals configured to provide a differential output voltage; a differential source follower amplifier having first and second inputs respectively coupled to the first and second input terminals, and first and second outputs respectively coupled to the first and second output terminals; and a differential common source amplifier having first and second inputs respectively coupled to the second and first output terminals via a first pair of capacitors, and first and second outputs respectively coupled to the first and second output terminals.
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公开(公告)号:US11652457B2
公开(公告)日:2023-05-16
申请号:US17362276
申请日:2021-06-29
发明人: Sandor Petenyi
CPC分类号: H03F3/45179 , H03F1/0205 , H03F1/301 , H03F2200/78 , H03F2203/45
摘要: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.
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