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11 条记录 (耗时 0.011 秒)

    Control circuit driven by a differential input voltage and method for controlling same
    1.
    发明授权
    Control circuit driven by a differential input voltage and method for controlling same 有权
    由差分输入电压驱动的控制电路及其控制方法

    公开(公告)号：US06184750B2

    公开(公告)日：2001-02-06

    申请号：US09321064

    申请日：1999-05-27

    申请人： Thomas A. Somerville

    发明人： Thomas A. Somerville

    IPC分类号： H03F345

    CPC分类号： H03F3/45107 ,  H03F1/307 ,  H03F1/38 ,  H03F3/3067 ,  H03F2203/45648 ,  H03F2203/45676

    摘要： The present invention teaches a variety of output stages for amplifying high speed signals while keeping distortion low and using a low supply voltage. The invention includes the use of dual complementary signal paths that include a complementary push-pull output stage. Bias circuits are used to keep the paths symmetrical and positive feedback is used to oppose output loading effects.

    摘要翻译： 本发明教导了用于放大高速信号同时保持低失真并使用低电源电压的各种输出级。 本发明包括使用包括互补推挽输出级的双重互补信号路径。 偏置电路用于保持路径对称，并使用正反馈来对抗输出负载效应。

    n-bit analog-to-digital converter with n-1 magnitude amplifiers and n comparators
    2.
    发明授权
    n-bit analog-to-digital converter with n-1 magnitude amplifiers and n comparators 失效
    具有n-1幅度放大器和n个比较器的n位模数转换器

    公开(公告)号：US5684419A

    公开(公告)日：1997-11-04

    申请号：US347909

    申请日：1994-12-01

    申请人： Frank Murden ,  Carl W. Moreland

    发明人： Frank Murden ,  Carl W. Moreland

    IPC分类号： H03F3/26 ,  H03F3/45 ,  H03M1/44 ,  H03M1/12 ,  H03M1/46

    CPC分类号： H03F3/26 ,  H03F3/45103 ,  H03F3/45107 ,  H03M1/445 ,  H03F2203/45302 ,  H03F2203/45311 ,  H03F2203/45318 ,  H03F2203/45352 ,  H03F2203/45371 ,  H03F2203/45702 ,  H03F2203/45722

    摘要： A serial-type A/D converter uses magnitude amplifiers("magamps") and comparators for effecting the conversion of analog signals to Gray scale code signals that are then converted to binary digital signals by a Gray scale code-to-binary portion of the serial-type A/D converter. More specifically, a serial-type A/D converter uses an n-bit converter that has n-1 magamps and n-comparators. The n-1 magamps are cascaded such that the V.sub.OL and V.sub.OH outputs of a stage are the inputs to the next stage. The output of the comparators are input to the Gray scale code-to-binary portion of the serial A/D converter. The latching of the comparators occurs outside of the magamps. This allows for the parallel latching of the n comparators. The speed of the serial-type A/D converter is determined by the bandwidth of the magamps. The serial-type A/D converter includes an offset method that significantly reduces the effects of early voltage, V.sub.A, on the output waveforms. Each stage of the serial-type A/D converter may have any desired gain and not limited to a particular gain.

    摘要翻译： 串行型A / D转换器使用幅度放大器（“magamps”）和比较器来实现将模拟信号转换为灰度代码信号，然后将其转换为二进制数字信号，通过灰度代码对二进制部分 串行型A / D转换器。 更具体地，串行型A / D转换器使用具有n-1个magamp和n比较器的n位转换器。 级联的n-1型卡子使得一级的VOL和VOH输出是下一级的输入。 比较器的输出被输入到串行A / D转换器的灰度代码到二进制部分。 比较器的锁存发生在卡盘之外。 这允许n个比较器的并联闭锁。 串行型A / D转换器的速度由卡盘的带宽决定。 串行型A / D转换器包括一种偏移方法，可显着降低早期电压VA对输出波形的影响。 串行型A / D转换器的每个级可以具有任何期望的增益，而不限于特定的增益。

    Distortion improvement in amplifiers
    7.
    发明授权
    Distortion improvement in amplifiers 失效
    放大器失真改善

    公开(公告)号：US06448853B1

    公开(公告)日：2002-09-10

    申请号：US09829326

    申请日：2001-04-09

    申请人： Barry Harvey

    发明人： Barry Harvey

    IPC分类号： H03F345

    CPC分类号： H03F1/083 ,  H03F1/3211 ,  H03F1/34 ,  H03F3/45107 ,  H03F2203/45028 ,  H03F2203/45122 ,  H03F2203/45631 ,  H03F2203/45674 ,  H03F2203/45696

    摘要： An improved amplifier includes an input stage differential amplifier (100) with an output forming a gain node (102), an output stage buffer (104) having an input connected to the gain node (102), a compensation capacitor (106) connected from the gain node (102) to ground, and a correction amplifier (200) with a first input connected to the output of the output stage buffer (104), a second input connected to the input of the output stage buffer (104), and having an output connected to the gain node (102), the correction amplifier further including a correction capacitor (304) connected between the input and output of the output stage buffer (104). The correction capacitor (304) preferably has a capacitance value (C′) set equal to the capacitance (Ccomp) of the compensation capacitor (106).

    摘要翻译： 改进的放大器包括具有形成增益节点（102）的输出的输入级差分放大器（100），具有连接到增益节点（102）的输入端的输出级缓冲器（104），补偿电容器 以及具有连接到输出级缓冲器（104）的输出的第一输入的校正放大器（200），连接到输出级缓冲器（104）的输入端的第二输入端，以及 具有连接到增益节点（102）的输出，所述校正放大器还包括连接在所述输出级缓冲器（104）的输入和输出端之间的校正电容器（304）。 校正电容器（304）优选地具有设定为等于补偿电容器（106）的电容（Ccomp）的电容值（C'）。

    Tunable operational transcondunctance amplifier having high linearity
    8.
    发明授权
    Tunable operational transcondunctance amplifier having high linearity 失效
    具有高线性度的可调式运算倍增放大器

    公开(公告)号：US5465072A

    公开(公告)日：1995-11-07

    申请号：US286526

    申请日：1994-08-05

    申请人： Mojtaba Atarodi

    发明人： Mojtaba Atarodi

    IPC分类号： H03F3/30 ,  H03F3/45 ,  H03G1/00 ,  H03G3/30

    CPC分类号： H03F3/4521 ,  H03F3/3008 ,  H03F3/45107 ,  H03F3/45291 ,  H03F3/45304 ,  H03F3/45802 ,  H03G1/0023 ,  H03F2203/45304 ,  H03F2203/45366 ,  H03F2203/45458

    摘要： An amplifier capable of being tuned to provide linear gain over a selected input signal range is disclosed herein. The amplifier includes an input stage for receiving an input signal. The amplifier further includes a tuning circuit, connected between the input stage and an amplifier output stage, for controlling gain of the amplifier by adjusting a tuning current supplied to the amplifier output stage. The tuning circuit may be realized with a differential transistor pair connected to a pair of transistors within the output stage. In a preferred implementation the input and output stages are arranged in a folded-cascode configuration so as to improve the output impedance and input common-mode signal range of the amplifier.

    摘要翻译： 本文公开了一种能够调谐以在所选输入信号范围上提供线性增益的放大器。 放大器包括用于接收输入信号的输入级。 放大器还包括连接在输入级和放大器输出级之间的调谐电路，用于通过调节提供给放大器输出级的调谐电流来控制放大器的增益。 调谐电路可以通过连接到输出级内的一对晶体管的差分晶体管对来实现。 在优选实施例中，输入和输出级以折叠共源共栅配置布置，以便改善放大器的输出阻抗和输入共模信号范围。