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    Minimum break/make pulse corrector
    1.
    发明授权
    Minimum break/make pulse corrector 失效
    最小断点/制动脉冲校正器

    公开(公告)号：US4223184A

    公开(公告)日：1980-09-16

    申请号：US954180

    申请日：1978-10-24

    Applicant: John L. Gilmer ,  Joseph F. Rizzo

    Inventor： John L. Gilmer ,  Joseph F. Rizzo

    IPC: H03K5/04 ,  H04Q1/36

    CPC classification number: H04Q1/36

    Abstract: Pulse signals, for example, dial pulses, wink signals or the like, have been corrected to have minimum break and make intervals by employing at least two analog resistor/capacitor type timers, usually connected in tandem. These prior timer arrangements are not readily implemented by employing large-scale integration because of their use of analog circuit components. Indeed, it is desirable to correct pulse signals to have at least minimum break and make intervals (FIG. 2) by employing digital techniques. To this end, a control signal (ENO) for determining the minimum break and make intervals is generated by utilizing a single digital counter (35) and associated logic for controllably supplying first (Y15) and second (Y30) timing signals (from 34) to the counter (36). The frequencies of the first and the second timing signals are selected in relationship to the desired minimum break and make intervals, respectively. An output control circuit (12 or 11 and 12) is jointly responsive to the control signal (ENO) and first (OPR) and second (REL) input signals representative of first and second states, respectively, of a supplied pulse signal for generating a corrected pulse signal (H) having the desired minimum break and make intervals. The control signal inhibits (via 15 and 16) response of the output control circuit (12) to the input signals (OPR and REL) for the desired minimum break and make intervals. Additionally, the supplying (via 20) of the timing signals to the counter (36) is inhibited (by H and H) after each count cycle until there is a change in state of the output signals (H and H) from the output control circuit (12).

    Abstract translation: 脉冲信号，例如拨号脉冲，闪烁信号等已被校正为具有最小间隔并且通过采用通常串联连接的至少两个模拟电阻器/电容器型定时器来产生间隔。 由于使用模拟电路部件，因此通过采用大规模集成不容易实现这些先前的定时器布置。 实际上，期望通过采用数字技术来校正脉冲信号以具有至少最小间隔和产生间隔（图2）。 为此，通过利用单个数字计数器（35）和相关联的逻辑来产生用于确定最小间隔和产生间隔的控制信号（ENO），用于可控地提供第一（Y15）和第二（Y30）定时信号（从34） 到柜台（36）。 第一和第二定时信号的频率分别与期望的最小间隔和制作间隔相关地选择。 输出控制电路（12或11和12）分别对表示所提供的脉冲信号的第一和第二状态的控制信号（ENO）和第一（OPR）和第二（REL）输入信号进行共同响应， 校正脉冲信号（H）具有所需的最小间隔并产生间隔。 控制信号禁止输出控制电路（12）对输入信号（OPR和REL）（期望的最小间隔）的响应（通过15和16）并产生间隔。 此外，在每个计数周期之后，禁止向定时器（36）提供定时信号（通过20）（由H和H），直到来自输出控制器的输出信号（H和H）的状态发生变化 电路（12）。

    Ringing signal detector
    2.
    发明授权
    Ringing signal detector 失效
    振铃信号检测器

    公开(公告)号：US4184053A

    公开(公告)日：1980-01-15

    申请号：US876414

    申请日：1978-02-09

    Applicant: Norio Saneyoshi

    Inventor： Norio Saneyoshi

    IPC: H04M11/06 ,  H04M1/64 ,  H04M1/654 ,  H04M11/00 ,  H04Q1/36 ,  H04M1/26

    CPC classification number: H04M1/654 ,  H04Q1/36

    Abstract: A ringing signal detector, which comprises a series diode clipper automatically biased by an input signal, a DC converter for converting the output of the series diode clipper to a DC level, a DC level detector for detecting the converted DC level to detect whether the input signal is a ringing signal or a dial pulse signal, thereby generating an output only when the input signal is the ringing signal.

    Abstract translation: 振铃信号检测器，其包括由输入信号自动偏置的串联二极管限幅器，用于将串联二极管截止器的输出转换为DC电平的DC转换器; DC电平检测器，用于检测转换的DC电平以检测输入 信号是振铃信号或拨号脉冲信号，从而仅在输入信号为振铃信号时产生输出。

    Digitally operated signal regenerator and timing circuit
    3.
    发明授权
    Digitally operated signal regenerator and timing circuit 失效
    数字操作信号再生器和定时电路

    公开(公告)号：US3671875A

    公开(公告)日：1972-06-20

    申请号：US3671875D

    申请日：1971-05-20

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： PENTO FRANK LOUIS

    IPC: H03K5/135 ,  H03K5/156 ,  H04Q1/36 ,  H03K17/26

    CPC classification number: H03K5/156 ,  H03K5/135 ,  H04Q1/36

    Abstract: A digitally operated signal timing circuit employs a single synchronous up-down counter with overriding set and reset in combination with a group of flip-flops and logic gates. In effecting the regeneration of input pulses, such as the pulses produced by a telephone dial, a plurality of signal timing functions are provided by the combination indicated, which functions include the establishment of an operate threshold delay, a release delay, a minimum output pulse duration, a minimum duration interval between pulses and an idle condition holdover period.

    Abstract translation: 数字操作的信号定时电路采用单个同步递减计数器，与一组触发器和逻辑门组合，具有覆盖设置和复位。 为了实现诸如由电话拨号产生的脉冲的输入脉冲的再生，通过所指示的组合来提供多个信号定时功能，其功能包括建立操作阈值延迟，释放延迟，最小输出脉冲 持续时间，脉冲之间的最小持续时间间隔和空闲条件保持期。

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