公开(公告)号：US06858094B2

公开(公告)日：2005-02-22

申请号：US10380975

申请日：2001-09-14

申请人： Wei Feig Qu ,  Yoshinori Hayamizu ,  Hiroshi Takeno

发明人： Wei Feig Qu ,  Yoshinori Hayamizu ,  Hiroshi Takeno

IPC分类号： H01L21/208 ,  C30B33/00 ,  H01L21/322 ,  H01L21/324 ,  H01L29/06

CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/3225

摘要： The present invention provides a silicon wafer having a DZ layer near a surface and an oxide precipitate layer in a bulk portion, wherein interstitial oxygen concentrations of the DZ layer, the oxide precipitate layer and a transition region between the DZ layer and the oxide precipitate layer are all 8 ppma or less, and an epitaxial silicon wafer, wherein an epitaxial layer is formed on a surface of the silicon wafer, as well as a method for producing a silicon wafer, which comprises growing a silicon single crystal ingot having an initial interstitial oxygen concentration of 10 to 25 ppma by the Czochralski method, processing the silicon single crystal ingot into a wafer, and subjecting the wafer to a first heat treatment at 950 to 1050° C. for 2 to 5 hours, a second heat treatment at 450 to 550° C. for 4 to 10 hours, a third heat treatment at 750 to 850° C. for 2 to 8 hours, and a fourth heat treatment at 950 to 1100° C. for 8 to 24 hours. Thus, there is provided a method for producing a silicon wafer of which high resistivity can surely be maintained even when the wafer is subjected to a heat treatment for device production.

摘要翻译： 本发明提供了一种在大部分表面附近具有DZ层和在本体部分中的氧化物沉淀层的硅晶片，其中DZ层的间隙氧浓度，氧化物沉淀层以及DZ层和氧化物沉淀层之间的过渡区域 全部为8ppma以下，外延硅晶片，其中在硅晶片的表面上形成外延层，以及制造硅晶片的方法，其包括生长具有初始间隙的硅单晶锭 氧浓度为10〜25ppma，将硅单晶锭加工成晶片，对晶片进行950〜1050℃的第一次热处理2〜5小时，在450℃进行第二次热处理 在550℃下进行4〜10小时，在750〜850℃下进行2〜8小时的第3次热处理，在950〜1100℃进行第4次热处理8〜24小时。 因此，提供了一种制造硅晶片的方法，其中即使当晶片经受用于器件生产的热处理时，也可以确保高电阻率。

公开(公告)号：US06548035B1

公开(公告)日：2003-04-15

申请号：US09868058

申请日：2001-06-14

申请人： Akihiro Kimura ,  Makoto Iida ,  Yoshinori Hayamizu ,  Ken Aihara ,  Masanori Kimura

发明人： Akihiro Kimura ,  Makoto Iida ,  Yoshinori Hayamizu ,  Ken Aihara ,  Masanori Kimura

IPC分类号： A01N4340

CPC分类号： C30B29/06 ,  C30B15/203 ,  C30B15/206 ,  H01L21/3225

摘要： A silicon single crystal wafer for epitaxial growth grown by the CZ method, which is doped with nitrogen and has a V-rich region over its entire plane, or doped with nitrogen, has an OSF region in its plane, and shows an LEP density of 20/cm2 or less or an OSF density of 1×104/cm2 or less in the OSF region, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer. There are provided a substrate for an epitaxial wafer that suppresses crystal defects to be generated in an epitaxial layer when epitaxial growth is performed on a CZ silicon single crystal wafer doped with nitrogen and also has superior IG ability, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer.

摘要翻译： 通过CZ法生长的用于外延生长的硅单晶晶片，其掺杂有氮并在其整个平面上具有富V区或掺杂氮，在其平面中具有OSF区，并且显示出LEP密度 在OSF区域中使用20 / cm 2以下的OSF密度或1×10 4 / cm 2以下的OSF密度，利用该基板的外延晶片及其制造方法以及评价适用于外延晶片的基板的方法。 提供了一种用于外延晶片的衬底，其抑制在掺杂氮的CZ硅单晶晶片上进行外延生长时外延层中产生的晶体缺陷，并且还具有优异的IG能力，以及利用衬底的外延晶片 作为其制造方法和评价适用于外延晶片的基板的方法。

公开(公告)号：US06277715B1

公开(公告)日：2001-08-21

申请号：US09321567

申请日：1999-05-28

申请人： Hiroshi Takeno ,  Yoshinori Hayamizu

发明人： Hiroshi Takeno ,  Yoshinori Hayamizu

IPC分类号： H01L2120

CPC分类号： H01L21/3225

摘要： Provided is a production method for a silicon epitaxial wafer having an internal gettering (IG) capability at a level equal to that of a CZ silicon mirror-finished wafer. In the production method for a silicon epitaxial wafer in which silicon single crystal is epitaxially grown on a silicon wafer; a heat treatment of the silicon wafer is performed at a temperature within ±50° C. of a holding temperature for the first stage heat treatment which is to be firstly effected as a heat treatment in the device fabrication process after the epitaxial growth process for a time period equal to or more than a time period in which a precipitate nucleus from interstitial oxygen in the silicon wafer can grow to a size which survives through the epitaxial growth process, prior to the epitaxial growth process, and thereafter, the epitaxial growth is effected; or a heat treatment of the silicon wafer is performed being kept at a temperature within ±50° C. of a holding temperature for the first stage heat treatment which is to be at first effected as a heat treatment in the device fabrication process after the epitaxial growth process for a time period equal to or more than a time period in which a precipitate nucleus from interstitial oxygen in the silicon wafer can grow to a size a nucleus of which survives through the epitaxial growth process, in the course of raising temperature after start of the epitaxial growth process, and thereafter, a temperature is raised to an epitaxial growth temperature to perform the epitaxial growth.

摘要翻译： 本发明提供一种具有内部吸气（IG）能力的硅外延晶片的制造方法，其水平等于CZ硅镜面抛光晶片的等级。 在其中硅单晶在硅晶片上外延生长的硅外延晶片的制造方法中， 硅晶片的热处理在用于第一阶段热处理的保持温度的±50℃的温度下进行，该第一阶段热处理首先在作为第一阶段热处理的外延生长工艺之后的器件制造工艺中进行热处理 时间段等于或大于在硅晶片内的间隙氧的沉淀核在其外延生长过程之前可以通过外延生长工艺生长至能够存活的尺寸的时间段，此后进行外延生长 ; 或将硅晶片的热处理保持在用于第一阶段热处理的保持温度的±50℃以内的温度，该温度首先在外延后的器件制造工艺中作为热处理而实现 生长过程等于或大于硅晶片中的间隙氧的沉淀核的生长时间，其时间可以通过外延生长过程在其起始温度升高的过程中通过外延生长过程而存活 的外延生长工艺，然后将温度升高到外延生长温度以进行外延生长。

公开(公告)号：US20100213516A1

公开(公告)日：2010-08-26

申请号：US12681576

申请日：2008-10-06

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tomoyuki Suwa ,  Rihito Kuroda ,  Hideo Kudo ,  Yoshinori Hayamizu

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tomoyuki Suwa ,  Rihito Kuroda ,  Hideo Kudo ,  Yoshinori Hayamizu

IPC分类号： H01L29/04 ,  H01L29/786

CPC分类号： H01L29/045 ,  H01L21/02381 ,  H01L21/02433 ,  H01L29/78

摘要： On a surface of a semiconductor substrate, a plurality of terraces formed stepwise by an atomic step are formed in the substantially same direction. Using the semiconductor substrate, a MOS transistor is formed so that no step exists in a carrier traveling direction (source-drain direction).

摘要翻译： 在半导体基板的表面上，以大致相同的方向形成有以原子台阶逐步形成的多个台阶。 使用半导体衬底，形成MOS晶体管，使得在载流子行进方向（源 - 漏方向）上不存在台阶。

公开(公告)号：US20060121291A1

公开(公告)日：2006-06-08

申请号：US11265129

申请日：2005-11-03

申请人： Yoshinori Hayamizu ,  Satoshi Tobe ,  Norihiro Kobayashi

发明人： Yoshinori Hayamizu ,  Satoshi Tobe ,  Norihiro Kobayashi

IPC分类号： B32B13/04 ,  H01L21/324

CPC分类号： H01L21/3225

摘要： There are provided a heat-treating method capable of suppressing generation of slip in a CZ silicon single crystal wafer having a diameter of mainly 300 mm or more even under high temperature heat treatment to annihilate grown-in defects in the vicinity of a surface of the wafer, and an annealed wafer having a DZ layer in a surface layer of the wafer and oxide precipitates in the bulk thereof at a high density which exert a high gettering effect. First heat treatment of a silicon single crystal wafer manufactured from a silicon single crystal ingot pulled by means of a Czochralski method is performed at a temperature in the range of 600 to 1100° C. to form oxide precipitates in the bulk of the wafer, and thereafter, second heat treatment is performed at a temperature in the range of 1150 to 1300° C.

摘要翻译： 提供了即使在高温热处理下也能够抑制直径为300mm以上的CZ硅单晶晶片中的滑动产生的热处理方法，以消除在表面附近的生长缺陷 晶片，并且在晶片的表面层中具有DZ层的退火晶片，其氧化物以其高密度析出，其发挥高吸杂效应。 在由600℃〜1100℃的温度范围内进行利用切克劳斯基法（Czochralski method）拉伸的硅单晶锭制造的硅单晶晶片的第一次热处理，以在晶片本体中形成氧化物析出物， 此后，在1150〜1300℃的温度下进行第二次热处理。

公开(公告)号：US6140131A

公开(公告)日：2000-10-31

申请号：US159434

申请日：1998-09-24

申请人： Ken Sunakawa ,  Kiichiro Asako ,  Toko Yagi ,  Yoshinori Hayamizu

发明人： Ken Sunakawa ,  Kiichiro Asako ,  Toko Yagi ,  Yoshinori Hayamizu

IPC分类号： G01N23/223 ,  G01N21/64

CPC分类号： G01N23/223 ,  G01N2223/076 ,  Y10T436/25375

摘要： The present invention is to provide a method and apparatus for detecting heavy metals within the bulk of a silicon wafer with high sensitivity. An electric field is applied to a surface of the silicon wafer in order to aggregate heavy metals existing within the bulk of the silicon wafer to the surface of the wafer or the vicinity thereof, and the heavy metals aggregated to the surface of the wafer or the vicinity of the surface are analyzed. The application of an electric field is performed through corona-discharge treatment of the surface of the wafer, or through application of voltage to the surface of the wafer via a contact or non-contact electrode. Alternatively, an x-ray beam is radiated onto the surface of the silicon wafer in order to aggregate heavy metals existing within the bulk of the silicon wafer to the surface of the wafer or the vicinity thereof, and the heavy metals aggregated to the surface of the wafer or the vicinity thereof are analyzed. The method and apparatus for detecting heavy metals are simple and do not require a pre-treatment such as heat treatment which would cause secondary contamination.

摘要翻译： 本发明提供一种高灵敏度地检测硅晶片本体内的重金属的方法和装置。 将电场施加到硅晶片的表面，以将存在于硅晶片本体内的重金属聚集到晶片或其附近的表面，并且将重金属聚集到晶片表面或 分析表面附近。 电场的施加通过对晶片表面的电晕放电处理，或者通过接触或非接触电极向晶片的表面施加电压来进行。 或者，将X射线束照射到硅晶片的表面上，以将存在于硅晶片本体内的重金属聚集到晶片表面或其附近，并将重金属聚集到 分析晶片或其附近。 用于检测重金属的方法和装置是简单的，并且不需要预处理，例如将导致二次污染的热处理。

公开(公告)号：US08492879B2

公开(公告)日：2013-07-23

申请号：US12681576

申请日：2008-10-06

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tomoyuki Suwa ,  Rihito Kuroda ,  Hideo Kudo ,  Yoshinori Hayamizu

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tomoyuki Suwa ,  Rihito Kuroda ,  Hideo Kudo ,  Yoshinori Hayamizu

IPC分类号： H01L29/04

CPC分类号： H01L29/045 ,  H01L21/02381 ,  H01L21/02433 ,  H01L29/78

摘要： On a surface of a semiconductor substrate, a plurality of terraces formed stepwise by an atomic step are formed in the substantially same direction. Using the semiconductor substrate, a MOS transistor is formed so that no step exists in a carrier traveling direction (source-drain direction).

摘要翻译： 在半导体基板的表面上，以大致相同的方向形成有以原子台阶逐步形成的多个台阶。 使用半导体衬底，形成MOS晶体管，使得在载流子行进方向（源 - 漏方向）上不存在台阶。

公开(公告)号：US20120001301A1

公开(公告)日：2012-01-05

申请号：US13255182

申请日：2010-03-17

申请人： Koji Ebara ,  Yoshinori Hayamizu ,  Hiroyasu Kikuchi

发明人： Koji Ebara ,  Yoshinori Hayamizu ,  Hiroyasu Kikuchi

IPC分类号： H01L29/30 ,  H01L21/322

CPC分类号： C30B29/06 ,  C30B33/02 ,  H01L21/3225

摘要： An annealed wafer obtained by performing rapid thermal annealing on a silicon single crystal wafer sliced from a silicon single crystal ingot in which an entire plane is an OSF region, an N region outside an OSF region, or a mixed region thereof, the silicon single crystal ingot being grown by the Czochralski method, in which RIE defects do not exist in a region having at least a depth of 1 μm from a surface, a good chip yield of a TDDB characteristic is 80% or more, and a depth of a region where an oxygen concentration is decreased due to outward diffusion is within 3 μm from the surface, and a method for producing an annealed wafer.

摘要翻译： 通过对从其中整个平面是OSF区域，OSF区域外部的N区域或其混合区域的硅单晶锭切片的硅单晶晶片进行快速热退火而获得的退火晶片，所述硅单晶 铸锭通过Czochralski法生长，其中在距离表面至少具有1μm深度的区域中不存在RIE缺陷，TDDB特性的良好的切屑产率为80％以上，区域的深度 其中由于向外扩散而导致的氧浓度降低在距表面3微米以内，以及退火晶片的制造方法。

公开(公告)号：US07081422B2

公开(公告)日：2006-07-25

申请号：US10220145

申请日：2001-12-11

申请人： Yoshinori Hayamizu ,  Satoshi Tobe ,  Norihiro Kobayashi

发明人： Yoshinori Hayamizu ,  Satoshi Tobe ,  Norihiro Kobayashi

IPC分类号： H01L21/26 ,  C30B15/00

CPC分类号： H01L21/3225

摘要： There are provided a heat-treating method capable of suppressing generation of slip in a CZ silicon single crystal wafer having a diameter of mainly 300 mm or more even under high temperature heat treatment to annihilate grown-in defects in the vicinity of a surface of the wafer, and an annealed wafer having a DZ layer in a surface layer of the wafer and oxide precipitates in the bulk thereof at a high density which exert a high gettering effect. First heat treatment of a silicon single crystal wafer manufactured from a silicon single crystal ingot pulled by means of a Czochralski method is performed at a temperature in the range of 600 to 1100° C. to form oxide precipitates in the bulk of the wafer, and thereafter, second heat treatment is performed at a temperature in the range of 1150 to 1300° C.

公开(公告)号：US06544656B1

公开(公告)日：2003-04-08

申请号：US09674841

申请日：2000-11-07

申请人： Takao Abe ,  Ken Aihara ,  Shoji Akiyama ,  Tetsuya Igarashi ,  Weifeng Qu ,  Yoshinori Hayamizu ,  Shigeru Saito

发明人： Takao Abe ,  Ken Aihara ,  Shoji Akiyama ,  Tetsuya Igarashi ,  Weifeng Qu ,  Yoshinori Hayamizu ,  Shigeru Saito

IPC分类号： C30B2906

CPC分类号： C30B29/06 ,  C30B15/00 ,  H01L21/3225 ,  Y10T428/21

摘要： A silicon wafer is produced by growing a silicon single crystal ingot having a resistivity of 100 &OHgr;·cm or more and an initial interstitial oxygen concentration of 10 to 25 ppma by the Czochralski method, processing the silicon single crystal ingot into a wafer, and subjecting the wafer to an oxygen precipitation heat treatment so that a residual interstitial oxygen concentration in the wafer should become 8 ppma or less. A silicon wafer produced as described above shows little decrease in resistivity even after a heat treatment in device production etc. Further, if a silicon wafer is produced and heat-treated so that the wafer should have the above-defined initial interstitial oxygen concentration and residual interstitial oxygen concentration, slip dislocations in a subsequent heat treatment process are prevented irrespective of resistivity. Furthermore, by forming an epitaxial layer on a surface of a silicon wafer of the present invention, a high resistivity epitaxial wafer can be produced, which is free from slip dislocations etc. and can be used for various devices.

摘要翻译： 通过使用Czochralski法生长电阻率为100欧姆·厘米或更高的初始间隙氧浓度为10〜25ppma的硅单晶锭，将硅单晶锭加工成晶片，生产硅晶片， 晶片进行氧析出热处理，使得晶片中的残留间隙氧浓度应变为8ppma以下。 如上所述制造的硅晶片即使在器件制造等中进行热处理之后也几乎没有电阻降低。此外，如果制造硅晶片并进行热处理，使得晶片应具有上述初始间隙氧浓度和残留量 间隙氧浓度，随后的热处理过程中的滑移位错被阻止，而与电阻率无关。 此外，通过在本发明的硅晶片的表面上形成外延层，可以制造不含滑移位错等的高电阻率外延晶片，并可用于各种器件。