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公开(公告)号：US12078970B2
公开(公告)日：2024-09-03
申请号：US17255373
申请日：2019-06-19
申请人： SERCEL
发明人： Christophe L'Her
摘要： The method for estimating the drift over time of a physical operating parameter of a clock for dating seismic data samples associated with a seismic data collection node involves measuring (10) at least one quantity associated with the clock, at predetermined instants or during predetermined time periods, and applying (12), to this quantity, a predetermined non-linear law of variation of this quantity that depends on the values collected during the measurement step (10), so as to obtain an estimation of the drift over time of the physical operating parameter.
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公开(公告)号：US20220197333A1
公开(公告)日：2022-06-23
申请号：US17544830
申请日：2021-12-07
申请人： Lytx, Inc.
发明人： Bernd Egler
摘要： A system for managing a time reference includes a real-time clock, an interface, and a processor. The real-time clock store an RTC time. The interface is configured to receive a GPS time and a cellular time. The processor is configured to: indicate to start a time-speed adjustment loop; determine a true time based at least in part on the GPS time and the cellular time; determine an error between the true time and the RTC time; determine an RTC speed calibration adjustment based at least in part on the error; and adjust the real-time clock speed based at least in part on the RTC speed calibration adjustment.
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公开(公告)号：US11226650B1
公开(公告)日：2022-01-18
申请号：US16562036
申请日：2019-09-05
申请人： Lytx, Inc.
发明人： Bernd Egler
摘要： A system for managing a time reference includes a real-time clock, an interface, and a processor. The real-time clock store an RTC time. The interface is configured to receive a GPS time and a cellular time. The processor is configured to: indicate to start a time-speed adjustment loop; determine a true time based at least in part on the GPS time and the cellular time; determine an error between the true time and the RTC time; determine an RTC speed calibration adjustment based at least in part on the error; and adjust the real-time clock speed based at least in part on the RTC speed calibration adjustment.
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公开(公告)号：US20210263477A1
公开(公告)日：2021-08-26
申请号：US17255373
申请日：2019-06-19
申请人： SERCEL
发明人： Christophe L'HER
IPC分类号： G04G3/02
摘要： The method for estimating the drift over time of a physical operating parameter of a clock for dating seismic data samples associated with a seismic data collection node involves measuring (10) at least one quantity associated with the clock, at predetermined instants or during predetermined time periods, and applying (12), to this quantity, a predetermined non-linear law of variation of this quantity that depends on the values collected during the measurement step (10), so as to obtain an estimation of the drift over time of the physical operating parameter.
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公开(公告)号：US20050275475A1
公开(公告)日：2005-12-15
申请号：US11151233
申请日：2005-06-14
申请人： John Houldsworth
发明人： John Houldsworth
摘要： A method is provided for accurate time measurement. Time is first measured with a first oscillator. At designated intervals, a second oscillator is activated for a period of time based on the first oscillator. The second oscillator is more accurate than the first oscillator. Pulses are then counted from the second oscillator during the period of time. The second oscillator is then turned off after the period of time. The count from the second oscillator is used as a new measurement of the period of time of the first oscillator.
摘要翻译： 提供了一种准确的时间测量方法。 首先用第一个振荡器测量时间。 在指定的间隔，第二振荡器基于第一振荡器被激活一段时间。 第二个振荡器比第一个振荡器更精确。 然后在一段时间内从第二个振荡器计数脉冲。 然后第二个振荡器在一段时间后关闭。 来自第二振荡器的计数用作第一振荡器的时间段的新测量值。
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公开(公告)号：US6146011A
公开(公告)日：2000-11-14
申请号：US984587
申请日：1997-12-03
申请人： Toru Owai
发明人： Toru Owai
摘要： To provide a self-correcting watch wherein a high precision self-correction of the watch circuit can be realized without any troublesome operation, a self-correcting watch of the invention having a zero second set button comprises: a time interval counter circuit for counting a time interval from a first pressing of the zero second set button for time setting until each following pressing of the zero second set button for manually correcting time indication; a correction value memory for storing correction information including the time interval and an accumulation of correction values of the time indication performed both manually and automatically from the first pressing of the zero second set button; and a correction value calculator circuit for calculating an absolute time interval at which the time indication is to be corrected automatically by one second, from the time interval of a concerning pressing of the zero second set button counted by the time interval counter, a correction value of the time indication manually corrected by the concerning pressing of the zero second set button and the correction information stored in the correction value memory at a previous pressing of the zero second set button.
摘要翻译： 为了提供自校正表，其中可以实现手表电路的高精度自校正而没有任何麻烦的操作，具有零秒设置按钮的本发明的自校正手表包括：时间间隔计数器电路，用于对 时间间隔从第一次按压零秒设定按钮以进行时间设置，直到每个随后按下零秒设定按钮以手动校正时间指示; 校正值存储器，用于存储包括所述时间间隔的校正信息和由所述零秒设定按钮的第一按压手动和自动执行的时间指示的校正值的累加; 以及校正值计算器电路，用于根据由所述时间间隔计数器计数的所述零秒设定按钮的相关按压的时间间隔，计算从所述时间指示自动校正1秒的绝对时间间隔，校正值 通过按压零秒设定按钮手动校正的时间指示和在前一次按压零秒设定按钮时存储在校正值存储器中的校正信息。
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7.发明授权Method for adjusting the rate of a horological module by means of fuses able to be destroyed by laser 失效通过能够被激光破坏的保险丝来调整钟表模块速率的方法
公开(公告)号：US6120178A
公开(公告)日：2000-09-19
申请号：US434200
申请日：1999-11-04
CPC分类号： G04G3/022
摘要： A method for adjusting the rate of a horological module, said horological module including a printed circuit (1) on which are mounted in particular a quartz (10) and an integrated circuit (20) including an oscillator (21) driven by the quartz (10), a frequency divider circuit (22) with several stages (22.1 to 22.15), an adjustment circuit (23) allowing the introduction of a correction factor of the division ratio of said frequency divider circuit (22), and a memory circuit (24) containing data (N) representing said correction factor. The adjustment method according to the present invention uses a laser device to allow said data (N) representing the correction factor to be coded by the selective destruction of fuses (F1, F2; F.1 to F.6; F.1* to F.6*) forming memory elements of said memory circuit (24).
摘要翻译： 一种用于调节钟表模块的速率的方法，所述钟表模块包括印刷电路（1），特别安装有石英（10）和集成电路（20），所述集成电路包括由石英驱动的振荡器（21） 10），具有多级（22.1至22.15）的分频器电路（22），允许引入所述分频器电路（22）的分频比的校正因子的调节电路（23）和存储器电路 24）包含表示所述校正因子的数据（N）。 根据本发明的调整方法使用激光装置来通过选择性地破坏熔丝（F1，F2; F.1至F.6; F.1 *至...）来代表表示校正因子的所述数据（N） F.6 *）形成所述存储电路（24）的存储元件。
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公开(公告)号：US6081163A
公开(公告)日：2000-06-27
申请号：US234979
申请日：1999-01-22
申请人： Hitoshi Ujiie , Kazuyuki Maruo
发明人： Hitoshi Ujiie , Kazuyuki Maruo
CPC分类号： G01S19/235 , G04G3/022 , G04R40/02 , G04R40/06 , H03L7/085 , H03L7/146 , H03L7/18 , H03L1/022
摘要： A frequency standard generator includes a voltage controlled crystal oscillator (VCXO) for generating high stability output signal, a radio wave receiver to receive a radio wave which includes a high accuracy reference time signal, a time interval measuring circuit which measures a phase difference between the reference time signal and the output signal of the VCXO; a frequency control processor which determines control data based on the phase difference data to phase lock the output signal of the VCXO to the reference time signal, a frequency deviation data generator for compiling the phase difference data to obtain frequency deviation trend data of the VCXO, and a compensation data generator for generating compensation data based on the frequency deviation trend data to compensate frequency changes in said VCXO when the reference time signal is unavailable.
摘要翻译： 频率标准发生器包括用于产生高稳定度输出信号的电压控制晶体振荡器（VCXO），用于接收包括高精度基准时间信号的无线电波的无线电波接收器，测量第二相位差之间的相位差的时间间隔测量电路 参考时间信号和VCXO的输出信号; 频率控制处理器，其基于相位差数据确定控制数据，以将VCXO的输出信号锁定到参考时间信号;频率偏差数据发生器，用于编译相位差数据以获得VCXO的频率偏差趋势数据; 以及补偿数据发生器，用于基于频率偏差趋势数据产生补偿数据，以补偿当基准时间信号不可用时所述VCXO中的频率变化。
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公开(公告)号：US6049240A
公开(公告)日：2000-04-11
申请号：US49619
申请日：1998-03-27
申请人： Kazuo Kato
发明人： Kazuo Kato
CPC分类号： G04G3/022
摘要： An oscillating means having an oscillator outputs a reference clock, and a frequency-dividing means sequentially frequency-dividing the reference clock into a half frequency. A temperature correction data creating means detects a temperature, calculates logical delaying/advancing data for a temperature change, and outputs the logical delaying/advancing data in every predetermined period. A temperature correction data input means receives the delaying/advancing data outputted by the temperature correction data creating means and outputs the logical delaying/advancing data to a logical delaying/advancing means. The logical delaying/advancing means operates a state of the frequency-dividing means in every predetermined period on the basis of the set logical delaying/advancing data to control the period of the frequency-divided output signal of the frequency-dividing means so as to be coincident with a desired period. Owing to this temperature correction data input means, it becomes possible to separate the temperature correction data creating means conventionally incorporated.
摘要翻译： 具有振荡器的振荡装置输出参考时钟，并且分频装置将参考时钟顺序地分频为半频。 温度校正数据产生装置检测温度，计算温度变化的逻辑延迟/前进数据，并且在每个预定周期中输出逻辑延迟/前进数据。 温度校正数据输入装置接收由温度校正数据产生装置输出的延迟/前进数据，并将逻辑延迟/前进数据输出到逻辑延迟/前进装置。 逻辑延迟/提前装置根据设定的逻辑延迟/前进数据在每个预定周期内操作分频装置的状态，以控制分频装置的分频输出信号的周期，以便 与期望的时期相符。 由于该温度校正数据输入装置，可以分离通常结合的温度校正数据生成装置。
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公开(公告)号：US6016070A
公开(公告)日：2000-01-18
申请号：US743363
申请日：1996-11-04
申请人： Hidenori Uehara
发明人： Hidenori Uehara
CPC分类号： H03K5/06
摘要： The present invention provides a timing circuit for outputting a signal having an amplified pulse width when a signal having a normal pulse width is inputted thereto, characterized in that when glitch noise whose pulse width is small, is inputted to the timing circuit, a signal having a waveform corresponding to the pulse width thereof is outputted from the timing circuit. The timing circuit comprises a first delay circuit whose input is connected to an input terminal, a first NAND circuit having a first input terminal connected to the first delay circuit and a second input terminal connected to the input terminal, a second delay circuit whose input is connected to the output of the NAND circuit, an inverter whose input is connected to the input terminal, and a second NAND circuit having a first input terminal connected to the output of the second delay circuit and a second input terminal connected to the output of the inverter.
摘要翻译： 本发明提供一种定时电路，用于当输入具有正常脉冲宽度的信号时，输出具有放大脉冲宽度的信号，其特征在于，当脉冲宽度小的脉冲噪声被输入到定时电路时，具有 从其定时电路输出对应于其脉冲宽度的波形。 定时电路包括其输入连接到输入端的第一延迟电路，具有连接到第一延迟电路的第一输入端和连接到输入端的第二输入端的第一NAND电路，其输入为 连接到NAND电路的输出，其输入端连接到输入端的反相器，以及具有连接到第二延迟电路的输出的第一输入端的第二NAND电路和连接到第二延迟电路的输出的第二输入端 逆变器。
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