公开(公告)号：US07608534B2

公开(公告)日：2009-10-27

申请号：US11043580

申请日：2005-01-26

申请人： Changhan Yun ,  Javier Villarreal ,  Maurice S. Karpman

发明人： Changhan Yun ,  Javier Villarreal ,  Maurice S. Karpman

IPC分类号： H10L21/20 ,  H10L21/4763

CPC分类号： B81C1/00301 ,  B81B2207/095 ,  B81C2203/0118 ,  H01L21/50 ,  H01L23/053 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： Bridge structures provide a surface on which to form interconnections to components through through-hole vias. The bridge structures at least partially, and preferably fully, span the gap between two wafers, and, more specifically, between a through-hole via in one wafer and a corresponding component on the other wafer. Bridge structure may be formed on the wafer having the through-hole via and/or the wafer having the component.

摘要翻译： 桥结构提供了一个表面，通过通孔通孔形成与组件的互连。 桥结构至少部分地，优选地完全跨越两个晶片之间的间隙，更具体地，在一个晶片中的通孔通孔和另一个晶片上的相应部件之间。 可以在具有通孔通孔和/或具有该部件的晶片的晶片上形成桥结构。

公开(公告)号：US07067420B2

公开(公告)日：2006-06-27

申请号：US10404360

申请日：2003-04-01

申请人： Kyung-In Choi ,  Gil-Heyun Choi ,  Byung-Hee Kim ,  Sang-Bum Kang

发明人： Kyung-In Choi ,  Gil-Heyun Choi ,  Byung-Hee Kim ,  Sang-Bum Kang

IPC分类号： H10L21/4763 ,  H10L21/20 ,  H10L21/44

CPC分类号： H01L21/76843 ,  C23C16/34 ,  C23C16/45542 ,  C23C16/45553 ,  H01L21/28562 ,  H01L21/32051 ,  H01L21/76877

摘要： A metal layer is formed on an integrated circuit device including forming an insulating layer on an integrated circuit substrate. A contact hole is formed by selectively etching the insulating layer to thereby partially expose the substrate. A metal layer including tantalum nitride is formed on the insulating layer including the contact hole using a tantalum precursor including a tantalum element and at least one bonding element that is chemically bonded to the tantalum element. A part of the at least one bonding element include at least one ligand bonding element that is ligand-bonded to the tantalum element. Forming the metal layer may include removing at least some of the ligand bonded elements with a removing gas that is substantially free of hydrogen radicals. The metal layer may be formed using a chemical vapor deposition (CVD) or an atomic layer deposition (ALD) process. A copper or other metal layer may be deposited on the metal layer including tantalum nitride.

摘要翻译： 金属层形成在集成电路器件上，包括在集成电路衬底上形成绝缘层。 通过选择性地蚀刻绝缘层从而部分地暴露衬底而形成接触孔。 包括氮化钽的金属层使用包括钽元素的钽前体和与钽元素化学键合的至少一个结合元件在包括接触孔的绝缘层上形成。 至少一个键合元件的一部分包括与钽元素配位键合的至少一个配体结合元件。 形成金属层可以包括用基本上不含氢自由基的去除气体去除至少一些配体键合元件。 可以使用化学气相沉积（CVD）或原子层沉积（ALD）工艺来形成金属层。 可以在包括氮化钽的金属层上沉积铜或其它金属层。

公开(公告)号：US07253100B2

公开(公告)日：2007-08-07

申请号：US11164290

申请日：2005-11-17

申请人： Ronald A. DellaGuardia ,  Daniel C. Edelstein ,  Habib Hichri ,  Vincent J. McGahay

发明人： Ronald A. DellaGuardia ,  Daniel C. Edelstein ,  Habib Hichri ,  Vincent J. McGahay

IPC分类号： H10L21/4763

CPC分类号： H01L21/31144 ,  H01L21/02063 ,  H01L21/31133 ,  H01L21/76808

摘要： Methods are disclosed for reducing damage to an ultra-low dielectric constant (ULK) dielectric during removal of a planarizing layer such as a crosslinked polymer. The methods at least partially fill an opening with an at most lightly crosslinked polymer, followed by the planarizing layer. When the at most lightly crosslinked polymer and planarizing layer are removed, the at most lightly crosslinked polymer removal is easier than removal of the planarizing layer, i.e., crosslinked polymer, and does not damage the surrounding dielectric compared to removal chemistries used for the crosslinked polymer.

摘要翻译： 公开了减少在去除平坦化层例如交联聚合物期间对超低介电常数（ULK）电介质的损伤的方法。 该方法至少部分地用至少轻度交联的聚合物填充开口，随后是平坦化层。 当除去至多轻度交联的聚合物和平坦化层时，与用于交联聚合物的去除化学物质相比，去除至多轻度交联的聚合物去除比去除平坦化层即交联聚合物更容易，并且不损坏周围的电介质 。

公开(公告)号：US06861350B1

公开(公告)日：2005-03-01

申请号：US10464508

申请日：2003-06-19

申请人： Minh Van Ngo ,  Christy Mei-Chu Woo ,  Jinsong Yin ,  James Pan ,  Paul R. Besser

发明人： Minh Van Ngo ,  Christy Mei-Chu Woo ,  Jinsong Yin ,  James Pan ,  Paul R. Besser

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L29/49 ,  H10L21/4763 ,  H10L21/44

CPC分类号： H01L29/66606 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/66545

摘要： Micro-miniaturized semiconductor devices are fabricated with silicon-rich tantalum silicon nitride replacement metal gate electrodes. Embodiments include removing a removable gate, depositing a layer of tantalum nitride, as by PVD at a thickness of 25 Å to 75 Å, and then introducing silicon into the deposited tantalum nitride layer by thermal soaking in silane or silane plasma treatment to form a layer of silicon-rich tantalum silicon nitride. In another embodiment, the intermediate structure is subjected to thermal soaking in silane or silane plasma treatment before and after depositing the tantalum nitride layer. Embodiments further include pretreating the intermediate structure with silane prior to depositing the tantalum nitride layer, treating the deposited tantalum nitride layer with silane, and repeating these steps a number of times to form a plurality of sub-layers of silicon-rich tantalum silicon nitride.

摘要翻译： 微型半导体器件由富含硅的钽氮化硅替代金属栅电极制成。 实施例包括去除可移除栅极，通过PVD沉积氮化钽层，厚度为25埃，然后通过在硅烷或硅烷等离子体处理中热浸泡形成层，将硅引入沉积的氮化钽层中 的富硅钽硅氮化物。 在另一个实施方案中，在沉积氮化钽层之前和之后，使中间体在硅烷或硅烷等离子体处理中进行热浸。 实施例还包括在沉积氮化钽层之前用硅烷预处理中间结构，用硅烷处理沉积的氮化钽层，并重复这些步骤多次以形成多个富硅钽硅氮化物的子层。