公开(公告)号：US20250056878A1

公开(公告)日：2025-02-13

申请号：US18929367

申请日：2024-10-28

Applicant: MONDE Wireless Inc.

Inventor： Matthew GUIDRY ,  Brian ROMANCZYK

IPC: H01L27/095 ,  H01L21/8252 ,  H01L27/06 ,  H01L27/088 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L29/778

Abstract: A wireless front-end can include a plurality of circuits, including a power amplifier (PA), a low noise amplifier (LNA), and an RF switch. In order to decrease the size and improve the performance of the front-end, the various circuits of the front end can include N-polar III-N transistors that are all formed from the same epitaxial material structure and monolithically integrated onto a single chip. Due to the different performance requirements of the various transistors in the different circuits, parameters such as gate length, gate-to-channel separation, and surface-to-channel separation in the access regions of the devices can be varied to meet the desired performance requirements.

公开(公告)号：US12224339B2

公开(公告)日：2025-02-11

申请号：US17735100

申请日：2022-05-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Ming Hsu ,  Yu-Chi Wang ,  Yen-Hsing Chen ,  Tsung-Mu Yang ,  Yu-Ren Wang

IPC: H01L29/778 ,  H01L29/04 ,  H01L29/15 ,  H01L29/20 ,  H01L29/205 ,  H01L29/267

Abstract: An HEMT includes an aluminum gallium nitride layer. A gallium nitride layer is disposed below the aluminum gallium nitride layer. A zinc oxide layer is disposed under the gallium nitride layer. A source electrode and a drain electrode are disposed on the aluminum gallium nitride layer. A gate electrode is disposed on the aluminum gallium nitride layer and between the drain electrode and the source electrode.

公开(公告)号：US12218204B2

公开(公告)日：2025-02-04

申请号：US16768401

申请日：2018-11-30

Applicant: SUZHOU LEKIN SEMICONDUCTOR CO., LTD.

Inventor： Ha Jong Bong ,  Jae Gu Lim

IPC: H01L29/205 ,  H01L29/20 ,  H01L29/207 ,  H01L33/32 ,  H01S5/30 ,  H01S5/323

Abstract: Disclosed in an embodiment is a semiconductor device comprising a semiconductor structure, which comprises a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, wherein: the first conductive semiconductor layer comprises a first super lattice layer comprising a plurality of first sub layers and a plurality of second sub layers, the first and second sub layers being alternately arranged; the semiconductor structure emits ions of indium, aluminum, and a first and second dopant during a primary ion irradiation; the intensity of indium ions emitted from the active layer includes a maximum indium intensity peak; the doping concentration of the first dopant emitted from the first conductive semiconductor layer includes a maximum concentration peak; the maximum indium intensity peak is disposed to be spaced from the maximum concentration peak in a first direction; the intensity of indium ions emitted from the plurality of first sub layers has a plurality of first indium intensity peaks; the doping concentration of the first dopant emitted from the plurality of first sub layers has a plurality of first concentration peaks; and the plurality of first indium intensity peaks and the plurality of first concentration peaks are disposed between the maximum indium intensity peak and the maximum concentration peak.

公开(公告)号：US20250040210A1

公开(公告)日：2025-01-30

申请号：US18776141

申请日：2024-07-17

Applicant: STMicroelectronics International N.V.

Inventor： Riccardo DEPETRO

IPC: H01L29/205 ,  H01L21/02 ,  H01L21/762 ,  H01L29/20 ,  H01L29/778

Abstract: A semiconductor electronic device has a substrate region of semiconductor material; a first electronic component based on heterostructure, which has an epitaxial multilayer that extends on the substrate region and includes a heterostructure; and a separation region that extends on the substrate region. The separation region includes a polycrystalline region of semiconductor material of polycrystalline type which is arranged, along a first direction, alongside the epitaxial multilayer. The electronic device also has an epitaxial region of a single semiconductor material of monocrystalline type which extends on the substrate region. The polycrystalline region extends, along the first direction, between the epitaxial multilayer and the epitaxial region.

公开(公告)号：US20250017115A1

公开(公告)日：2025-01-09

申请号：US18887882

申请日：2024-09-17

Applicant: Akoustis, Inc.

Inventor： Craig MOE ,  Jeffrey M. LEATHERSICH

IPC: H10N39/00 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L29/778 ,  H03H3/02 ,  H03H9/02 ,  H03H9/17 ,  H10N30/03 ,  H10N30/076 ,  H10N30/093

Abstract: A method of forming a film can include heating a CVD reactor chamber containing a substrate to a temperature range between about 750 degrees Centigrade and about 950 degrees Centigrade, providing a first precursor comprising Al to the CVD reactor chamber in the temperature range, providing a second precursor comprising Sc to the CVD reactor chamber in the temperature range, providing a third precursor comprising nitrogen to the CVD reactor chamber in the temperature range, and forming the film comprising ScAlN on the substrate.

公开(公告)号：US12191349B2

公开(公告)日：2025-01-07

申请号：US16649287

申请日：2017-12-15

Applicant: INTEL CORPORATION

Inventor： Dipanjan Basu ,  Cory E. Weber ,  Justin R. Weber ,  Sean T. Ma ,  Harold W. Kennel ,  Seung Hoon Sung ,  Glenn A. Glass ,  Jack T. Kavalieros ,  Tahir Ghani

IPC: H01L29/06 ,  H01L27/088 ,  H01L29/08 ,  H01L29/161 ,  H01L29/201 ,  H01L29/205 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66

Abstract: Material systems for source region, drain region, and a semiconductor body of transistor devices in which the semiconductor body is electrically insulated from an underlying substrate are selected to reduce or eliminate a band to band tunneling (“BTBT”) effect between different energetic bands of the semiconductor body and one or both of the source region and the drain region. This can be accomplished by selecting a material for the semiconductor body with a band gap that is larger than a band gap for material(s) selected for the source region and/or drain region.

公开(公告)号：US12170330B2

公开(公告)日：2024-12-17

申请号：US17238012

申请日：2021-04-22

Applicant: Lawrence Livermore National Security, LLC

Inventor： Adam Conway ,  Sara Elizabeth Harrison ,  Rebecca Nikolic ,  Qinghui Shao ,  Lars Voss

IPC: H01L29/778 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L29/78 ,  H01L29/808

Abstract: An apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a first semiconductor material, an array of three dimensional (3D) structures above the substrate, a sidewall heterojunction layer positioned on at least one vertical sidewall of each 3D structure, and an isolation region positioned between the 3D structures. Each 3D structure includes the first semiconductor material. The sidewall heterojunction layer includes a second semiconductor material, where the first and second semiconductor material have different bandgaps.

公开(公告)号：US12159932B2

公开(公告)日：2024-12-03

申请号：US17014009

申请日：2020-09-08

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Jumpei Tajima ,  Toshiki Hikosaka ,  Shinya Nunoue

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/207 ,  H01L29/417 ,  H01L29/45

Abstract: According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, and third semiconductor layers, and a first insulating member. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The first electrode includes a first electrode portion. The second semiconductor layer includes first and second semiconductor portions. The third semiconductor layer includes first and second semiconductor regions. The second semiconductor region is electrically connected to the first semiconductor region and the first electrode portion. The first insulating member includes a first insulating portion. The first insulating portion is provided between the third partial region and the third electrode.

公开(公告)号：US12154982B2

公开(公告)日：2024-11-26

申请号：US17496699

申请日：2021-10-07

Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Inventor： Gökhan Atmaca

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/207 ,  H01L29/40

Abstract: A transistor device including a layer of AlGaN extending between a source and drain of the device; a GaN channel layer extending under the AlGaN layer; a gate stack including a layer of p-doped gallium nitride; and a layer of p-doped InGaN of at least 5 nm in thickness positioned between the AlGaN layer and the p-doped gallium nitride layer, the InGaN layer having a length greater than a length of the gate stack.

公开(公告)号：US12154980B2

公开(公告)日：2024-11-26

申请号：US17671562

申请日：2022-02-14

Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.

Inventor： Yi-Lun Chou ,  Shuang Gao ,  Chuangang Li

IPC: H01L29/778 ,  H01L21/02 ,  H01L21/306 ,  H01L21/76 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66

Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a lattice layer, a third nitride-based semiconductor layer, a first source electrode and a second electrode, and a gate electrode. The second nitride-based semiconductor layer is disposed over the first nitride-based semiconductor layer. The lattice layer is disposed between the first and second nitride-based semiconductor layers and doped to the first conductivity type. The lattice layer comprises a plurality of first III-V layers and second III-V layers alternatively stacked. Each of the first III-V layers has a high resistivity region and a current aperture enclosed by the high resistivity region. The high resistivity region comprises more metal oxides than the current aperture so as to achieve a resistivity higher than that of the current aperture. At least two of the first III-V layers have the same group III element at different concentrations.